On 12/06/2012 07:21 AM, Vipin Kumar wrote:
> The page size is a flash dependent property and the driver was using a macro
> in
> place of page size. This patch uses the proper page size wrt the flash device
> connected on board
>
> Signed-off-by: Vipin Kumar
Acked-by: Stefan Roese
Thanks,
Ste
On 12/06/2012 07:21 AM, Vipin Kumar wrote:
> The write loop is checking for dest_addr alignment with page size. This
> sometimes leads to smi controller coming out of write mode and eventually the
> next write failing with ERF1 being set.
>
> To avoid this, write to flash in a tight loop and write
On 12/06/2012 07:21 AM, Vipin Kumar wrote:
> At the start of an smi_write, if the destination address is page aligned, the
> Write Enable command is getting issued twice. This patch fixes it by keeping a
> flag.
>
> Signed-off-by: Vipin Kumar
Acked-by: Stefan Roese
Thanks,
Stefan
On 12/06/2012 07:21 AM, Vipin Kumar wrote:
> Signed-off-by: Vipin Kumar
Acked-by: Stefan Roese
Thanks,
Stefan
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On 12/06/2012 07:21 AM, Vipin Kumar wrote:
> From: Armando Visconti
>
> Signed-off-by: Armando Visconti
Acked-by: Stefan Roese
Thanks,
Stefan
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On 12/06/2012 07:21 AM, Vipin Kumar wrote:
> SMI controller reports an error when the code tries to write on the flash area
> with Write Enable command not issued or the bank has come out of the write
> mode.
>
> This error is reported even with a fresh write once the ERF1 or ERF2 is set.
> Clear
On 12/06/12 08:58, Vipin Kumar wrote:
> On 12/6/2012 12:17 PM, Igor Grinberg wrote:
>> On 12/06/12 08:30, Vipin Kumar wrote:
>>> Few pen drives take longer than usual for enumeration. The u-boot unlike
>>> linux
>>> does not depend on interrupts and works in polling and timeout mode.
>>>
>>> This
Hi Vipin,
On 12/06/2012 07:21 AM, Vipin Kumar wrote:
> Hello,
>
> This patch-set adds simple fixes for smi driver used in spear devices.
>
> Modifications include
> - Add MTD support for smi driver
> - Write to flash in a tight loop
> - Alphabetically sort the list of devices
> - Avoid issuing m
Hi Tom,
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 12/05/12 13:06, Lukasz Majewski wrote:
> > Several fixes for ext4write command including: - compiler warnings
> > suppress - lldiv() and do_div() instead of "plain" / and %
> > operands for 64-32 bits - Proper initialization of dev_
This patch forces to read the bad block marker from location 0 in large page
nand devices and location 5 in small page devices.
Signed-off-by: Vipin Kumar
Reviewed-by: Shiraz Hashim
---
drivers/mtd/nand/fsmc_nand.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/
From: Shiraz Hashim
SPEAr310 and SPEAr320 Ethernet interfaces share same MDIO lines to control their
respective phys. Currently their is a fixed configuration in which only a
particular MAC can use the MDIO lines.
Call an arch specific function to take control of specific mdio lines at
runtime.
Do not select MIIPORT for RGMII interface
Signed-off-by: Vipin Kumar
---
drivers/net/designware.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index bf21a08..46f6601 100644
--- a/drivers/net/designware.c
+++ b/drivers/
On 12/6/2012 12:17 PM, Igor Grinberg wrote:
On 12/06/12 08:30, Vipin Kumar wrote:
Few pen drives take longer than usual for enumeration. The u-boot unlike linux
does not depend on interrupts and works in polling and timeout mode.
This patch increases this timeout to increase the set of usb stic
From: Armando Visconti
This patch adds the support for the ARM PL022 SPI controller for the standard
variant (0x00041022), which has a 16bit wide and 8 locations deep TX/RX FIFO.
Signed-off-by: Armando Visconti
Signed-off-by: Vipin Kumar
---
Dear Wolfgang, Stefan,
There seems to be no direct
Signed-off-by: Vipin Kumar
---
drivers/mmc/Makefile | 1 +
drivers/mmc/spear_sdhci.c | 44
2 files changed, 45 insertions(+)
create mode 100644 drivers/mmc/spear_sdhci.c
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index a1dd730..01
Few pen drives take longer than usual for enumeration. The u-boot unlike linux
does not depend on interrupts and works in polling and timeout mode.
This patch increases this timeout to increase the set of usb sticks that can be
enumerated by u-boot
Signed-off-by: Vipin Kumar
---
common/usb_hub.
Add required compatible information for USB
Signed-off-by: Vivek Gautam
Acked-by: Simon Glass
---
Changes in V2:
- None.
include/fdtdec.h |1 +
lib/fdtdec.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 5934af1
This patch adds the device node required for USB
Signed-off-by: Vivek Gautam
---
Chnages in V2:
- None
arch/arm/dts/exynos5250.dtsi |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 2073ef2..dc
Adding fdt support to ehci-exynos in order to parse
register base addresses from the device node.
Signed-off-by: Vivek Gautam
Signed-off-by: Rajeshwari Shinde
---
Chnages in V2:
- Removed checkpatch errors.
drivers/usb/host/ehci-exynos.c | 59 ---
1
This patch set adds FDT support for USB device.
This patch set is based on
"EXYNOS5: MAX77686 add FDT support"
Changes in V2:
- Removed checkpatch errors.
Rajeshwari Shinde (3):
EHCI: Exynos: Add fdt support
EXYNOS5: Add devine node for USB.
EXYNOS5: FDT: Add compatible strings for
This patch adds mtd device support for smi devices
Signed-off-by: Vipin Kumar
---
drivers/mtd/st_smi.c | 167 ++-
1 file changed, 165 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c
index 0e529a4..4d1a6bd 100
The page size is a flash dependent property and the driver was using a macro in
place of page size. This patch uses the proper page size wrt the flash device
connected on board
Signed-off-by: Vipin Kumar
---
drivers/mtd/st_smi.c | 41 +
include/linux
The write loop is checking for dest_addr alignment with page size. This
sometimes leads to smi controller coming out of write mode and eventually the
next write failing with ERF1 being set.
To avoid this, write to flash in a tight loop and write bytewise to also support
not word aligned data bytes
At the start of an smi_write, if the destination address is page aligned, the
Write Enable command is getting issued twice. This patch fixes it by keeping a
flag.
Signed-off-by: Vipin Kumar
---
drivers/mtd/st_smi.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a
From: Armando Visconti
Signed-off-by: Armando Visconti
---
drivers/mtd/st_smi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c
index c3e35c0..a46b273 100644
--- a/drivers/mtd/st_smi.c
+++ b/drivers/mtd/st_smi.c
@@ -91,6 +91,7 @@ static struct fla
Signed-off-by: Vipin Kumar
---
drivers/mtd/st_smi.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c
index fad4420..c3e35c0 100644
--- a/drivers/mtd/st_smi.c
+++ b/drivers/mtd/st_smi.c
@@ -62,24 +62,24 @@ struct
Hello,
This patch-set adds simple fixes for smi driver used in spear devices.
Modifications include
- Add MTD support for smi driver
- Write to flash in a tight loop
- Alphabetically sort the list of devices
- Avoid issuing multiple write enable commands
PS: Wolfgang, Stefan, I am directing thes
SMI controller reports an error when the code tries to write on the flash area
with Write Enable command not issued or the bank has come out of the write mode.
This error is reported even with a fresh write once the ERF1 or ERF2 is set.
Clear these flags while initiating a fresh write
Signed-off-
On Wed, Dec 05, 2012 at 09:35:26PM -0200, Fabio Estevam wrote:
> Hi Wolfram,
>
> On Wed, Dec 5, 2012 at 6:48 PM, Wolfram Sang wrote:
>
> > diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
> > index 4701be8..e38e151 100644
> > --- a/drivers/mtd/nand/mxs_nand.c
> > +++ b/driv
On 12/05/2012 10:31 PM, Amar wrote:
> This patch initialises and enables dwmmc channels 0 and 2 for SMDK5250.
> It also initialises the pinmux for the same.
>
> Signed-off-by: Amarendra Reddy
> ---
> board/samsung/smdk5250/smdk5250.c | 22 +-
> include/configs/smdk5250.h
Since last month, no any feedback.
Who can give some comment about this patch?
Best Regards
Jerry Huang
> -Original Message-
> From: Huang Changming-R66093
> Sent: Wednesday, November 07, 2012 9:33 AM
> To: u-boot@lists.denx.de
> Cc: Huang Changming-R66093
> Subject: [PATCH] part: check
Acked-by: Jaehoon Chung
On 12/05/2012 10:31 PM, Amar wrote:
> This patch initialises the local variable 'shift' to zero to avoid
> improper extraction of ratio and pre-ratio divider values. Extraction of
> improper values was happening due to garbage value present in local variable.
>
> Signed-o
On 12/05/2012 10:31 PM, Amar wrote:
> This patch defines the call back required by dw mmc driver to get the
> clock value. It also adds function to set the dw mmc clock divider ratio.
>
> Signed-off-by: Amarendra Reddy
> ---
> drivers/mmc/exynos_dw_mmc.c | 14 +-
> 1 files changed,
It looks good to me.
Added minor comment.
Acked-by: Jaehoon Chung
On 12/05/2012 10:31 PM, Amar wrote:
> The current implementation of fifo size computation was giving improper
> values for eMMC channel. Modified the computation as per user manual.
>
> Signed-off-by: Amarendra Reddy
> ---
> dr
On Wed, Dec 5, 2012 at 11:25 PM, Vadim Bendebury wrote:
> No - md/mw access memory, the new commands access the IO space (which
> is an x86 architecture property).
Ok, understood. On ARM we are able to access registers via md/mw.
Maybe it would be better to put a note in the commit message that
On Wed, Dec 5, 2012 at 5:23 PM, Fabio Estevam wrote:
> On Wed, Dec 5, 2012 at 10:46 PM, Simon Glass wrote:
>> From: Vadim Bendebury
>>
>> Provide u-boot console functions to access IO space registers. A no
>> thrills implementation, accessing one register at a time.
>>
>> For example:
>> boo
On Wed, Dec 5, 2012 at 10:46 PM, Simon Glass wrote:
> From: Vadim Bendebury
>
> Provide u-boot console functions to access IO space registers. A no
> thrills implementation, accessing one register at a time.
>
> For example:
> boot > iod 80
> 0080: 0094
> boot > iod.w 80
> 008
The config is current broken. It compiles but does not boot because IDE is
enabled. Remove all IDE options, and enable SCSI instead.
Also add a working boot command and Linux bootargs, and enable command
line editing to make it easier to work with.
Signed-off-by: Simon Glass
---
include/configs
From: Gabe Black
This allows u-boot to figure out the partitions of a chrome-os install.
Signed-off-by: Gabe Black
Signed-off-by: Simon Glass
---
Changes in v2:
- Add CONFIG_CMD_PART and CONFIG_PARTITION_UUIDS which are required
include/configs/coreboot.h |3 +++
1 files changed, 3 inser
Update the code to use the hash layer instead of local code.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add new patch to change sha1sum to use generic hash API
common/cmd_sha1sum.c | 129 ++
1 files changed, 4 insertions(
From: Tom Wai-Hong Tam
This implements a library for accessing EDID data from an LCD panel.
This is used to obtain information about the panel such as its
resolution and type.
This is a tidied-up version of the original code pulled from
https://github.com/ynezz/u-boot-edid.
The changes we made
From: Stefan Reinauer
Since U-Boot runs from coreboot on x86, the Coreboot version is an
important part of the boot state. This version information is
available in the coreboot tables, so print it when the 'version'
command is used.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in
From: Kenneth Waters
Sometimes data is on a block device and within a partition, but not in a
particular filesystem.
This commands permits reading raw data from a partition.
Signed-off-by: Kenneth Waters
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
README
Enable the io command for x86 on coreboot.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add x86 patch to enable io command for coreboot
include/configs/coreboot.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/configs/coreboot.h b/include
From: Vadim Bendebury
Provide u-boot console functions to access IO space registers. A no
thrills implementation, accessing one register at a time.
For example:
boot > iod 80
0080: 0094
boot > iod.w 80
0080: 0094
boot > iod.b 80
0080: 94
boot > iow.b 0x80 12
b
The CONFIG_SYS_CONSOLE_INFO_QUIET option should suppress the console
information, but allow boards to display it later if required. Adjust
the code to support this.
This is used to avoid printing the information while the LCD display
is not ready, since it only becomes ready when stdio init is com
From: Tom Wai-Hong Tam
This function can be used for LCDs as well as monitors.
Signed-off-by: Tom Wai-Hong Tam
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
common/fdt_support.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/common/fdt_supp
From: Tom Wai-Hong Tam
Add a single command to read the EDID information over I2C.
For example:
SMDK5250 # i2c dev 7
Setting bus to 7
SMDK5250 # i2c edid 50
EDID version: 1.4
Product ID code: 305c
Manufacturer: AUO
Serial number:
Manufactured in week: 0 year: 2011
Video input definitio
This new command supports hashing SHA1 and SHA256. It could be extended
to others such as MD5 and the CRC algorithms. The syntax is modeled on
those:
hash[* | ]
to calculate a hash, and:
hash -v[* | ]
to verify a hash.
Use CONFIG_CMD_HASH to enable the command, CONFIG_SHA1 to ena
From: Vincent Palatin
The name is already copied when we memcpy() the whole structure.
This is because struct stdio_dev has this field:
charname[16]; /* Device name
*/
So the data is inline, rather than being a pointer.
Signed-off-by: Vincen
Enable SHA1/SHA256 hashing and the hash command. Also enable EDID
support for reading from an LCD.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add patch to enable hashing and EDID on smdk5250
include/configs/smdk5250.h |7 +++
1 files changed, 7 insertions(+), 0
We have a SHA1 command and want to add a SHA256 command also. Instead of
duplicating the code, create a generic hash API which can process
commands for different algorithms.
Signed-off-by: Simon Glass
---
Changes in v3:
- Rename stricmp() to strcasecmp() to match Linux / POSIX
- Correct hash erro
In preparation for making the hash function common, we may as well use
const where we can. Also the input length cannot be negative, but may
be very large, so use unsigned.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add new patch to adjust sha1 functions to use const/unsi
From: Luigi Semenzato
Add a simple command to stress-test a TPM (Trusted Platform Module).
Signed-off-by: Luigi Semenzato
Signed-off-by: Simon Glass
---
Changes in v3:
- Drop meminfo from this series
- Drop patch 'Update time command to avoid using get_timer_masked()'
Changes in v2: None
c
strncasecmp() is present as strnicmp() but disabled. Make it available
and define strcasecmp() also. There is a only a small performance penalty
to having strcasecmp() call strncasecmp(), so do this instead of a
standalone function, to save code space.
Update the prototype in arch-specific headers
In preparation for making the hash function common, we may as well use
const where we can.
Also add a watchdog version of the hashing function.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add new patch to adjust sha256 functions to const and watchdog
include/sha256.h |
This code was not guarded with CONFIG_LMB so failed to build on x86.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
common/cmd_bootm.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 4dbe952..f7595c0
From: Anton Staaf
Gettime returns the current timer value. If CONFIG_SYS_HZ is defined
then the timer value is also converted to seconds.
Tegra20 (SeaBoard) # gettime
Timer val: 7754
Seconds : 7
Remainder : 754
sys_hz = 1000
There has been some discussion about whether this is useful enough to
Mark when we get to the main loop.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Remove arm: tag from bootstage step patch
common/main.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/common/main.c b/common/main.c
index 5362781..b145f85 100644
--
Hi,
On Thu, Nov 22, 2012 at 11:12 AM, Simon Glass wrote:
> It is better to use get_timer() by itself now, according to the new
> timer API.
>
> Signed-off-by: Simon Glass
> ---
> Changes in v2: None
I am going to drop this patch as Richard Genoud has refactored the
code in a pending patch, so I
This collection of patches to common/ adds the following:
- EDID support for LCD displays
- TPM stress test
- gettime command to find out the time since boot
- Adds coreboot information to the 'version' command
- Fixes LMB on x86
- SHA256 hashing using a new hashing framework created in response t
Hi,
On Tue, Dec 4, 2012 at 5:14 PM, Graeme Russ wrote:
> Hi Wolfgang,
>
> On Wed, Dec 5, 2012 at 6:25 AM, Wolfgang Denk wrote:
>> Dear Simon Glass,
>>
>> In message
>> you
>> wrote:
>>>
>>> > To be honest, I think gd should only be a temporary structure used to
>>> > carry specific data throu
Hi Wolfram,
On Wed, Dec 5, 2012 at 6:48 PM, Wolfram Sang wrote:
> diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
> index 4701be8..e38e151 100644
> --- a/drivers/mtd/nand/mxs_nand.c
> +++ b/drivers/mtd/nand/mxs_nand.c
> @@ -1058,6 +1058,8 @@ int mxs_nand_init(struct mxs_na
On Wed, Dec 5, 2012 at 6:48 PM, Wolfram Sang wrote:
> It could happen (1 out of 100 times) that NAND did not start up correctly
> after
> warm rebooting, so we end up with various failures or DMA timed out due to
> a
> stalled BCH. When resetting BCH together with GPMI, the issue could not be
> o
It could happen (1 out of 100 times) that NAND did not start up correctly after
warm rebooting, so we end up with various failures or DMA timed out due to a
stalled BCH. When resetting BCH together with GPMI, the issue could not be
observed anymore (after 1+ reboots). We probably need the consi
Dear Matthias Brugger,
In message <50bf9cc3.9020...@gmail.com> you wrote:
>
> I run into an NFS issue when trying to load two files from nfs for
> booting (uImage and device tree binary):
>
> When I try to unmount after loading the first file, I get some timeouts
> from the host which will lea
On Sun, 2012-12-02 at 20:15 +0100, Luka Perkov wrote:
> Hi Sebastian,
>
> On Sun, Dec 02, 2012 at 03:36:22PM +0100, Sebastian Hesselbarth wrote:
> > On Dove kwboot can also be used to boot an u-boot image into RAM.
> > In contrast to Kirkwood, Dove does not support the UART boot mode
> > sequence
On Wed, Dec 5, 2012 at 2:38 PM, Stephen Warren wrote:
> On 12/05/2012 02:32 PM, Tom Warren wrote:
>> On Wed, Dec 5, 2012 at 1:37 PM, Stephen Warren wrote:
>>> On 12/03/2012 04:45 PM, Tom Warren wrote:
These files are used by both SPL and main U-Boot.
Also made minor changes to shared Te
On 12/05/2012 02:32 PM, Tom Warren wrote:
> On Wed, Dec 5, 2012 at 1:37 PM, Stephen Warren wrote:
>> On 12/03/2012 04:45 PM, Tom Warren wrote:
>>> These files are used by both SPL and main U-Boot.
>>> Also made minor changes to shared Tegra code to support
>>> T30 differences.
...
>>> diff --git a
Stephen,
On Wed, Dec 5, 2012 at 1:37 PM, Stephen Warren wrote:
> On 12/03/2012 04:45 PM, Tom Warren wrote:
>> These files are used by both SPL and main U-Boot.
>> Also made minor changes to shared Tegra code to support
>> T30 differences.
>
>> diff --git a/arch/arm/cpu/tegra-common/ap.c b/arch/ar
On 12/03/2012 04:45 PM, Tom Warren wrote:
> These files are used by both SPL and main U-Boot.
> Also made minor changes to shared Tegra code to support
> T30 differences.
> diff --git a/arch/arm/cpu/tegra-common/ap.c b/arch/arm/cpu/tegra-common/ap.c
> + case CHIPID_TEGRA30:
> + sw
On Tue, Dec 4, 2012 at 3:43 PM, Stephen Warren wrote:
> On 12/04/2012 01:22 PM, Tom Warren wrote:
>> Stephen,
>>
>> On Mon, Dec 3, 2012 at 5:53 PM, Stephen Warren wrote:
>>> On 12/03/2012 04:45 PM, Tom Warren wrote:
This build is stripped down. It boots to the command prompt.
GPIO is th
Hi all,
I run into an NFS issue when trying to load two files from nfs for
booting (uImage and device tree binary):
When I try to unmount after loading the first file, I get some timeouts
from the host which will lead to a re-send of the message.
Eventually I get a response from the host, but
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 12/05/12 12:28, Stefan Roese wrote:
> Hi Tom,
>
> I have collected my powerpc/mpc5200 SPL patch series in my staging
> branch for you to pull. After rebasing it on top of latest master.
> This series has been sitting on the list for quite some time
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 12/05/12 13:06, Lukasz Majewski wrote:
> Several fixes for ext4write command including: - compiler warnings
> suppress - lldiv() and do_div() instead of "plain" / and %
> operands for 64-32 bits - Proper initialization of dev_desc -
> Proper definit
Several fixes to suppress compiler's (eldk-5.[12].x gcc 4.6)
warning [-Wunused-but-set-variable]
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
---
fs/ext4/ext4_common.c | 14 ++
fs/ext4/ext4_journal.c |3 +--
fs/ext4/ext4fs.c |3 ---
3 files changed,
The filename buffer is allocated dynamically. It must be cache aligned.
Moreover, it is necessary to erase its content before we use it for
file name operations.
This prevents from corruption of written file names.
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
---
fs/ext4/ext4fs.
The device block descriptor (block_dev_desc_t) )shall be stored at
ext4 early code (at ext4fs_set_blk_dev in this case) to be available
for latter use (like put_ext4()).
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
---
fs/ext4/dev.c |1 +
1 files changed, 1 insertions(+), 0 d
The ext4write code has been using direct calls to 64-32 division
(/ and %).
Officially supported u-boot toolchains (eldk-5.[12].x) generate calls
to __aeabi_uldivmod(), which is niether defined in the toolchain libs
nor u-boot source tree.
Due to that, when the ext4write command has been executed
Several fixes for ext4write command including:
- compiler warnings suppress
- lldiv() and do_div() instead of "plain" / and % operands for 64-32 bits
- Proper initialization of dev_desc
- Proper definition of cache aligned filename buffer
Lukasz Majewski (4):
fs:ext4:write: Add lldiv and do_div
Hi Tom,
I have collected my powerpc/mpc5200 SPL patch series in my
staging branch for you to pull. After rebasing it on top of
latest master. This series has been sitting on the list for
quite some time now. And I have some patches pending relying
on this patchset.
Thanks,
Stefan
The following
Hello,
A customer needs to use PXA166 in one project and I am looking for Linux
support for it. Someone here uses it?
Regards,
--
Otavio Salvador O.S. Systems
E-mail: ota...@ossystems.com.br http://www.ossystems.com.br
Mobile: +55 53 9981-7854 http://pr
Hello all:
I am attempting to recover the ART "Atheros Radio Test" EEPROM data for a
router and am attempting to copy the data from one router to the other, which
may not be the best of ideas, but the two boards are identical and purchased at
the same time...
The command "progmac" seems to be b
Hello Vipin,
I have prepared this patch after the work I have done for the new
asic which embeds the I2C designware IP configured with the
stop bit controlled by s/w.
I quickly tested it on both this asic AND the SPEAr1340, but if
you can quickly check yourself would be good.
I think that this p
This patch adds the capability to switch between 10
different I2C busses (from 0 to 9).
Signed-off-by: Armando Visconti
---
drivers/i2c/designware_i2c.c | 82 +-
1 files changed, 81 insertions(+), 1 deletions(-)
diff --git a/drivers/i2c/designware_i2c.c
There are three couple (hcnt/lcnt) of registers for each
speed (SS/FS/HS). The driver needs to set the proper couple
of regs according to what speed we are setting.
Signed-off-by: Armando Visconti
---
drivers/i2c/designware_i2c.c | 28 +---
1 files changed, 13 insertion
In the newer versions of designware i2c IP there is the possibility
of configuring it with IC_EMPTYFIFO_HOLD_MASTER_EN=1, which basically
requires the s/w to generate the stop bit condition directly, as
the h/w will not automatically generate it when TX_FIFO is empty.
To avoid generation of an ext
This patch initialises and enables dwmmc channels 0 and 2 for SMDK5250.
It also initialises the pinmux for the same.
Signed-off-by: Amarendra Reddy
---
board/samsung/smdk5250/smdk5250.c | 22 +-
include/configs/smdk5250.h|4 ++--
2 files changed, 23 insertions(+
The current implementation of fifo size computation was giving improper
values for eMMC channel. Modified the computation as per user manual.
Signed-off-by: Amarendra Reddy
---
drivers/mmc/dw_mmc.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/d
This patch initialises the local variable 'shift' to zero to avoid
improper extraction of ratio and pre-ratio divider values. Extraction of
improper values was happening due to garbage value present in local variable.
Signed-off-by: Amarendra Reddy
---
arch/arm/cpu/armv7/exynos/clock.c |4 ++
This patch defines the call back required by dw mmc driver to get the
clock value. It also adds function to set the dw mmc clock divider ratio.
Signed-off-by: Amarendra Reddy
---
drivers/mmc/exynos_dw_mmc.c | 14 +-
1 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/dr
This patch set enables the dwmmc for Exynos5250 on SMDK5250.
Also does the required driver changes.
This patch set is based on:
"EXYNOS: mmc: support DesignWare Controller for Samsung-SoC"
"Exynos: clock: support get_mmc_clk for exynos"
Amar (4):
MMC: DWMMC: Modified fifo size computation
MM
This patch adds fdt support to MAX77686.
Signed-off-by: Rajeshwari Shinde
---
Changes in V2:
- Corrected indentation errors.
drivers/misc/pmic_max77686.c | 35 ++-
1 files changed, 30 insertions(+), 5 deletions(-)
diff --git a/drivers/misc/pmic_max77686
Add device node for MAX77686
Signed-off-by: Rajeshwari Shinde
---
Changes in V2:
- Changed reg value from 06 to 6.
board/samsung/dts/exynos5250-smdk5250.dts |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/s
Add required compatible information for PMIC
Signed-off-by: Rajeshwari Shinde
Acked-by: Simon Glass
---
Changes in V2:
- None
include/fdtdec.h |1 +
lib/fdtdec.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index d1
Add FDT support to PMIC MAX77686 chip.
This patch set is based on top of:
"EXYNOS5: Add FDT support to SPI"
Changes in V2:
- Changed chip address from 06 to 6.
- Corrected indentation errors.
Rajeshwari Shinde (3):
EXYNOS5: FDT: Add compatible strings for PMIC
EXYNOS5: Add de
Dear Rajeshwari,
On 05/12/12 19:46, Minkyu Kang wrote:
> API's for GPIO pin numbering support are added to the generic S5P
> gpio driver
>
> Signed-off-by: Leela Krishna Amudala
> Signed-off-by: Simon Glass
> Signed-off-by: Rajeshawari Shinde
> ---
> drivers/gpio/s5p_gpio.c | 158
> +
On 05/12/12 20:10, Minkyu Kang wrote:
> Update pinmux by calling generic gpio_* functions instead s5p_gpio_*
> functions
>
> Signed-off-by: Leela Krishna Amudala
> Signed-off-by: Rajeshwari Shinde
> ---
> arch/arm/cpu/armv7/exynos/pinmux.c | 150
> +++-
> 1 file
This patch adds FDT support to the SPI driver.
Signed-off-by: Simon Glass
Signed-off-by: Rajeshwari Shinde
---
Changes in V2:
- None.
drivers/spi/exynos_spi.c | 96 +++---
1 files changed, 90 insertions(+), 6 deletions(-)
diff --git a/drivers/s
Add SPI device node data for exynos.
Signed-off-by: Rajeshwari Shinde
---
Changes in V2:
- Added device node for ISP-SPI channels and documentation for same.
arch/arm/dts/exynos5250.dtsi| 41 +++
doc/device-tree-bindings/exynos/isp-spi.txt | 22
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