On 02/12/2013 04:29:56 PM, Simon Glass wrote:
Hi Scott,
On Tue, Feb 12, 2013 at 12:38 PM, Scott Wood
scottw...@freescale.com wrote:
On 02/08/2013 09:12:14 AM, Simon Glass wrote:
This enables generic board support so that ppc boards can define
CONFIG_SYS_GENERIC_BOARD.
Signed-off-by:
Hi Scott,
On Tue, Feb 12, 2013 at 2:32 PM, Scott Wood scottw...@freescale.com wrote:
On 02/08/2013 09:12:12 AM, Simon Glass wrote:
#ifndef CONFIG_SPL_BUILD
static int reserve_stacks(void)
{
+#ifdef CONFIG_PPC
+ ulong *s;
+#endif
+
/* setup stack pointer for exceptions
On 02/12/2013 04:41:15 PM, Simon Glass wrote:
Hi Scott,
On Tue, Feb 12, 2013 at 2:32 PM, Scott Wood scottw...@freescale.com
wrote:
On 02/08/2013 09:12:12 AM, Simon Glass wrote:
#ifndef CONFIG_SPL_BUILD
static int reserve_stacks(void)
{
+#ifdef CONFIG_PPC
+ ulong *s;
+#endif
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 02/12/2013 05:10 PM, Daniel Schwierzeck wrote:
Hi Tom,
The following changes since commit
58864ddc7276ca7403ddbb716da5853638f37519:
Clean up libfdt.h includes (2013-02-08 22:32:38 -0500)
are available in the git repository at:
On 12/02/13 17:58, Piotr Wilczek wrote:
From: Lukasz Majewski l.majew...@samsung.com
This patch enables new ums command on Trats board
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park
Hi Simon,
It looks good to me.
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
On 02/09/2013 01:48 AM, Simon Glass wrote:
Hi,
On Sun, Dec 16, 2012 at 7:44 PM, Simon Glass s...@chromium.org wrote:
Hi,
On Sun, Dec 16, 2012 at 6:12 PM, Jaehoon Chung jh80.ch...@samsung.com
wrote:
On
Hi All,
Please do let me know if any comments on this patch set.
--
Regards,
Rajeshwari Shinde
On Wed, Jan 23, 2013 at 3:37 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
This patch set seperates setting PMIC values form previous
Convert lowlevel_init.S to .c patch set.
These patches
Hi,
Please do let me know if any comments on this patch set.
--
Regards,
Rajeshwari Shinde
On Wed, Jan 23, 2013 at 12:00 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
This patch set adds driver for Gigabyte device GD25LQ and GD25Q64B
required for Snow board and enables same in config
Hi Minkyu Kang,
Thank you foe comments,
On Tue, Feb 12, 2013 at 2:21 PM, Minkyu Kang mk7.k...@samsung.com wrote:
Dear Rajeshwari,
On 01/02/13 14:39, Rajeshwari Shinde wrote:
This patch adds the DTS file for Snow Board.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes
Dear Rajeshwari,
On 23/01/13 19:07, Rajeshwari Shinde wrote:
This patch adds a function to set ps_hold data driving value high.
This enables the machine to stay powered on after the initial
power-on condition goes away(e.g. power button).
Acked-by: Simon Glass s...@chromium.org
Add nvidia,tegra114-spi to represent t114 SPI controller hardware.
Signed-off-by: Allen Martin amar...@nvidia.com
---
include/fdtdec.h |1 +
lib/fdtdec.c |1 +
2 files changed, 2 insertions(+)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 77f244f..1b20f72 100644
---
Remove non fdt support from tegra20 and tegra30 SPI drivers in
preparation of new common fdt based SPI driver front end.
Signed-off-by: Allen Martin amar...@nvidia.com
---
drivers/spi/tegra20_spi.c | 12
drivers/spi/tegra30_spi.c | 29 -
2 files
Turn on SPI in dalmore config file
Signed-off-by: Allen Martin amar...@nvidia.com
---
include/configs/dalmore.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h
index ce32c80..e7df60b 100644
--- a/include/configs/dalmore.h
This series pulls fdt functionality from the existing tegra20 and
tegra30 SPI drivers into a new common fdt SPI driver front end,
then adds a new tegra114 SPI driver as an additional client of
the fdt SPI driver.
Allen Martin (14):
tegra: spi: rename tegra SPI drivers
tegra: spi: remove non
Configure pinmux for SPI4 controller.
Signed-off-by: Allen Martin amar...@nvidia.com
---
board/nvidia/dalmore/pinmux-config-dalmore.h |9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/board/nvidia/dalmore/pinmux-config-dalmore.h
Dalmore has a SPI flash part attached to controller 4, so enable
controller 4 and set to 25MHz.
Signed-off-by: Allen Martin amar...@nvidia.com
---
board/nvidia/dts/tegra114-dalmore.dts |5 +
1 file changed, 5 insertions(+)
diff --git a/board/nvidia/dts/tegra114-dalmore.dts
Add nodes for t114 SPI controller hardware
Signed-off-by: Allen Martin amar...@nvidia.com
---
arch/arm/dts/tegra114.dtsi | 72
1 file changed, 72 insertions(+)
diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi
index
Make the tegra20 SPI driver similar to the tegra30 (and soon to be
tegra114) SPI drivers in preparation of common fdt SPI driver front
end.
Signed-off-by: Allen Martin amar...@nvidia.com
---
drivers/spi/tegra20_spi.c | 110 +++--
1 file changed, 67
Add node for clock and reset controller hardware.
Signed-off-by: Allen Martin amar...@nvidia.com
---
arch/arm/dts/tegra114.dtsi |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi
index d06cd12..bd969aa 100644
---
Add node for apbdma controller hardware.
Signed-off-by: Allen Martin amar...@nvidia.com
---
arch/arm/dts/tegra114.dtsi | 37 +
1 file changed, 37 insertions(+)
diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi
index bd969aa..f8b4605
Move register structs from headers into .c files and use common name.
This is in preparation of making common fdt front end for SPI
drivers.
Signed-off-by: Allen Martin amar...@nvidia.com
---
arch/arm/include/asm/arch-tegra20/tegra20_spi.h | 13 -
Add a common interface to fdt based SPI drivers. Each driver is
represented by a table entry in fdt_spi_drivers[]. If there are
multiple SPI drivers in the table, the first driver to return success
from spi_init() will be registered as the SPI driver.
Signed-off-by: Allen Martin
Add support for Winbond W25Q32DW 32Mbit part
Signed-off-by: Allen Martin amar...@nvidia.com
---
drivers/mtd/spi/winbond.c |5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/mtd/spi/winbond.c b/drivers/mtd/spi/winbond.c
index f6aab3d..9156957 100644
---
Add driver for tegra114 SPI controller. This controller is not
compatible with either the tegra20 or tegra30 controllers, so it
requires a new driver.
Signed-off-by: Allen Martin amar...@nvidia.com
---
arch/arm/include/asm/arch-tegra114/tegra114_spi.h | 91 ++
drivers/spi/Makefile
Rename tegra SPI drivers to tegra20_spi and tegra30_spi in preparation
for commonization and addition of tegra114_spi.
Signed-off-by: Allen Martin amar...@nvidia.com
---
arch/arm/include/asm/arch-tegra/tegra_slink.h | 84 --
arch/arm/include/asm/arch-tegra/tegra_spi.h | 75 -
Based on 'master' branch of u-boot-samsung.
Changes from v1:
- Added patch to fix problem of multiple FDT decode.
- Addressing warnings when compiling non-dt way.
Vivek Gautam (2):
usb: ehci: exynos: Fix multiple FDT decode
usb: ehci: exynos: Enable non-dt path
With current FDT support driver tries to parse device node
twice in ehci_hcd_init() and ehci_hcd_stop(), which shouldn't
happen ideally.
Making provision to store data in a global structure and thereby
passing its pointer when needed.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
This
Enabling the non-dt path for the driver so that
we don't get any build errors for non-dt configuration.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
drivers/usb/host/ehci-exynos.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git
These patches add PMIC MAX77686 voltage settings for SMDK5250.
Changes in V2:
- Corrected the multi line comment style
Changes in V3:
- Renamed the ps hold function.
Rajeshwari Shinde (2):
EXYNOS5: Add function to setup set ps hold
SMDK5250: Add PMIC voltage settings
This patch adds a function to set ps_hold data driving value high.
This enables the machine to stay powered on even after the initial
power-on condition goes away(e.g. power button).
Acked-by: Simon Glass s...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in
This patch adds required pmic voltage settings for SMDK5250.
Acked-by: Simon Glass s...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Corrected the multi line comment style
Changes in V3:
- None
board/samsung/smdk5250/smdk5250.c |
Compiling for non-dt systems gives folowing warning:
smdk5250.c: In function 'board_eth_init':
smdk5250.c:152:6: warning: unused variable 'node' [-Wunused-variable]
Declare variable 'node' only for dt enabled systems to remove this
warning.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Enclosing process_nodes() and spi_get_config() inside
CONFIG_OF_CONTROL, since they are compiled only for DT systems.
This fixes following warning:
exynos_spi.c:391:12: warning: 'process_nodes' defined but not used
[-Wunused-function]
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Hi Sir,
I am Sadashiva Reddy working in Mistral Solutions Pvt Ltd.
I am using AMCC PPC440Gx processor for our project presently the board is
working with vxWorks.
But our customer new requirement is same board should be ported with linux
but porting time is very less.
So, I am asking the help
Hi Andy, Tom,
this patchset is 2 months old.
Can you please address it?
On 12/03/2012 02:19 PM, Nikita Kiryanov wrote:
This patchset implements card detection and write protection check for omap mmc.
The write protect implementation also adds generic code that is usable by other
mmc drivers.
Adding CPU detection support for the DRA752 ES1.0 soc.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: R Sricharan r.sricha...@ti.com
---
arch/arm/cpu/armv7/omap-common/hwinit-common.c |9 +++--
arch/arm/cpu/armv7/omap5/hwinit.c |3 +++
DRA752 uses DDR3. Populating the corresponding structures
with DDR3 data.
Writing into MA registers if only MA is present in that soc.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: R Sricharan r.sricha...@ti.com
---
arch/arm/cpu/armv7/omap-common/emif-common.c |2 +-
PRCM register addresses are changed from OMAP5 ES2.0 to DRA7XX.
So adding the necessary register changes for DRA7XX socs.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: R Sricharan r.sricha...@ti.com
---
arch/arm/cpu/armv7/omap4/hw_data.c |2 +-
Control module register addresses are changed from OMAP5
to DRA7XX socs.
So adding the necessary changes for the same.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: R Sricharan r.sricha...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c |5 ++-
A new DPLL DDR is added in DRA7XX socs. Now clocks to
EMIF CD is from DPLL DDR. So DPLL DDR should be locked
before initializing RAM.
Also adding other dpll data which are different from OMAP5 ES2.0.
SYS_CLK running at 20MHz is introduced in DRA7xx socs.
Signed-off-by: Lokesh Vutla
DRA7XX is a high-performance, infotainment application device,
based on enhanced OMAP architecture integrated on a 28-nm technology.
This series adds support for DRA7XX family Socs and the data for
DRA752 ES1.0 soc.
This is on top of OMAP5 ES2.0 series
Adding new board files for DRA7XX socs.
The pad registers layout is changed completely from OMAP5
So introducing the new structure here and also adding the
minimal data.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Nishant Kamat nska...@ti.com
Signed-off-by: R Sricharan
Adding the build support for dra7xx_evm.
Reusing omap5_evm.h config by moving it to omap5_common.h
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: R Sricharan r.sricha...@ti.com
---
boards.cfg |1 +
include/configs/dra7xx_evm.h
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