Dear Naveen,
On 10/14/2013 08:06 AM, Heiko Schocher wrote:
Hello Naveen,
Am 30.09.2013 08:58, schrieb Naveen Krishna Chatradhi:
This enables CONFIG_SYS_I2C on Samsung, updating existing s3c24x0
i2c driver to support this.
Note: Not for merge, Just for review and suggestions.
Signed-off-by: N
Dear pshambhu,
In message <1383894946586-167013.p...@n7.nabble.com> you wrote:
>
> In u-boot i am passing mtdargs in RW mode only. but still i am unable
> to change the values.Yeah its true that mtd4 device is in READ only mode,
> but how can i change the access permission of the device, so
Dear Heiko,
In message <527c7716.8060...@denx.de> you wrote:
>
> > You, you can use a mailing list for submitting such information, but I
> > doubt that it would be efficient. And I definitely do not want to see
> > this on the current U-Boot ML.
>
> Ok, let us discuss the way we collect such i
Hi,
In u-boot i am passing mtdargs in RW mode only. but still i am unable
to change the values.Yeah its true that mtd4 device is in READ only mode,
but how can i change the access permission of the device, so that i can
set/change the u-boot environment variable values from the Linux platfo
Hello Wolfgang,
Am 08.11.2013 07:20, schrieb Wolfgang Denk:
Dear Heiko,
In message<527c767d.3070...@denx.de> you wrote:
Yes, this is perfectly fine. I just want to allow this at _any_ time,
not only once per release (near the end of the release cycle).
especially for releases where bigger
Hi!
1) Is there specific reason why mmc configurations were dropped from this
includ/configs/am335x_evm.h?
2) Why partition number 7 has been skipped in DFU_ALT_INFO_NAND definition
in above file?
-Matti
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U-Boot mailing list
U-Boot@lists.denx.de
http
>
> On Nov 7, 2013, at 9:03 PM, FengHua wrote:
>>>
>> I have verified these two changes on Foudation Model. It's ok, very fast.
>>
>
I have verified this change on emulator, too. I have to enable i-cache first to
speed it up.
York
___
U-
Dear Heiko,
In message <527c767d.3070...@denx.de> you wrote:
>
> > Yes, this is perfectly fine. I just want to allow this at _any_ time,
> > not only once per release (near the end of the release cycle).
> > especially for releases where bigger changes get merged it may be
> > precious informati
Hi Tom,
On Thursday 07 November 2013 08:33 PM, Tom Rini wrote:
> On Thu, Nov 07, 2013 at 08:17:39PM +0530, Sricharan R wrote:
>
>> Currently the DDR3 memory on DRA7 ES1.0 evm board is enabled using
>> software leveling. This was done since hardware leveling was not
>> working. Now that the right s
Hello Wolfgang,
Am 07.11.2013 20:26, schrieb Wolfgang Denk:
Dear Tom,
In message<20131107133159.GR5925@bill-the-cat> you wrote:
I feel this is the hard part of the problem, and what we're glossing
over. What has to be tested by the board maintainer? What are we going
to leave to their disc
Hello Wolfgang,
Am 07.11.2013 20:19, schrieb Wolfgang Denk:
Dear Heiko Schocher,
In message<527b8c7f.6060...@denx.de> you wrote:
All you want to do here is feed a database with data. This is not
what mailing lists were made for, so we should really use a more
appropriate interface.
Ok. B
Hello Wolfgang,
Am 07.11.2013 20:15, schrieb Wolfgang Denk:
Dear Heiko,
In message<527b8ba7.2070...@denx.de> you wrote:
Agreed too. I doubt if a mailing list makes sense to collect such
data. It would probably be more efficient to provide a web based
service for this. It just has to be easy
Dear "Saridakis, Dean (US SSA)",
In message <20131107230556.589fc4a...@theia.denx.de> you wrote:
>
> It looks U-Boot is generally built using soft float. I need
correct.
> hard-float in my system. Is this a general enough need that it'd make
> sense to have a CONFIG_SYS_HARD_FLOAT to enable this
Hello Tom,
Am 07.11.2013 14:31, schrieb Tom Rini:
On Thu, Nov 07, 2013 at 10:37:24AM +0100, Andreas Bie?mann wrote:
Hello all together,
On 11/07/2013 09:17 AM, Heiko Schocher wrote:
Am 06.11.2013 08:50, schrieb Wolfgang Denk:
[snip]
So when you're once again doing some change that requires
From: Shaohui Xie
Signed-off-by: Shaohui Xie
---
include/configs/P4080DS.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h
index b0cd7d5..2f89008 100644
--- a/include/configs/P4080DS.h
+++ b/include/configs/P4080DS.h
@@ -17,6 +17,1
Hi, experts:
There is a raise() function implementation in Arch/arm/lib/eabi_compat.c
.
So, it is usually callbed by div0 from the c compiler libgcc ?
If uboot output "raise: Signal ...", is it caused by division-by-zero ?
Best wishes,
___
U-Bo
Erass sequence:
1. check if erase command is support by card. If not return.
2. Check the erase range to see if it was aligned. The min erase size
should be one erase group. SD card it was one block(512), mmc card
it should be one erase group.
3. If not, aligned the erase rang according to the eras
Esdhc host version number is incorrect in host capacity register.
The value read from was 0x14. Correct it to 0x13.
Signed-off-by: Haijun Zhang
---
Change for V2:
- No changes
arch/powerpc/include/asm/config_mpc85xx.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/incl
Abandon this, see [PATCH 7/7 V2] powerpc/esdhc: Update esdhc command
execution process
于 2013/11/8 10:06, Haijun Zhang 写道:
> The max timeout value esdhc host can accept was about 2.69 sec
> At 50 Mhz SD_CLK period, the max busy timeout
> value = 2^27 * SD_CLK period ~= 2.69 sec.
>
> In case eras
If the block rang was not algined, We tried to algined the range,
then erase the block. So the block range erased should be less or
equal to the block range send. If error occured during erase procedure
part of them will be erased. And use should resend the block rang to
continue erase the reset of
Read command class from csd register and secure erase
support bit from ext csd register. Also calculate the erase
timeout and secure erase timeout.
If read ext csd error, error status should be returned instead of
give some incorrect information.
Error log:
=>
=> mmcinfo
Device: FSL_SDHC
Manufact
The max timeout value esdhc host can accept was about 2.69 sec
At 50 Mhz SD_CLK period, the max busy timeout
value = 2^27 * SD_CLK period ~= 2.69 sec.
In case erase command CMD38 timeout is caculate by
mult * 300ms * num(unit by erase group), so the time one erase
group need should be more than 3
Once mmc initialization was faild has_init should be set to 0,
prepard for the next initialization to recover from error.
Once mmcinfo command failed error should point out instead of print
incorrect mmc device information.
Error log:
=> mmcinfo
Device: FSL_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tr
It looks U-Boot is generally built using soft float. I need hard-float in my
system. Is this a general enough need that it'd make sense to have a
CONFIG_SYS_HARD_FLOAT to enable this option?
I made a quick update for mpc85xx (guarded by CONFIG_SYS_HARD_FLOAT) and I seem
to be running fine.
Than
The max timeout value esdhc host can accept was about 2.69 sec
At 50 Mhz SD_CLK period, the max busy timeout
value = 2^27 * SD_CLK period ~= 2.69 sec.
In case erase command CMD38 timeout is caculate by
mult * 300ms * num(unit by erase group), so the time one erase
group need should be more than 3
Add command class define.
Add mmc erase and secure erase define.
Add secure erase and trim support bit define.
Signed-off-by: Haijun Zhang
---
changes for V2:
- Changed the comment, no other change
include/mmc.h | 50 +-
1 file changed, 49
Hi, Jaehoon
? 2013/11/8 9:15, Jaehoon Chung ??:
Dear Haijun,
On 11/05/2013 03:23 PM, Haijun Zhang wrote:
Add command class define.
Add mmc erase and secure erase define.
Add secure erase and trim support bit define.
Signed-off-by: Haijun Zhang
---
include/mmc.h | 49 ++
Hello, Andreas.
I already posted a patch to fix this issue.
http://patchwork.ozlabs.org/patch/285071/
Tom, when would be possible to apply my patch?
Best Regards
Masahiro Yamada
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Dear Haijun,
Check the below message, plz.
cmd_mmc.c: In function ‘do_mmcops’:
cmd_mmc.c:405:5: warning: comparisons like ‘X<=Y<=Z’ do not have their
mathematical meaning [-Wparentheses]
cmd_mmc.c:406:5: warning: comparisons like ‘X<=Y<=Z’ do not have their
mathematical meaning [-Wparentheses]
Dear Haijun,
On 11/05/2013 03:23 PM, Haijun Zhang wrote:
> Add command class define.
> Add mmc erase and secure erase define.
> Add secure erase and trim support bit define.
>
> Signed-off-by: Haijun Zhang
> ---
> include/mmc.h | 49 +
> 1 file ch
On Tue, 2013-10-15 at 11:34 +0800, feng...@phytium.com.cn wrote:
> +/*
> + * void __asm_flush_dcache_level(level)
> + *
> + * clean and invalidate one level cache.
> + *
> + * x0: cache level
> + * x1~x9: clobbered
> + */
> +ENTRY(__asm_flush_dcache_level)
> + lsl x1, x0, #1
> + msr
Add a check for the gpio_request() function return value and do not try
to configure the GPIO if the gpio_request() call fails.
Also, print an error message indicating the gpio_request() has failed.
Signed-off-by: Igor Grinberg
---
drivers/misc/gpio_led.c | 6 +-
1 file changed, 5 insertions
On Thu, 24 Oct 2013 20:00:41 +0200
Andre Heider wrote:
...
> @@ -90,6 +94,7 @@ void lcd_ctrl_init(void *lcdbase)
>
> w = msg_setup->physical_w_h.body.resp.width;
> h = msg_setup->physical_w_h.body.resp.height;
> + bcm2835_pitch = msg_setup->pitch.body.resp.pitch;
>
> debu
Some GPIO connected LEDs have inverted polarity.
Introduce new config option: CONFIG_GPIO_LED_INVERTED_TABLE for the
specifying the inverted GPIO LEDs list and add support for this in the
gpio_led driver.
Signed-off-by: Igor Grinberg
---
README | 7 +++
drivers/misc/gpio_le
The CONFIG_GPIO_LED symbol does not have any documentation in the README
file. Document the CONFIG_GPIO_LED symbol.
Signed-off-by: Igor Grinberg
---
README | 8
1 file changed, 8 insertions(+)
diff --git a/README b/README
index 09662a4..55c71fa 100644
--- a/README
+++ b/README
@@ -1951
This simple series enhances the gpio_led driver a bit by
some documentation, checking the return value of gpio_request() call,
and finally adding support for inverted polarity GPIOs.
Igor Grinberg (3):
README: document the CONFIG_GPIO_LED symbol
gpio_led: check gpio_request() return value
gp
On 10/14/2013 08:34 PM, feng...@phytium.com.cn wrote:
> From: David Feng
>
> Relocation code based on a patch by Scott Wood, which is:
> Signed-off-by: Scott Wood
>
> Signed-off-by: David Feng
> ---
> arch/arm/config.mk |3 +-
> arch/arm/cpu/armv8/Makefile
On 11/07/2013 06:29 AM, Albert ARIBAUD wrote:
> Hi Andre,
>
> On Wed, 23 Oct 2013 21:46:31 +0200, Andre Heider
> wrote:
>
>> On Wed, Oct 23, 2013 at 05:54:13PM +0100, Stephen Warren wrote:
>>> On 10/22/2013 09:27 PM, Andre Heider wrote:
Add the missing "right" field to struct bcm2835_mbox_t
On Thu, Nov 07, 2013 at 04:16:40PM -0500, Tom Rini wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 11/07/2013 04:12 PM, Vaibhav Bedia wrote:
> > Hi Tom,
> >
> > On Thu, Nov 7, 2013 at 11:42 AM, Tom Rini wrote:
> >> Based on the definitive guide to EMIF configuration[1] certain re
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/07/2013 04:12 PM, Vaibhav Bedia wrote:
> Hi Tom,
>
> On Thu, Nov 7, 2013 at 11:42 AM, Tom Rini wrote:
>> Based on the definitive guide to EMIF configuration[1] certain registers
>> that we have been modifying (and are documented registers) shou
On Thu, Nov 7, 2013 at 4:06 PM, Tom Rini wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 11/07/2013 03:56 PM, Vaibhav Bedia wrote:
>> Hi Tom,
>>
>> On Wed, Nov 6, 2013 at 4:37 PM, Tom Rini wrote:
>>> +
>>> + if (header->magic != 0xEE3355AA) {
>>
>> Why is the
Hi Tom,
On Thu, Nov 7, 2013 at 11:42 AM, Tom Rini wrote:
> Based on the definitive guide to EMIF configuration[1] certain registers
> that we have been modifying (and are documented registers) should be
> left in their reset values rather than modified. This has been tested
> on AM335x GP EVM an
Hi Lokesh,
On Thu, Nov 7, 2013 at 8:43 AM, Lokesh Vutla wrote:
> Hi Vaibhav,
> On Wednesday 06 November 2013 06:10 PM, Vaibhav Bedia wrote:
>> On Mon, Nov 4, 2013 at 11:20 PM, Lokesh Vutla wrote:
>>> Selecting the Master osc clk as Timer2 clock source.
>>
>> I obviously missed the first round of
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/07/2013 03:56 PM, Vaibhav Bedia wrote:
> Hi Tom,
>
> On Wed, Nov 6, 2013 at 4:37 PM, Tom Rini wrote:
>> +
>> + if (header->magic != 0xEE3355AA) {
>
> Why is the header the same as AM335x? Shouldn't it be something
> li
Dear Tom,
In message <20131107205133.GT5925@bill-the-cat> you wrote:
>
> What we need to be careful of here is making sure whatever we grow is
> both useful and not overly complicated. What I honestly wonder about is
> automated testing for commands (crc32 pops to mind only because I just
> fixe
Hi Tom,
On Wed, Nov 6, 2013 at 4:37 PM, Tom Rini wrote:
> +
> + if (header->magic != 0xEE3355AA) {
Why is the header the same as AM335x? Shouldn't it be something
like 0xEE3344AA or whatever?
>>> No, the header is still same. It is 0xEE3355AA.
>>>
>>
>> My question wa
On Thu, Nov 07, 2013 at 08:26:57PM +0100, Wolfgang Denk wrote:
> Dear Tom,
>
> In message <20131107133159.GR5925@bill-the-cat> you wrote:
> >
> > I feel this is the hard part of the problem, and what we're glossing
> > over. What has to be tested by the board maintainer? What are we going
> > t
Dear Tom,
In message <20131107133159.GR5925@bill-the-cat> you wrote:
>
> I feel this is the hard part of the problem, and what we're glossing
> over. What has to be tested by the board maintainer? What are we going
> to leave to their discretion? Will am335x_evm not count if I don't dig
> up t
Dear Heiko Schocher,
In message <527b8c7f.6060...@denx.de> you wrote:
>
> > All you want to do here is feed a database with data. This is not
> > what mailing lists were made for, so we should really use a more
> > appropriate interface.
>
> Ok. But this status report can be in readable text fo
Dear Heiko,
In message <527b8ba7.2070...@denx.de> you wrote:
>
> > Agreed too. I doubt if a mailing list makes sense to collect such
> > data. It would probably be more efficient to provide a web based
> > service for this. It just has to be easy to submit reports, and to
> > query the status for
Hi Alexey,
On Thu, 7 Nov 2013 17:52:18 +0400, Alexey Brodkin
wrote:
> As it is stated in DesignWare I2C databook: writes to IC_TAR (0x4)
> register succeed only when IC_ENABLE[0] is set to 0.
>
> Signed-off-by: Alexey Brodkin
>
> Cc: Tom Rini
> cc: Armando Visconti
> Cc: Stefan Roese
> Cc
Based on the definitive guide to EMIF configuration[1] certain registers
that we have been modifying (and are documented registers) should be
left in their reset values rather than modified. This has been tested
on AM335x GP EVM and Beaglebone White.
[1]: http://processors.wiki.ti.com/index.php/A
This adds a README to help with understanding of this series.
Signed-off-by: Simon Glass
---
Changes in v6:
- Rename platform_data to platdata
- Revise and update README
Changes in v5: None
Changes in v4: None
Changes in v3:
- Updated README.txt to cover changes since version 2
Changes in v2:
-
Sandbox uses an emulated memory map which is quite small. We don't need the
CONFIG_PHYS_64BIT option since we can address memory with a 32-bit offset
into our ram_buf.
Adjust the phys_addr_t and phys_size_t types accordingly.
Signed-off-by: Simon Glass
---
Changes in v6: None
Changes in v5: None
Add some tests of driver model functionality. Coverage includes:
- basic init
- binding of drivers to devices using platform_data
- automatic probing of devices when referenced
- availability of platform data to devices
- lifecycle from bind to probe to remove to unbind
- renumbering within a ucla
Add driver model support for GPIOs. Since existing GPIO drivers do not use
driver model, this feature must be enabled by CONFIG_DM_GPIO. After all
GPO drivers are converted over we can perhaps remove this config.
Tests are provided for the sandbox implementation, and are a sufficient
sanity check
This command is not required for driver model operation, but can be useful
for testing. It provides simple dumps of internal data structures.
Signed-off-by: Simon Glass
Signed-off-by: Marek Vasut
Signed-off-by: Pavel Herrmann
Signed-off-by: Viktor Křivák
Signed-off-by: Tomas Hlavacek
---
Chan
Very often a constant pointer is passed to this function, so we should
declare this, since map_to_sysmem() does not change the pointer.
Signed-off-by: Simon Glass
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/sandbox/include/asm/io.
The recent timer refactor caused sandbox to fail to build with an error.
lib/libgeneric.o: In function `get_ticks':
/home/sjg/c/src/third_party/u-boot/files/lib/time.c:45: undefined reference to
`timer_read_counter'
Add a definition for timer_read_counter() to avoid this.
Signed-off-by: Simon G
Now that named GPIO banks are supported, along with a way of obtaining
the status of a GPIO (input or output), we can provide an enhanced
GPIO command for driver model. Where the driver provides its own operation
for obtaining the GPIO state, this is used, otherwise a generic version
is sufficient.
Make driver model available after relocation, by setting up data structures
and scanning for devices using compiled-in platform_data and (when available)
the device tree.
Signed-off-by: Simon Glass
---
Changes in v6:
- Rename platform_data to platdata
Changes in v5: None
Changes in v4: None
Chan
There are a few warnings in this file when building for sandbox. Addresses
coming from the device tree need to be treated as ulong as elsewhere in
U-Boot and we must use map_sysmem() to convert to a pointer when needed.
Signed-off-by: Simon Glass
---
Changes in v6: None
Changes in v5: None
Change
As an example of how to write a uclass and a driver, provide a demo version
of each, accessible through the 'demo' command.
To use these with driver model, define CONFIG_CMD_DEMO and CONFIG_DM_DEMO.
The two demo drivers are enabled with CONFIG_DM_DEMO_SIMPLE and
CONFIG_DM_DEMO_SHAPE.
Signed-off-
Add support for building a device tree for sandbox's CONFIG_OF_HOSTFILE
option to make it easier to use device tree with sandbox.
This adjusts the Makefile to build a u-boot.dtb file which can be passed
to sandbox U-Boot with:
./u-boot -d u-boot.dtb
Signed-off-by: Simon Glass
---
Changes in
U-Boot now uses errors defined in include/errno.h which are negative
integers. Commands which fail need to report the error and return 1
to indicate failure. Add this functionality in cmd_process_error().
For now this merely reports the error number. It would be possible
also to produce a helpful
Convert sandbox over to use driver model GPIOs.
Signed-off-by: Simon Glass
---
Changes in v6:
- Rename platform_data to platdata
- Use ofdata_to_platdata feature
Changes in v5: None
Changes in v4: None
Changes in v3:
- Update sandbox GPIO header file comments
Changes in v2: None
arch/sandbox/
Use driver model in sandbox to permit running of driver model unit test.
Signed-off-by: Simon Glass
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
include/configs/sandbox.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/confi
Note: If you are reviewing this code, but don't have a lot of time, please
consider starting with the 'demo' driver (patch 'dm: Add a
demonstration/example driver') since it clearly shows how devices and
uclasses work. Much of this series consists of test code and plumbing, so
is of less interest
On Thu, Nov 7, 2013 at 8:58 AM, Stefano Babic wrote:
> Hi Giuseppe,
>
> On 07/11/2013 13:37, Giuseppe Pagano wrote:
>
+int mx6_rgmii_rework(struct phy_device *phydev)
+{
+ /* To advertise only 10 Mbs */
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x4, 0x61);
+ phy_write(phy
On Thu, Nov 07, 2013 at 08:17:39PM +0530, Sricharan R wrote:
> Currently the DDR3 memory on DRA7 ES1.0 evm board is enabled using
> software leveling. This was done since hardware leveling was not
> working. Now that the right sequence to do hw leveling is identified,
> use it. This is required fo
This patch adds support for USB and enables 'ums' command on Trats2 board.
Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
CC: Minkyu Kang
Acked-by: Jaehoon Chung
---
This patch depends on the lated u-boot-usb/master.
Changes for v3:
- no changes
Changes for v2:
- rebased on cur
This patch add new defines for usb phy for Exynos4x12.
Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
CC: Minkyu Kang
---
Chnages for v3:
- removed unnecessary empty line
Changes for v2:
- no changes
drivers/usb/gadget/regs-otg.h|5 +
drivers/usb/gadget/s3c_udc_otg.
Hi Giuseppe,
On 07/11/2013 13:37, Giuseppe Pagano wrote:
>>> +int mx6_rgmii_rework(struct phy_device *phydev)
>>> +{
>>> + /* To advertise only 10 Mbs */
>>> + phy_write(phydev, MDIO_DEVAD_NONE, 0x4, 0x61);
>>> + phy_write(phydev, MDIO_DEVAD_NONE, 0x9, 0x0c00);
>>> +
>>
>> Why only 10 Mb/s
Hi Giuseppe,
On 07/11/2013 13:37, Giuseppe Pagano wrote:
>>> +int mx6_rgmii_rework(struct phy_device *phydev)
>>> +{
>>> + /* To advertise only 10 Mbs */
>>> + phy_write(phydev, MDIO_DEVAD_NONE, 0x4, 0x61);
>>> + phy_write(phydev, MDIO_DEVAD_NONE, 0x9, 0x0c00);
>>> +
>>
>> Why only 10 Mb/s
Currently the DDR3 memory on DRA7 ES1.0 evm board is enabled using
software leveling. This was done since hardware leveling was not
working. Now that the right sequence to do hw leveling is identified,
use it. This is required for EMIF clockdomain to idle and come back
during lowpower usecases.
Si
When core power domain hits oswr, then DDR3 memories does not come back
while resuming. This is because when EMIF registers are lost, then the
controller takes care of copying the values from the shadow registers.
If the shadow registers are not updated with the right values, then this
results in i
1) Currently the DDR3 memory on DRA7 ES1.0 evm board is enabled using
software leveling. This was done since hardware leveling was not
working. Now that the right sequence to do hw leveling is identified,
use it. This is required for EMIF clockdomain to idle and come back
during lo
Dear Tom Rini,
On 11/07/2013 02:31 PM, Tom Rini wrote:
> On Thu, Nov 07, 2013 at 10:37:24AM +0100, Andreas Bie?mann wrote:
>> Hello all together,
>>
>> On 11/07/2013 09:17 AM, Heiko Schocher wrote:
>>> Am 06.11.2013 08:50, schrieb Wolfgang Denk:
> [snip]
So when you're once again doing some c
Remove the last uses of symbol offsets in ARM U-Boot.
Remove some needless uses of _TEXT_BASE.
Remove all _TEXT_BASE definitions.
Signed-off-by: Albert ARIBAUD
---
Changes in v2:
- fixed use of _rel_dyn_end instead of _end
README | 6 --
arch/arm/cpu/ar
This prevents references to _end from generating absolute
relocation records.
Signed-off-by: Albert ARIBAUD
---
Changes in v2: None
arch/arm/cpu/arm1136/u-boot-spl.lds| 6 +-
arch/arm/cpu/arm920t/ep93xx/u-boot.lds | 5 -
arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
As it is stated in DesignWare I2C databook: writes to IC_TAR (0x4)
register succeed only when IC_ENABLE[0] is set to 0.
Signed-off-by: Alexey Brodkin
Cc: Tom Rini
cc: Armando Visconti
Cc: Stefan Roese
Cc: Albert ARIBAUD
Cc: Heiko Schocher
Cc: Vipin KUMAR
Cc: Tom Rix
Cc: Mischa Jonker
---
Data "offset" is not used directly in case of I2C EEPROM. Istead it is
split into "block number" and "offset within mentioned block". Which are
"addr[0]" and "addr[1]" respectively.
Signed-off-by: Alexey Brodkin
Cc: Jean-Christophe PLAGNIOL-VILLARD
cc: Peter Tyser
Cc: Heiko Schocher
Cc: Wolfg
This delay applies to any data transfer on I2C bus.
For example 1kB data read with per-byte access (which happens if
environment is stored in I2C EEPROM) takes more than 10 seconds.
Moreover data bus driver has to care about bus state and data transfer,
but not about internal states of attached d
Hi Vaibhav,
On Wednesday 06 November 2013 06:10 PM, Vaibhav Bedia wrote:
> On Mon, Nov 4, 2013 at 11:20 PM, Lokesh Vutla wrote:
>> Selecting the Master osc clk as Timer2 clock source.
>
> I obviously missed the first round of patches for AM43xx here. Why is
> timer2 being used here? Don't we use
On Thu, Nov 07, 2013 at 10:37:24AM +0100, Andreas Bie?mann wrote:
> Hello all together,
>
> On 11/07/2013 09:17 AM, Heiko Schocher wrote:
> > Am 06.11.2013 08:50, schrieb Wolfgang Denk:
[snip]
> >> So when you're once again doing some change that requires touching
> >> files for some othe rboards,
Hi Andre,
On Wed, 23 Oct 2013 21:46:31 +0200, Andre Heider
wrote:
> On Wed, Oct 23, 2013 at 05:54:13PM +0100, Stephen Warren wrote:
> > On 10/22/2013 09:27 PM, Andre Heider wrote:
> > > Add the missing "right" field to struct bcm2835_mbox_tag_overscan.
> >
> > This one patch,
> > Acked-by: Step
Current LDS files /DISCARD/ a lot of sections when linking ELF
files, causing diagnostic tools such as readelf or objdump to
produce partial output. Keep all section at link stage, filter
only at objcopy time so that .bin remains minimal.
Signed-off-by: Albert ARIBAUD
---
This is a repost of the
Hello Wolfgang,
Am 07.11.2013 13:12, schrieb Wolfgang Denk:
Dear Heiko,
In message<527b7ee6.4030...@denx.de> you wrote:
Hmm... I hope we get a lot of such EMails ... and think, this is not
a big problem ... Or, maybe, if we get a lot of such EMails, maybe we
open a u-boot-testing list?
NAK
Hello Wolfgang,
Am 07.11.2013 13:01, schrieb Wolfgang Denk:
Dear "Andreas Bießmann",
In message<527b7883.1080...@gmail.com> you wrote:
[...]
maintainer could then see if he needs to pull out a board or if one else
run the test before.
I fully agree - everybody should be able to provide
Hi Pekon,
It seems after patching without BCH16 patches that at least
OMAP_ECC_BCH8_CODE_HW can't be compatible with Linux 3.8.13 mode. U-Boot
drivers/mtd/nand/omap_gpmc.c:omap_select_ecc_scheme states that
nand->ecc.bytes = 14 whereas in OMAP_ECC_BCH8_CODE_HW_DETECTION_SW mode
setting seems to b
On Thu, 2013-11-07 at 09:40 +0100, Stefano Babic wrote:
> Hi Giuseppe,
>
> On 06/11/2013 21:37, Giuseppe Pagano wrote:
> > Add Sata support on uDoo Board.
> >
> > Signed-off-by: Giuseppe Pagano
> > Cc: sba...@denx.de
> >
> > ---
> > +#ifdef CONFIG_CMD_SATA
> > +int setup_sata(void)
> > +{
In the case of not having CONFIG_CMD_HASH but having CONFIG_CMD_CRC32
enabled (and not CONFIG_CRC32_VERIFY), we end up in this part of the
code path on hash_command(). However, we will only have exactly 3 args
here, and 3 > 3 is false, and we will not try and store the hash at the
address given as
Hi Stefano,
On Thu, 2013-11-07 at 09:38 +0100, Stefano Babic wrote:
> Hi Giuseppe,
>
> On 06/11/2013 21:33, Giuseppe Pagano wrote:
> > Add Ethernet and networking support on uDoo board (FEC + phy Micrel)
> >
> >
> > Signed-off-by: Giuseppe Pagano
> > Cc: sba...@denx.de
> >
> > +int mx6_rgmii
On 11/07/2013 12:11 AM, Tom Rini wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 11/06/2013 09:47 AM, Roger Quadros wrote:
>> Add platform glue logic for the SATA controller.
>>
>> Signed-off-by: Roger Quadros
> [snip]
>> diff --git a/arch/arm/cpu/armv7/omap-common/Makefile
>> b/
On 11/06/2013 11:48 PM, Tom Rini wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 11/06/2013 09:47 AM, Roger Quadros wrote:
>> Pipe3 PHY is used by SATA, USB3 and PCIe modules. This is
>> a driver for the Pipe3 PHY.
>>
>> Signed-off-by: Roger Quadros
> [snip]
>> +#define perror(fmt
Hello Wolfgang,
Am 07.11.2013 13:06, schrieb Wolfgang Denk:
Dear Heiko Schocher,
In message<527b7cb0.6040...@denx.de> you wrote:
Note also that one goal of boards.cfg is to not have multiple files
around that have to remain consistent.
Yep, exactly. Thats why I think we could collect this
Dear Wolfgang Denk,
On 11/07/2013 01:01 PM, Wolfgang Denk wrote:
> In message <527b7883.1080...@gmail.com> you wrote:
>>
>> The saved information how often a board was runtime tested with the
>> correct SHA1 of the u-boot/master could be quite useful.
>> In the end just the last tested commit will
Dear Heiko,
In message <527b7ee6.4030...@denx.de> you wrote:
>
> Hmm... I hope we get a lot of such EMails ... and think, this is not
> a big problem ... Or, maybe, if we get a lot of such EMails, maybe we
> open a u-boot-testing list?
NAK. Mailing lists are good for some kind of information -
Dear Heiko Schocher,
In message <527b7cb0.6040...@denx.de> you wrote:
>
> > Note also that one goal of boards.cfg is to not have multiple files
> > around that have to remain consistent.
>
> Yep, exactly. Thats why I think we could collect this in boards.cfg.
No, we really want to have a databa
Dear "Andreas Bießmann",
In message <527b7883.1080...@gmail.com> you wrote:
>
> The saved information how often a board was runtime tested with the
> correct SHA1 of the u-boot/master could be quite useful.
> In the end just the last tested commit will be interesting but it could
> give some info
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