Hi Jeroen,
On 01/11/2014 03:39 PM, Jeroen Hofstee wrote:
The omap_gpmc allows switching ecc at runtime. Since
the NAND_SUBPAGE_READ flag is only set, it is kept when
switching to hw ecc, which is not correct. This leads to
calling chip->ecc.read_subpage which is not a valid
pointer. Therefore al
This patch provides support to program a flash config register.
Configuration register contains the control bits used to configure
the different configurations and security features of a device.
Signed-off-by: Jagannadha Sutradharudu Teki
---
drivers/mtd/spi/sf_ops.c | 24 ++
This patch adds set QEB support for macronix flash devices
which are trying to program/read quad operations.
Signed-off-by: Jagannadha Sutradharudu Teki
---
drivers/mtd/spi/sf_internal.h | 5 +
drivers/mtd/spi/sf_ops.c | 26 ++
drivers/mtd/spi/sf_probe.c| 4
Updated current SPI subsyetem status.
Signed-off-by: Jagannadha Sutradharudu Teki
---
doc/SPI/status.txt | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/doc/SPI/status.txt b/doc/SPI/status.txt
index 62c3c85..13889f5 100644
--- a/doc/SPI/status.txt
+++ b/doc/SPI/st
This patch added support for accessing dual memories in
stacked connection with single chipselect line from controller.
For more info - see doc/SPI/README.dual-flash
Signed-off-by: Jagannadha Sutradharudu Teki
---
doc/SPI/README.dual-flash | 65 ++
d
This patch add quad commands support like
- QUAD_PAGE_PROGRAM => for write program
- QUAD_OUTPUT_FAST ->> for read program
Signed-off-by: Jagannadha Sutradharudu Teki
---
drivers/mtd/spi/sf_internal.h | 2 +
drivers/mtd/spi/sf_ops.c | 2 +-
drivers/mtd/spi/sf_probe.c| 178 ++
Discovered the read dummy_byte based on the
configured read command.
Signed-off-by: Jagannadha Sutradharudu Teki
---
drivers/mtd/spi/sf_internal.h | 2 ++
drivers/mtd/spi/sf_ops.c | 16 +---
drivers/mtd/spi/sf_probe.c| 19 +++
include/spi_flash.h |
Added macronix flash quad read/write commands support and
it's up to the respective controller driver usecase to
configure the respective commands by defining SPI RX/TX
operation modes from include/spi.h on the driver.
Signed-off-by: Jagannadha Sutradharudu Teki
---
drivers/mtd/spi/sf_params.c |
Moved the flash params table from sf_probe.c and
placed on to sf_params.c, hence flash params file will
alter based on new addons.
Signed-off-by: Jagannadha Sutradharudu Teki
---
drivers/mtd/spi/Makefile| 4 +-
drivers/mtd/spi/sf_params.c | 130 +++
driv
This config will use for defining greater than single flash support.
currently - DUAL_STACKED and DUAL_PARALLEL.
Signed-off-by: Jagannadha Sutradharudu Teki
---
README | 6 ++
drivers/mtd/spi/sf.c | 3 ++-
drivers/mtd/spi/sf_ops.c | 14 ++
drivers/mt
This patch provides support to set the quad enable bit on flash.
quad enable bit needs to set before performing any quad IO
operations on respective SPI flashes.
Currently added set quad enable bit for winbond and spansion flash
devices. stmicro flash doesn't require to set as qeb is volatile.
r
This patch adds support QUAD_IO_FAST read command.
Signed-off-by: Jagannadha Sutradharudu Teki
---
drivers/mtd/spi/sf_internal.h | 1 +
drivers/mtd/spi/sf_probe.c| 2 ++
include/spi.h | 4 +++-
include/spi_flash.h | 3 ++-
4 files changed, 8 insertions(+), 2 deletio
This series is a combo of quad cmds and dual_flash support
Refer [1] and [2] for more functional description about this changes.
[1]
http://u-boot.10912.n7.nabble.com/PATCH-v6-00-12-sf-Add-Extended-read-and-quad-read-write-commands-support-td170645.html
[2]
http://u-boot.10912.n7.nabble.com/PATC
This patch enabled RD_FULL and WR_QPP for supported flashes
in micron, winbond and spansion.
Remaining parts will be add in future patches.
Signed-off-by: Jagannadha Sutradharudu Teki
---
drivers/mtd/spi/sf_probe.c | 60 +++---
1 file changed, 30 insertio
- comment typo's
- func args have a proper names
Signed-off-by: Jagannadha Sutradharudu Teki
---
drivers/mtd/spi/sf_internal.h | 11 +++
drivers/mtd/spi/sf_ops.c | 6 +++---
drivers/mtd/spi/sf_probe.c| 4 ++--
include/spi_flash.h | 5 -
4 files changed, 12 inser
Unified the bar code from read_ops into a spi_flash_bar()
Signed-off-by: Jagannadha Sutradharudu Teki
---
drivers/mtd/spi/sf_ops.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index bc4a822..7ae9582 100644
-
This patch added support for accessing dual memories in
parallel connection with single chipselect line from controller.
For more info - see doc/SPI/README.dual-flash
Signed-off-by: Jagannadha Sutradharudu Teki
---
doc/SPI/README.dual-flash | 27 +++
drivers/mtd/spi/sf_
QEB code comprises of couple of flash register read/write operations,
this patch moved flash register operations on to sf_op
Signed-off-by: Jagannadha Sutradharudu Teki
---
drivers/mtd/spi/sf_internal.h | 11 ---
drivers/mtd/spi/sf_ops.c | 75 +++
Current sf uses FAST_READ command, this patch adds support to
use the different/extended read command.
This implementation will determine the fastest command by taking
the supported commands from the flash and the controller, controller
is always been a priority.
Signed-off-by: Jagannadha Sutradh
On Wed, 8 Jan 2014 08:24:21 +0100
Christian Gmeiner wrote:
> There may be some custom boards in the field which have
> an seperate eeprom chip to store edid informations in it.
> To make use of those edid information in the board code
> this patch add a function to convert edid to fb_videomode.
Hi Stefano,
On Wed, 08 Jan 2014 11:53:39 +0100
Stefano Babic wrote:
...
> Agree that we have to sync u-boot and kernel, and this can be a way in
> the short term.
>
> I am asking if this is in the long term the best way to do it. You are
> converting EDID values to fb_videomode *mode, and then a
Hey Tom,
please pull two minor fixes for release. Thanks!
Anatolij
The following changes since commit 7f673c99c2d8d1aa21996c5b914f06d784b080ca:
Merge branch 'master' of git://git.denx.de/u-boot-arm (2014-01-10 10:56:00
-0500)
are available in the git repository at:
git://git.denx.de/u-b
Hi,
On Sun, 22 Dec 2013 13:02:40 +0800
Liu Ying wrote:
> The structures ipu_cm and ipu_idmac contain some reserved arrays as
> placeholders to make sure the trailing entries may point to the relevant
> IPU registers. This patch corrects the size of the reserved arrays.
>
> Changes in v2:
> Ad
Hi Stefano,
On Fri, Jan 3, 2014 at 3:55 PM, Fabio Estevam wrote:
> From: Fabio Estevam
>
> SolidRun has designed the Hummingboard board based on mx6q/dl/solo.
>
> Add the initial support for the mx6 solo variant.
>
> More information about this hardware can be found at:
> http://imx.solid-run.co
Hi, Jagan and other experts:
Thanks a lot!
I will try it at ARM Ltd released Foundation Model.
Best wishes,
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Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG.
Also add their details in README.
Signed-off-by: Prabhakar Kushwaha
---
Makefile|4 ++--
README |7 +++
include/configs/B4860QDS.h |4 ++--
include/configs/P20
Dear Prabhakar Kushwaha,
In message <1389587917-10324-1-git-send-email-prabha...@freescale.com> you
wrote:
> Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG.
What is the reason for the reenaming? Especially, why changing from
CONFIG_ to CONFIG_SYS_ ?
> Also add their details in README.
..
Thanks Wolfgang for reviewing this patch.
Please find my reply in-lined
On 1/13/2014 11:02 AM, Wolfgang Denk wrote:
Dear Prabhakar Kushwaha,
In message <1389587917-10324-1-git-send-email-prabha...@freescale.com> you
wrote:
Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG.
What is the re
- Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s.
- Remove unused patameters: 'cpo', 'wrdata delay', '2T', which are
unrelated to DDR3/3L.
Tested with UDIMM 9JSF25672AZ-2G1K1 and verified speed 1200/1866/2133MT/s.
Signed-off-by: Shengzhou Liu
---
v3: fix issue of two line
Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG.
Also add their details in README.
Signed-off-by: Prabhakar Kushwaha
---
changes for v2: Incorporated Wolfgang's comments
- Added more description in README
Makefile|4 ++--
README
Hi,
Thanks for the series.
I will review once the today release done.
And is it possible to test these changes on sf quad changes, if OK
will send the details.
On Monday 13 January 2014 11:02 AM, Alison Wang wrote:
This series contain QSPI support for Freescale Vybrid VF610.
The QSPI(Quad Ser
On 1/10/2014 7:40 AM, Po Liu wrote:
Using the TPL method for nand boot by sram was already
supported. Here add some code for mpc85xx ifc nand boot.
- For ifc, elbc, esdhc, espi, all need the SPL without
section .resetvec.
- Use a clear function name for nand spl boot.
Add QSPI support for VF610TWR, such as clock and iomux.
Signed-off-by: Alison Wang
Signed-off-by: Chao Fu
---
arch/arm/include/asm/arch-vf610/crm_regs.h| 11 +-
arch/arm/include/asm/arch-vf610/imx-regs.h| 4 +++-
arch/arm/include/asm/arch-vf610/iomux-vf610.h | 14 +
This series contain QSPI support for Freescale Vybrid VF610.
The QSPI(Quad Serial Peripheral Interface) acts as an interface to one single
or two external serial flash devices, each with up to 4 bidirectional data
lines.
QSPI has a Look-update-table(LUT) which consists of a number of pre-program
Add PAD_CTL_DSE_150ohm and PAD_CTL_PUS_22K_UP for VF610 in
IOMUX_PAD structure.
Signed-off-by: Alison Wang
---
arch/arm/include/asm/imx-common/iomux-v3.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h
b/arch/arm/include/asm/imx-common/iomux-v3.h
Add Freescale QSPI driver support for VF610.
Signed-off-by: Alison Wang
Signed-off-by: Chao Fu
---
drivers/spi/Makefile | 1 +
drivers/spi/fsl_qspi.c | 482 +
drivers/spi/fsl_qspi.h | 127 +
3 files changed, 610 insertions(+)
crea
Hello Lukasz,
Am 10.01.2014 09:23, schrieb Lukasz Majewski:
Hi Heiko,
Preprocessor definitions and hardcoded implementation selection in
g_dnl core were replaced by a linker list made of {usb_function_name,
bind_callback) pairs.
Could you test those g_dnl related patches?
You would probably
Hello Michel,
Am 03.01.2014 10:45, schrieb Michal Simek:
From: Michael Burr
Initialize the second i2c controller.
Signed-off-by: Michael Burr
Signed-off-by: Michal Simek
---
Changes in v1:
- Based on original thread from Michael Burr
http://lists.denx.de/pipermail/u-boot/2013-October/16501
On 01/13/2014 08:32 AM, Heiko Schocher wrote:
> Hello Michel,
>
> Am 03.01.2014 10:45, schrieb Michal Simek:
>> From: Michael Burr
>>
>> Initialize the second i2c controller.
>>
>> Signed-off-by: Michael Burr
>> Signed-off-by: Michal Simek
>>
>> ---
>> Changes in v1:
>> - Based on original thread
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