Hi Jeroen,
On 18 July 2014 12:29, Jeroen Hofstee wrote:
> Hello Masahiro,
>
>
> On 17-07-14 11:18, Masahiro Yamada wrote:
>>
>> Since the command name 'make' is not GNU Make on some platforms
>> such as FreeBSD, MAKEALL should call the make via scripts/gnu_make.
>>
>> Signed-off-by: Masahiro Yama
On 17 July 2014 03:18, Masahiro Yamada wrote:
> Since the command name 'make' is not GNU Make on some platforms
> such as FreeBSD, MAKEALL should call the make via scripts/gnu_make.
>
> Signed-off-by: Masahiro Yamada
Maybe you will rename the script, but the code looks good.
Acked-by: Simon Gla
On 17 July 2014 23:23, Masahiro Yamada wrote:
> If Series-to tag is missing, Patman exits with a message
> "No recipient".
>
> This is just annoying for those who had already added
> sendemail.to configuration.
>
> I guess many developers have
>
> [sendemail]
> to = u-boot@lists.denx.d
Hi Jon,
On 11 June 2014 08:33, Jon Loeliger wrote:
> On Tue, Jun 10, 2014 at 10:54 PM, Simon Glass wrote:
>> Hi Jon,
>>
>> I thought I should mention that I spent time on a flight to look at
>> SPI with driver model. I have put the WIP code in branch 'working' in
>> u-boot-dm.git. Note it doesn'
Hi Jean-Luc,
On 9 July 2014 01:40, Jean-Luc BLANC wrote:
> This driver add support for STMicroelectronics ST33ZP24 I2C TPM.
> ---
> README |6 +
> drivers/tpm/Makefile |1 +
> drivers/tpm/tpm_i2c_stm_st33.c | 633
> +
Hi Jean-Luc,
On 8 July 2014 16:05, Jean-Luc BLANC wrote:
> This driver add support for STMicroelectronics ST33ZP24 SPI TPM.
s/add/adds/
> Driver support 2 SPI TPMs.
> Driver support also hash in Locality 4 feature (the only way to
On both lines s/support/supports/
> update PCR17).
> ---
> RE
Hi Michael,
On 2 July 2014 02:17, wrote:
>
> From: Michael van der Westhuizen
>
> Remove the verified boot limitation that only allows a single
> RSA public exponent of 65537 (F4). This change allows use with
> existing PKI infrastructure and has been tested with HSM-based
> PKI.
>
> Change the
Hi Jon,
On 9 July 2014 07:53, Jon Loeliger wrote:
> HI Simon,
>
> On Tue, Jul 8, 2014 at 10:38 PM, Simon Glass wrote:
>> In U-Boot it is pretty common to number devices from 0 and access them
>> on the command line using this numbering. While it may come to pass that
>> we will move away from th
Hi Ian,
On 18 July 2014 13:38, Ian Campbell wrote:
>
> This has been disabled for ARM in initr_scsi since that function was
> introduced. However it works fine for me on Cubieboard and Cubietruck (with
> the
> upcoming AHCI glue patch).
>
> I also tested on two random ARM platforms which seem to
From: Scott Branden
Base support for the Broadcom Cygnus SoC.
Based on iproc-common and the SoC specific reset function.
Signed-off-by: Scott Branden
Signed-off-by: Steve Rae
---
arch/arm/cpu/armv7/bcmcygnus/Makefile | 7 +++
arch/arm/cpu/armv7/bcmcygnus/reset.c | 20 ++
From: Scott Branden
The bcm_ep board configuration is used by a number of boards
including Cygnus and NSP.
Add builds for the bcm958300k and the bcm958622hr boards.
Signed-off-by: Scott Branden
Signed-off-by: Steve Rae
---
arch/arm/include/asm/arch-bcmcygnus/configs.h | 25 ++
arch/arm/
From: Scott Branden
The iproc architecture code is present in several Broadcom
chip architectures, including Cygnus and NSP.
Signed-off-by: Scott Branden
Signed-off-by: Steve Rae
---
arch/arm/cpu/armv7/Makefile | 1 +
arch/arm/cpu/armv7/iproc-common/Makefile|
From: Scott Branden
Base support for the Broadcom NSP SoC.
Based on iproc-common and the SoC specific reset function.
Signed-off-by: Scott Branden
Signed-off-by: Steve Rae
---
arch/arm/cpu/armv7/bcmnsp/Makefile | 7 +++
arch/arm/cpu/armv7/bcmnsp/reset.c | 19 +++
2 file
This series adds the bcm958300k and the bcm958622hr boards which
share the iproc architecture code.
Scott Branden (4):
arm: iproc: Initial commit of iproc architecture code
arm: bcmcygnus: Add bcmcygnus u-architecture
arm: bcmnsp: Add bcmnsp u-architecture
arm: add Cygnus and NSP boards
Rainer,
Once this patch is enabled, we have
warning: implicit declaration of function 'init_85xx_watchdog'
[-Wimplicit-function-declaration]
Please fix.
York
On 06/03/2014 12:05 AM, Rainer Boschung wrote:
> The booting of the board is now protected by the CPU watchdog.
> A failure during the
Rainer,
Would you look into common/board_f.c to see if you can do the same as
arch/powerpc/lib/board.c?
You know we are steering to use generic board structure. Some boards already
made the change. When you do, you will no longer be using
arch/powerpc/lib/board.c.
York
On 07/16/2014 04:20 AM,
On 05/19/2014 01:29 AM, Shengzhou Liu wrote:
> Add support for Cortina CS4315/CS4340 10G PHY.
> - This driver loads CS43xx firmware from NOR/NAND/SPI/SD device
> to initialize Cortina PHY.
> - Cortina PHY has non-standard offset of PHY ID registers, thus
> we define own get_phy_id() to override
On 07/18/2014 02:12 PM, York Sun wrote:
> On 04/29/2014 07:54 PM, Chunhe Lan wrote:
>> Before CORTINA driver only supports two phy addresses.
>> This patch adds the four phy addresses support for
>> CORTINA PHY module.
>>
>> Signed-off-by: Chunhe Lan
>> ---
>> drivers/net/phy/cortina.c | 28 +++
On 04/29/2014 07:54 PM, Chunhe Lan wrote:
> Before CORTINA driver only supports two phy addresses.
> This patch adds the four phy addresses support for
> CORTINA PHY module.
>
> Signed-off-by: Chunhe Lan
> ---
> drivers/net/phy/cortina.c | 28 ++--
> 1 files changed, 22
From: Marc Zyngier
So far, only supporting the CPU_ON method.
Other functions can be added later.
Signed-off-by: Marc Zyngier
---
arch/arm/cpu/armv7/sunxi/Makefile | 3 +
arch/arm/cpu/armv7/sunxi/psci.S | 162 ++
include/configs/sun7i.h | 6 +
From: Marc Zyngier
CNTFRQ needs to be properly configured on all CPUs. Otherwise,
virtual machines hoping to find valuable information on secondary
CPUs will be disapointed...
Signed-off-by: Marc Zyngier
---
include/configs/sun7i.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/co
Hi Albert,
This is a followup to my reposting of Marc's PSCI series
http://lists.denx.de/pipermail/u-boot/2014-July/183610.html containing
more of Marc's patches with the sunxi bits which make use of that new
functionality. It is based on those patches.
Both sets of patches are also at:
g
On Fri, 2014-07-18 at 22:45 +0300, Siarhei Siamashka wrote:
> Is anyone really in a hurry to get this stuff pushed out of the
> u-boot-sunxi tree to upstream right now? Can't we get a 'testing'
> branch in the sunxi repository and have everything reviewed first?
This sun4i and sun5i stuff has bee
On Fri, 18 Jul 2014 20:14:11 +0100
Ian Campbell wrote:
> Hi Albert,
>
> Welcome back!
>
> The following changes since commit 23f23f23d509e8e873797884456070c8a47d72b2:
>
> socfpga: Relocate arch common functions away from board (2014-07-05
> 10:14:46 +0200)
>
> are available in the git repo
This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done
for sun7i only since I don't have access to any other sunxi platforms
with sata included.
The PHY setup is derived from the Alwinner releases and Linux, but is mostly
undocumented.
The Allwinner AHCI controller also requires
This has been disabled for ARM in initr_scsi since that function was
introduced. However it works fine for me on Cubieboard and Cubietruck (with the
upcoming AHCI glue patch).
I also tested on two random ARM platforms which seem to define CONFIG_CMD_SCSI:
- highbank worked fine (on midway hardwar
In 73545f75b66d "ahci: wait longer for link" I increased the
timeout to 40ms based on the observed behaviour of a WD disk on a
Cubietruck. Since then Karsten Merker and myself have both
observed timeouts with HGST disks (Karsten on Cubietruck, me on
Cubieboard2). Increasing the timeout to ~175ms fi
Hi Albert,
I picked up the GPIO and Cubieboard2 bits of v2 into the sunxi PR which
I just sent out[0]. What remains here in v3 is the generic AHCI changes
and the sunxi driver itself which I have rebased onto
u-boot-sunxi.git#master.
Cheers,
Ian.
[0] http://lists.denx.de/pipermail/u-boot/2014-J
Hi Albert,
Welcome back!
The following changes since commit 23f23f23d509e8e873797884456070c8a47d72b2:
socfpga: Relocate arch common functions away from board (2014-07-05 10:14:46
+0200)
are available in the git repository at:
git://git.denx.de/u-boot-sunxi.git master
for you to fetch cha
On Tue, 2014-07-15 at 23:56 +0200, Roman Byshko wrote:
[...]
> + /* this should be used instead of next two lines if
> + * sunxi_gpio.c is merged upstream
> + * gpio_direction_output(sunxi_ehci->gpio_vbus, 1); */
> + sunxi_gpio_set_cfgpin(sunxi_ehci->gpio_vbus, SUNXI_GPIO_OUTPUT);
On Wed, 2014-07-09 at 18:27 +0800, tiger...@via-alliance.com wrote:
> Hi, Scott:
>
> I have a question about nand_scan_bbt() function in
> drivers/mtd/nand/nand_bbt.c .
>
> ……
>
> len = (1 << this->bbt_erase_shift); // bbt_erase_shift = 18
> (256KB)
>
> len += (len >>
Hello Stanislav,
On 18-07-14 16:41, Stanislav Vlasic wrote:
What I need is solution for getting random number (on first boot) which
will be written to ubootenv.
mm, you forgot to describe why.. and what you mean with random.
Anyway, can't the host programming the device not provide
a pseudo r
Hello Siarhei,
On 18-07-14 19:09, Siarhei Siamashka wrote:
This is needed to have feature parity with the normal boot mode,
where the L2EN bit in the CP15 Auxiliary Control Register is set
by the BROM code right from the start.
If this is not done, the Linux system ends up booted with the L2 ca
Hello Masahiro,
On 17-07-14 11:18, Masahiro Yamada wrote:
Since the command name 'make' is not GNU Make on some platforms
such as FreeBSD, MAKEALL should call the make via scripts/gnu_make.
Signed-off-by: Masahiro Yamada
---
MAKEALL | 8 +---
1 file changed, 5 insertions(+), 3 deletion
Hello Masahiro,
On 17-07-14 11:18, Masahiro Yamada wrote:
U-Boot is expected to be built on various platforms
but makefiles are written for GNU Make.
We should keep in mind that the command 'make' is not always GNU Make.
For example, on Linux, people generally do:
make _config; make
But F
The Allwinner SoCs support a special FEL boot mode, which can be activated
by users via a button press (or other means). In the FEL mode, the BROM
implements a custom FEL protocol over USB, which allows to upload code to
the device and run it. This protocol had been reverse engineered and
documente
This is needed to have feature parity with the normal boot mode,
where the L2EN bit in the CP15 Auxiliary Control Register is set
by the BROM code right from the start.
If this is not done, the Linux system ends up booted with the L2 cache
disabled.
Signed-off-by: Siarhei Siamashka
---
arch/arm
Hello,
One of the current FEL problems is a very limited available SRAM space,
so that trying to add new code to u-boot or even changing the GCC version
introduces a risk of exceeding it. Another problem is that booting a Linux
system on Allwinner A10/A13 devices in FEL mode ends up with L2 cache
Moved the impedance setup code part into a separate function. Added explicit
wait for ZQ calibration completion before proceeding to the next initialization
steps. Removed the CONFIG_SUN7I ifdef guard around the code, which has identical
behaviour on sun4i/sun5i/sun7i. And if 'odt_en' is set in the
The attempt to do DRAM parameters calibration in 'dramc_scan_dll_para()'
function by trying different DLL adjustments and using the hardware
DQS gate training result as a feedback is a great source of inspiration,
but it just can't work properly the way it is implemented now. The fatal
problem of t
It is going to be useful in more than one place.
Signed-off-by: Siarhei Siamashka
---
arch/arm/cpu/armv7/sunxi/dram.c | 30 +++---
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/dram.c b/arch/arm/cpu/armv7/sunxi/dram.c
index 18a5c
The sun5i hardware (Allwinner A13) introduced configurable MBUS clock speed.
Allwinner A13 uses only 16-bit data bus width to connect the external DRAM,
which is halved compared to the 32-bit data bus of sun4i (Allwinner A10), so
it does not make much sense to clock a wider internal bus at a very h
Hello,
First of all, it may be worth reminding that no accurate documentation
for this particular DRAM controller exists in public access.
However it is suspected that Allwinner uses one of the revisions of
Synopsys DesignWare DDR2/3-Lite Memory Controller IP (MCTL) combined
with DDR2/3-Lite PHY
In the case if the 'dram_para' struct does not specify the exact bus width
or chip density, just use a trial and error method to find a usable
configuration.
Because all the major bugs in the DRAM initialization sequence are now
hopefully fixed, it should be safe to re-initialize the DRAM controll
The write recovery time is 15ns for all JEDEC DDR3 speed bins. And
instead of hardcoding it to 10 cycles, it is possible to set tighter
timings based on accurate calculations. For example, DRAM clock
frequencies up to 533MHz need only 8 cycles for write recovery.
Signed-off-by: Siarhei Siamashka
Add the necessary missing bits from the legacy u-boot-sunxi for the
Allwinner A10 and A13 support (originally authored by Henrik Nordstrom,
Stefan Roese, Oliver Schinagl and Hans de Goede).
Signed-off-by: Siarhei Siamashka
---
arch/arm/cpu/armv7/sunxi/dram.c | 55
This configures the PLL5P clock frequency to something in the ballpark of
1GHz and allows more choices for MBUS and G2D clock frequency selection
(using their own divisors). In particular, it enables the use of 2/3 clock
speed ratio between MBUS and DRAM.
Signed-off-by: Siarhei Siamashka
---
arc
The RESET pin needs to be kept low for at least 200 us according
to the DDR3 spec. So just do it the right way.
This issue did not cause any visible major problems earlier, because
the DRAM RESET pin is usually already low after the board reset. And
the time gap before reaching the sunxi u-boot DR
Before driving the CKE pin (Clock Enable) high, the DDR3 spec requires
to wait for additional 500 us after the RESET pin is de-asserted.
The DRAM controller takes care of this delay by itself, using a
configurable counter in the SDR_IDCR register. This works in the same
way on sun4i/sun5i/sun7i ha
The stale error status should be cleared for all sun4i/sun5i/sun7i
hardware and not just for sun7i. Also there are two types of DQS
gate training errors ("found no result" and "found more than one
possible result"). Both are handled now.
Signed-off-by: Siarhei Siamashka
---
arch/arm/cpu/armv7/su
All the known Allwinner A10/A13/A20 devices are using just single rank
DDR3 memory. So don't pretend that we support DDR2 or more than one
rank, because nobody could ever test these configurations for real and
they are likely broken. Support for these features can be added back
in the case if such
If the dram->ppwrsctl (SDR_DPCR) register has the lowest bit set to 1, this
means that DRAM is currently in self-refresh mode and retaining the old
data. Since we have no idea what to do in this situation yet, just set this
register to 0 and initialize DRAM in the same way as on any normal reboot
(
The hardware DQS gate training is a bit unreliable and does not
always find the best delay settings.
So we introduce a 32-bit 'dqs_gating_delay' variable, where each
byte encodes the DQS gating delay for each byte lane. The delay
granularity is 1/4 cycle.
Also we allow to enable the active DQS ga
Hi,
I'm using customized U-Boot 2011.03 (for Amlogic platform).
What I need is solution for getting random number (on first boot) which
will be written to ubootenv. Let's say I have 100 strings stored in string
array of board file.
On first boot I have to pick one random string from list and wri
When we're using EMMC_BOOT that means we have environment on eMMC so
we can make use of CONFIG_SPL_ENV_SUPPORT within Falcon Mode.
Signed-off-by: Tom Rini
---
include/configs/am335x_evm.h |1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x
CONFIG_SPL_NET_SUPPORT is not the only time we want SPL to ahve
environment, CONFIG_SPL_ENV_SUPPORT is when we want it.
Signed-off-by: Tom Rini
---
common/Makefile | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/common/Makefile b/common/Makefile
index de5cce8..
On am335x_evm we only support USBETH for a networking SPL option so move
the rest of the defines under that area as that's the only time we need
(and want) environment support here.
Signed-off-by: Tom Rini
---
include/configs/am335x_evm.h | 13 -
1 file changed, 4 insertions(+), 9
There are times where we may need more than a few kilobytes of stack
space. We also will not be using CONFIG_SPL_STACK location prior to DDR
being initialized (CONFIG_SYS_INIT_SP_ADDR is still used there) so pick
a good location within DDR for this to be. Tested on
OMAP4/AM335x/OMAP5/DRA7xx.
Sig
In the case of SPL on these boards we only need environment for
SPL_USBETH, so it's safe to normally use ENV_IS_NOWHERE and SPL+NAND
does not support environment today.
Cc: Hannes Petermaier
Signed-off-by: Tom Rini
---
include/configs/tseries.h |6 +-
1 file changed, 5 insertions(+), 1
This change adds declaration of functions:
- set_board_type() - called at board_early_init_f()
- get_board_type() - called at checkboard()
For supporting multiple board types in a one config - it is welcome
to display the current board model. This is what get_board_type()
should return.
Signed-of
On an Odroid U3 board, the SOC is unable to reset the eMMC card
in the DWMMC mode by the cpu software reset. Manual reset of the card
by switching proper gpio pin - fixes this issue.
Such solution needs to add a call to pre reset function.
This is done by the reset_misc() function, which is called
This change adds setup of environmental board info using
get_board_name() and get_board_type() functions for config
CONFIG_BOARD_TYPES.
This is useful in case of running many boards with just one config.
Signed-off-by: Przemyslaw Marczak
Cc: Piotr Wilczek
Cc: Minkyu Kang
---
Changes v2:
- set
It is possible to boot device using a micro SD or eMMC slots.
In this situation, boot device should be registered as a block
device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV
is usually set to "0" in the most config cases.
Signed-off-by: Przemyslaw Marczak
---
Changes V3:
- separate t
This change introduces new common function:
- set_dfu_alt_info() - put dfu system and bootloader setting
into $dfu_alt_info.
functions declaration:
- char *get_dfu_alt_system(void)
- char *get_dfu_alt_boot(void)
- void set_dfu_alt_info(void)
and new config:
- CONFIG_SET_DFU_A
This config is valid for two devices:
- Odroid X2,
- Odroid U3.
Signed-off-by: Przemyslaw Marczak
Cc: Minkyu Kang
Cc: Tom Rini
---
Changes v2:
- odroid config: add CONFIG_DFU_ALT_BOOTLOADER
- odroid config: change name of CONFIG_DFU_BOOT_ALT_* to CONFIG_DFU_ALT_BOOT_*
Changes v3:
- odroid.h:
This board file supports standard features of Odroid X2 and U3 boards:
- Exynos4412 core clock set to 1000MHz and MPLL peripherial clock set to 800MHz,
- MAX77686 power regulator,
- USB PHY,
- enable XCL205 - power for board peripherials
- check board type: U3 or X2.
- enable Odroid U3 FAN cooler
This is a standard description for Odroid boards.
Signed-off-by: Przemyslaw Marczak
Cc: Minkyu Kang
Cc: Tom Rini
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/exynos4412-odroid.dts | 70 ++
2 files changed, 72 insertions(+), 1 deletion(-)
cre
The byte order of soc revision was inverted, now it is fixed.
Signed-off-by: Przemyslaw Marczak
Cc: Piotr Wilczek
Cc: Minkyu Kang
---
board/samsung/common/misc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
in
This change enable automatic setting of dfu alt info
on every boot. This is useful in case of booting one
u-boot binary from multiple media.
Signed-off-by: Przemyslaw Marczak
---
board/samsung/common/board.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/board/samsung/common/board.c b/bo
This change fixes the bad gpio configuration for the exynos dwmmc.
Signed-off-by: Przemyslaw Marczak
Cc: Beomho Seo
Cc: Minkyu Kang
Cc: Jaehoon Chung
---
arch/arm/cpu/armv7/exynos/pinmux.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux
This patch set introduces changes to common Samsung code
as a preparation of new board support:
- boot device check - code cleanup
- automatic init order of mmc drivers
- automatic setting of dfu entities which depends on boot device
- pre reset function call for board own implementation
- setting
This patch introduces code clean-up for exynos boot mode check.
It includes:
- removal of typedef: boot_mode
- move the boot mode enum to arch-exynos/power.h
- add bootmode for sequence: eMMC 4.4 ch4 / SD ch2
- add new function: get_boot_mode() for OM[5:1] pin check
- update spl boot code
Signed-o
Hello Daniel,
On 07/17/2014 05:35 PM, Daniel Drake wrote:
On Thu, Jul 17, 2014 at 3:59 PM, Przemyslaw Marczak
wrote:
So BL1, BL2 are running in iRAM(required small size), and u-boot is running
from a RAM.
The main reason for using existing BL1 and BL2 binaries is
that bl1 and bl2 are just work
From: Markus Niebel
This patch adds the changes to boards.cfg and the board directory
under board/tqc.
TQMa6 is a family of modules based on Freescale i.MX6. It consists of
TQMa6Q (i.MX6 Quad), TQMa6D (i.MX6 Dual) featuring eMMC, and 1 GiB DDR3
TQMa6S (i.MX6 Solo) featuring eMMC and 512 MiB DDR
Hi ,
I found out an issue when enabling ECC for P2041 platform with an amount
of memory of 8GB.
The routine "void dma_meminit(uint val, uint size)" is not adapted to
manage memory size greater or equal to 4GB due to the 'uint' type.
With this typing the dma_meminit sees 0 as size when memory is fo
On Fri, 2014-07-18 at 12:04 +0200, Hans de Goede wrote:
> Looks good, ACK.
Thanks, will prep the PR ASAP.
> > Either leave them out or approach the person who wrote the dts (who
> > presumably has one, or isthat asking too much) to test?
>
> I can ask some people to test yes, but what do we the
PISMO_xx macros were used to define 'Platform Independent Storage MOdule'
related GPMC configurations. This patch
- Replaces these OMAP3 specific macros with generic CONFIG_xx macros as provided
by current u-boot infrastructure.
- Removes unused redundant macros, which are no longer required afte
Fixes commit a0a37183bd75e74608bc78c8d0e2a34454f95a91
ARM: omap: merge GPMC initialization code for all platform
1) NAND device are not directly memory-mapped to CPU address-space, they are
indirectly accessed via following GPMC registers:
- GPMC_NAND_COMMAND_x
- GPMC_NAND_ADDRESS_x
- GPMC
This patch moves some board specific NAND configs:
- FROM: generic config file 'ti_armv7_common.h'
- TO: individual board config files using these configs.
So that each board can independently set the value as per its design.
Following configs are affected in this patch:
CONFIG_SYS_NAND_U_BOOT
This patch cleans redundant and unused macros from various board-configs
and architecture specific header files.
Tested using: MAKEALL -s omap 3 -s omap4 -s omap5 -s am33xx
with $ARCH=arm && $CROSS_COMPILE=arm-linux-gnueabihf-
Pekon Gupta (3):
ARM: omap: fix GPMC address-map si
Hi,
On 07/17/2014 09:14 PM, Ian Campbell wrote:
> On Thu, 2014-07-17 at 12:37 +0200, Hans de Goede wrote:
>> Hi,
>>
>> On 07/16/2014 11:48 PM, Ian Campbell wrote:
>>> On Fri, 2014-06-13 at 22:55 +0200, Hans de Goede wrote:
From: Henrik Nordstrom
Add support for the x-powers axp209
Hello Wolfgang,
On 07/17/2014 02:47 PM, Wolfgang Denk wrote:
> Dear Valentin,
>
> In message <1405599840-11984-1-git-send-email-valentin.longch...@keymile.com>
> you wrote:
>> When u-boot initializes the RAM (early in boot) it looks for the "pram"
>> env variable to know which is area it cannot
Add NOR flash hardware init function, including SMC and PIO
configuration.
Signed-off-by: Bo Shen
---
Changes in v2: None
board/atmel/sama5d3xek/sama5d3xek.c | 58 +
1 file changed, 58 insertions(+)
diff --git a/board/atmel/sama5d3xek/sama5d3xek.c
b/board/a
Signed-off-by: Bo Shen
---
Changes in v2:
- Add CONFIG_SYS_FLASH_PROTECTION
- Correct the max sector number
include/configs/sama5d3xek.h | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index da27180
Add NOR flash support on sama5d3xek board. Then, we can use
NOR flash related command to access it.
Changes in v2:
- Add CONFIG_SYS_FLASH_PROTECTION
- Correct the max sector number
Bo Shen (2):
ARM: atmel: sama5d3xek: add nor flash init function
ARM: atmel: sama5d3xek: enable NOR flash su
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