From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom
On Sat, Jul 05, 2014 at 12:35:12AM +0530, Pekon Gupta wrote:
Beaglebone Board can be connected to expansion boards to add devices to them.
These expansion boards are called 'capes'. This patch adds support for
following versions
Hi list,
the package lensfun (http://lensfun.sourceforge.net/) ships an image.h which
gets installed in /usr/include/image.h.
When I build u-boot from the latest commit 524123a, it bails out with the
following error:
git clone git://git.denx.de/u-boot.git
cd u-boot
make coreboot-x86_config
Dear Mr. Denk;
On St, 2014-07-16 at 14:45 +0200, Wolfgang Denk wrote:
I'm not happy with that. I think this is actually dangerous.
First, you mix two different concepts here. As the name FILEsize
suggests, it is related to the size of a data object file. This
comes as natural name when
Dear Lisovy,
In message 1405930094.30277.1.ca...@lp-lvrv.comap.cz you wrote:
One possible solution would be to add new environment variable called
datasize, but then there is the question if this variable should be
updated any time the filesize is updated (+ in a few situations where
the
From: Markus Niebel markus.nie...@tq-group.com
Signed-off-by: Markus Niebel markus.nie...@tq-group.com
---
README |1 +
drivers/rtc/Makefile |1 +
drivers/rtc/ds1307.c |2 +-
3 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/README b/README
index
On Po, 2014-07-21 at 10:29 +0200, Wolfgang Denk wrote:
I have to admit that I don't even see the use case where such a new
variable would be helpful.
Your patch was adding this to commands like nand read etc. All
these commands require you to pass the size to be read as argument,
so you
Hi!
+++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
@@ -14,5 +14,8 @@
#define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
#define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
+#define SOCFPGA_SDMMC_ADDRESS 0xff704000
Please keep list sorted.
It
From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom
On Sat, Jul 05, 2014 at 12:35:14AM +0530, Pekon Gupta wrote:
This patch updates pin-mux for beaglebone NOR cape [1]
This cape has 128Mbits(16MBytes), x16, CFI compatible NOR Flash device.
On Beaglebone, GPMC chip-select-0 is
Cleanups as suggested by wd on mailing list, plus I replaced
calloc(...,1) with malloc().
Signed-off-by: Pavel Machek pa...@denx.de
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -16,8 +16,6 @@ static const struct socfpga_clock_manager *clock_manager_base
=
Hi Pavel,
On Mon, 2014-07-21 at 12:30 +0200, ZY - pavel wrote:
Cleanups as suggested by wd on mailing list, plus I replaced
calloc(...,1) with malloc().
Signed-off-by: Pavel Machek pa...@denx.de
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -16,8 +16,6 @@
Dear Pavel,
In message 20140721102004.ga12...@amd.pavel.ucw.cz you wrote:
#define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
#define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
+#define SOCFPGA_SDMMC_ADDRESS 0xff704000
Please keep list sorted.
It
Cleanups as suggested by wd on mailing list.
Signed-off-by: Pavel Machek pa...@denx.de
---
v2: calloc is actually needed, document it.
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -16,8 +16,6 @@ static const struct socfpga_clock_manager *clock_manager_base
=
Hi!
#define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
#define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
+#define SOCFPGA_SDMMC_ADDRESS 0xff704000
Please keep list sorted.
It was sorted by address before, so I'll keep it like that.
Yes,
And I think I am saying that we already *have* it generalized for
the GPIOs but only if we remove that renumbering function!
Consider again that the U_CLASS lookup of a GPIO simply matches
versus the range in each uclass data (gpio base and count). That search
doesn't care about their order
Is it Apr,2014
Thanks ,
Rohit
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Hi Shengzhou Liu,
On Fri, Jul 18, 2014 at 4:33 PM, York Sun york...@freescale.com wrote:
On 05/19/2014 01:29 AM, Shengzhou Liu wrote:
Add support for Cortina CS4315/CS4340 10G PHY.
- This driver loads CS43xx firmware from NOR/NAND/SPI/SD device
to initialize Cortina PHY.
- Cortina PHY
On 07/02/2014 10:34 PM, Heiko Schocher wrote:
Hello Stephen,
Am 02.07.2014 20:37, schrieb Stephen Warren:
On 06/25/2014 10:57 AM, Stephen Warren wrote:
From: Stephen Warrenswar...@nvidia.com
I2C read transactions are typically implemented as follows:
START(write) address
Rather than calling do_source directly (which is not officially exported
from cmd_source.c) call 'source' which is exported and requires a little
less code to do so as well.
Signed-off-by: Tom Rini tr...@ti.com
---
board/esd/common/cmd_loadpci.c |8 +---
1 file changed, 1 insertion(+), 7
On 07/16/2014 03:38 AM, Lukasz Majewski wrote:
Commit 1151b7ac10b81ecbb has cleaned up read and write operations.
Unfortunately, for correct operation the write for ext4 fs requires
absolute patch.
This patch fixes this case.
Shouldn't the user simply supply the absolute patch name as the
Hello Chris,
On 20-07-14 12:30, disposa...@gmx.net wrote:
Hi list,
the package lensfun (http://lensfun.sourceforge.net/) ships an image.h which
gets installed in /usr/include/image.h.
When I build u-boot from the latest commit 524123a, it bails out with the
following error:
git clone
I happened to spot this while working in the area.
Signed-off-by: Ian Campbell i...@hellion.org.uk
Cc: Simon Glass s...@chromium.org
---
common/board_r.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/common/board_r.c b/common/board_r.c
index 4479acb..427ee67 100644
--- a/common/board_r.c
On Fri, 2014-07-18 at 21:12 -0600, Simon Glass wrote:
Hi Ian,
On 18 July 2014 13:38, Ian Campbell i...@hellion.org.uk wrote:
This has been disabled for ARM in initr_scsi since that function was
introduced. However it works fine for me on Cubieboard and Cubietruck (with
the
upcoming
On Fri, 2014-07-18 at 20:09 +0300, Siarhei Siamashka wrote:
http://lists.phcomp.co.uk/pipermail/arm-netbook/2012-June/004341.html
I think a better reference is
https://github.com/hno/Allwinner-Info/blob/master/FEL-usb/USB-protocol.txt
+.syntax unified
+.text
+.arm
+.arch armv7a
On Sat, 2014-07-19 at 13:20 +0200, Hans de Goede wrote:
Hi,
On 07/18/2014 07:09 PM, Siarhei Siamashka wrote:
This is needed to have feature parity with the normal boot mode,
where the L2EN bit in the CP15 Auxiliary Control Register is set
by the BROM code right from the start.
If
On Fri, 2014-07-18 at 19:22 +0300, Siarhei Siamashka wrote:
The attempt to do DRAM parameters calibration in 'dramc_scan_dll_para()'
function by trying different DLL adjustments and using the hardware
DQS gate training result as a feedback is a great source of inspiration,
but it just can't
On Fri, 2014-07-18 at 19:22 +0300, Siarhei Siamashka wrote:
If the dram-ppwrsctl (SDR_DPCR) register has the lowest bit set to 1, this
means that DRAM is currently in self-refresh mode and retaining the old
data. Since we have no idea what to do in this situation yet, just set this
register to
On Fri, 2014-07-18 at 19:22 +0300, Siarhei Siamashka wrote:
The RESET pin needs to be kept low for at least 200 us according
to the DDR3 spec. So just do it the right way.
This issue did not cause any visible major problems earlier, because
the DRAM RESET pin is usually already low after the
On Fri, 2014-07-18 at 19:22 +0300, Siarhei Siamashka wrote:
Before driving the CKE pin (Clock Enable) high, the DDR3 spec requires
to wait for additional 500 us after the RESET pin is de-asserted.
The DRAM controller takes care of this delay by itself, using a
configurable counter in the
On Fri, 2014-07-18 at 19:22 +0300, Siarhei Siamashka wrote:
Moved the impedance setup code part into a separate function. Added explicit
wait for ZQ calibration completion before proceeding to the next
initialization
steps. Removed the CONFIG_SUN7I ifdef guard around the code, which has
On Fri, 2014-07-18 at 19:22 +0300, Siarhei Siamashka wrote:
The sun5i hardware (Allwinner A13) introduced configurable MBUS clock speed.
Allwinner A13 uses only 16-bit data bus width to connect the external DRAM,
which is halved compared to the 32-bit data bus of sun4i (Allwinner A10), so
it
On Fri, 2014-07-18 at 19:22 +0300, Siarhei Siamashka wrote:
This configures the PLL5P clock frequency to something in the ballpark of
1GHz and allows more choices for MBUS and G2D clock frequency selection
(using their own divisors). In particular, it enables the use of 2/3 clock
speed ratio
On Fri, 2014-07-18 at 19:22 +0300, Siarhei Siamashka wrote:
The stale error status should be cleared for all sun4i/sun5i/sun7i
hardware and not just for sun7i. Also there are two types of DQS
gate training errors (found no result and found more than one
possible result). Both are handled now.
On Fri, 2014-07-18 at 19:23 +0300, Siarhei Siamashka wrote:
It is going to be useful in more than one place.
Signed-off-by: Siarhei Siamashka siarhei.siamas...@gmail.com
---
arch/arm/cpu/armv7/sunxi/dram.c | 30 +++---
1 file changed, 19 insertions(+), 11
On Fri, 2014-07-18 at 19:23 +0300, Siarhei Siamashka wrote:
Add the necessary missing bits from the legacy u-boot-sunxi for the
Allwinner A10 and A13 support (originally authored by Henrik Nordstrom,
Stefan Roese, Oliver Schinagl and Hans de Goede).
Signed-off-by: Siarhei Siamashka
On Fri, 2014-07-18 at 19:23 +0300, Siarhei Siamashka wrote:
All the known Allwinner A10/A13/A20 devices are using just single rank
DDR3 memory. So don't pretend that we support DDR2 or more than one
rank, because nobody could ever test these configurations for real and
they are likely broken.
On Fri, 2014-07-18 at 19:23 +0300, Siarhei Siamashka wrote:
The write recovery time is 15ns for all JEDEC DDR3 speed bins. And
instead of hardcoding it to 10 cycles, it is possible to set tighter
timings based on accurate calculations. For example, DRAM clock
frequencies up to 533MHz need only
On Fri, 2014-07-18 at 19:23 +0300, Siarhei Siamashka wrote:
In the case if the 'dram_para' struct does not specify the exact bus width
or chip density, just use a trial and error method to find a usable
configuration.
Because all the major bugs in the DRAM initialization sequence are now
On Sat, 2014-07-19 at 12:59 +0200, Hans de Goede wrote:
can you please rebase your set on top of this tree?
Yes, please.
I understand this may be non trivial and thus may require some extra
work from you side, and I'm sorry about that.
Me too.
Having been through the series though I don't
On Fri, 2014-07-18 at 20:47 +0200, Jeroen Hofstee wrote:
Hello Siarhei,
On 18-07-14 19:09, Siarhei Siamashka wrote:
This is needed to have feature parity with the normal boot mode,
where the L2EN bit in the CP15 Auxiliary Control Register is set
by the BROM code right from the start.
On Mon, 2014-07-21 at 19:39 +0100, Ian Campbell wrote:
I expect this needs to be done on secondary processors. Need to keep
that in mind if/when someone works on PSCI for sun[45]i.
Except as Tom points out on IRC, sun[45]i are both single core... Oops!
Ian.
Hello Ian,
On 21-07-14 22:07, Ian Campbell wrote:
On Fri, 2014-07-18 at 20:47 +0200, Jeroen Hofstee wrote:
Hello Siarhei,
On 18-07-14 19:09, Siarhei Siamashka wrote:
This is needed to have feature parity with the normal boot mode,
where the L2EN bit in the CP15 Auxiliary Control Register is
On Tue, Jun 17, 2014 at 10:47:31PM +0200, Jeroen Hofstee wrote:
clang warns this check is silly; it is since s is
a local variable.
u-boot/drivers/mtd/cfi_flash.c:2363:13: warning: comparison of
array 's' not equal to a null pointer is always true
else if ((s != NULL) (strcmp(s, yes)
On Sun, Jun 22, 2014 at 11:24:04PM +0200, Jeroen Hofstee wrote:
Include the function its prototype to prevent the warning
that it has no prototype.
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Jun 23, 2014 at 12:22:08AM +0200, Jeroen Hofstee wrote:
Since most commands are not public, make them static. This
prevents warnings that no common prototype is available.
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Jun 23, 2014 at 11:20:19PM +0200, Jeroen Hofstee wrote:
First of all this looks a lot better, but it also
prevents a gcc warning (W=1), that the weak function
has no previous prototype.
cc: Simon Glass s...@chromium.org
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Acked-by:
On Thu, Jul 10, 2014 at 08:38:35PM +0200, Jeroen Hofstee wrote:
When static inline is used in a header file the function
should preferably be inlined and if not possible made a
static function. When declared inside a c file there is a
static function, which might be inlined. Since SPL uses a
On Thu, Jun 26, 2014 at 07:53:16PM +0200, Jeroen Hofstee wrote:
This not only looks a bit better it also prevents a
warning with W=1 (no previous prototype).
cc: ag...@denx.de
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Applied to u-boot/master, thanks!
--
Tom
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On Thu, Jun 26, 2014 at 08:04:37PM +0200, Jeroen Hofstee wrote:
This not only looks a bit better it also prevents a
warning with W=1 (no previous prototype).
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Applied to u-boot/master, thanks!
--
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On Thu, Jun 26, 2014 at 08:18:31PM +0200, Jeroen Hofstee wrote:
This not only looks a bit better it also prevents a
warning with W=1 (no previous prototype).
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Acked-by: Simon Glass s...@chromium.org
Applied to u-boot/master, thanks!
--
On Wed, Jun 25, 2014 at 09:57:45PM +0200, Jeroen Hofstee wrote:
lists.c / root.c do not include their own header and they
could potentially implement a different function. Therefore
actually include the headers.
cc: s...@chromium.org
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
On Thu, Jul 10, 2014 at 08:12:45PM +0200, Jeroen Hofstee wrote:
This prevents a clang warning.
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Applied to u-boot/master, thanks!
--
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On Thu, Jul 10, 2014 at 10:46:28PM +0200, Jeroen Hofstee wrote:
use weak instead of alias to prevent some clang warnings.
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Applied to u-boot/master, thanks!
--
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On Sat, Jul 12, 2014 at 03:16:51PM +0200, Jeroen Hofstee wrote:
Remove self assignments which is just dead code to prevent
compiler warnings about non used arguments. For u-boot this
does not prevent any warning though, on the contrary it actual
introduces warnings when compiling with clang.
On Thu, Jul 10, 2014 at 10:33:00PM +0200, Jeroen Hofstee wrote:
pack_hex_byte is only used when CONFIG_CMD_NET is
defined so limit it to that scope. This prevents
a clang warning.
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Applied to u-boot/master, thanks!
--
Tom
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On Sat, Jul 12, 2014 at 03:22:13PM +0200, Jeroen Hofstee wrote:
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Applied to u-boot/master, thanks!
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On Sat, Jul 12, 2014 at 03:16:52PM +0200, Jeroen Hofstee wrote:
Current code uses the preprocessor to change an else case
to a statement without any if condition at all. Although
this works, change the optional code to return early, so
all optional code is contained within a single #ifdef.
On Thu, Jul 10, 2014 at 11:06:25PM +0200, Jeroen Hofstee wrote:
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Applied to u-boot/master, thanks!
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On Sun, Jul 13, 2014 at 10:01:51PM +0200, Jeroen Hofstee wrote:
While at it add fdt_support.h as well.
cc: Stephen Warren swar...@wwwdotorg.org
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Applied to u-boot/master, thanks!
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On Sat, Jul 12, 2014 at 09:24:08PM +0200, Jeroen Hofstee wrote:
Add missing prototypes for global functions and
make local functions static.
cc: pa...@antoniou-consulting.com
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Applied to u-boot/master, thanks!
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On Sun, Jul 13, 2014 at 10:57:58PM +0200, Jeroen Hofstee wrote:
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Applied to u-boot/master, thanks!
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On Sun, Jul 13, 2014 at 11:44:21PM +0200, Jeroen Hofstee wrote:
The and operator implicitly upcasts the value to
int, hence the format should expect an int type
as well. (and make checkpatch happy)
Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl
Applied to u-boot/master, thanks!
--
On Wed, Jul 16, 2014 at 07:16:50AM +0200, Heiko Schocher wrote:
Hello Tom,
please pull from u-boot-i2c.git
The following changes since commit 524123a70761110c5cf3ccc5f52f6d4da071b959:
Prepare v2014.07 (2014-07-14 13:16:45 -0400)
are available in the git repository at:
On Mon, 2014-07-21 at 22:39 +0200, Jeroen Hofstee wrote:
Hello Ian,
On 21-07-14 22:07, Ian Campbell wrote:
On Fri, 2014-07-18 at 20:47 +0200, Jeroen Hofstee wrote:
Hello Siarhei,
On 18-07-14 19:09, Siarhei Siamashka wrote:
This is needed to have feature parity with the normal boot
On 07/03/2014 12:24 AM, Alison Wang wrote:
The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.
Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores
On Mon, Jul 21, 2014 at 11:19:03AM -0400, Tom Rini wrote:
Rather than calling do_source directly (which is not officially exported
from cmd_source.c) call 'source' which is exported and requires a little
less code to do so as well.
Signed-off-by: Tom Rini tr...@ti.com
Applied to
On Tue, 2014-07-15 at 14:09 +0530, Prabhakar Kushwaha wrote:
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 8b453cb..6c158f5 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -26,8 +26,6 @@
#define MAX_BANKS
Am 2014-05-14 23:29, schrieb Anthony Felice:
Removed settings in unsupported register fields. They didn’t
do anything, and in most cases, were not documented in the
reference manual.
Changed register settings to comply with JEDEC required values.
Changed timing parameters because they
On 14-07-20 12:54 AM, Wolfgang Denk wrote:
Dear Steve Rae,
In message 1405733854-20194-5-git-send-email-s...@broadcom.com you wrote:
The bcm_ep board configuration is used by a number of boards
including Cygnus and NSP.
Add builds for the bcm958300k and the bcm958622hr boards.
...
+/*
On 14-07-20 12:46 AM, Wolfgang Denk wrote:
Dear Steve Rae,
In message 1405733854-20194-2-git-send-email-s...@broadcom.com you wrote:
From: Scott Branden sbran...@broadcom.com
The iproc architecture code is present in several Broadcom
chip architectures, including Cygnus and NSP.
...
+
Add basic framebuffer driver for the S3C24xx family of CPUs.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Anatolij Gustschin ag...@denx.de
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Vladimir Zapolskiy
This is a matter of simple additional ifdefery to cater
for the different register layout of the S3C2440 chip.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Heiko Schocher h...@denx.de
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Minkyu Kang
Make sure to keep the MAC address programmed in the SMC911x ADDRH
and ADDRL registers. Linux can read those registers to determine
the MAC address on EEPROM-less configurations.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Joe Hershberger joe.hershber...@ni.com
Cc: Tom Rini tr...@ti.com
---
The correct name of this symbol is CONFIG_S3C2410_NAND_HWECC , the
_SYS is redundant.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Scott Wood scottw...@freescale.com
Cc:
Implement SD driver for the S3C24xx family. This implementation
is currently only capable of using the PIO transfers, DMA is not
supported.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Minkyu Kang
Unify the register structure so they can be easily used across all
of S3C24xx lineup.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Pantelis Antoniou
Printing u32 with %02x is just a bad idea, fix it.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Scott Wood scottw...@freescale.com
Cc: Vladimir Zapolskiy v...@mleia.com
---
Merge struct s3c2410_nand and struct s3c2440_nand into one unified
struct s3c24x0_nand. While at it, fix up and rename the functions
to retrieve the NAND base address and fix up the s3c NAND driver to
reflect this change.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Kyungmin Park
Add support for S3C2440 into the NAND driver by filling in the
S3C2440 bits and differences.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Scott Wood scottw...@freescale.com
Implant a missing ECC correction implementation and select_chip
implementation from Linux.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Scott Wood scottw...@freescale.com
The GPIO driver didn't correctly compute the bank offset
from the GPIO number and caused random writes into the
GPIO block address space. Fix the driver so it actually
does the writes correctly. While at it, make use of the
clrsetbits_le32() mechanisms.
Signed-off-by: Marek Vasut ma...@denx.de
Add buffer reading code, should make the IO a little faster.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Scott Wood scottw...@freescale.com
Cc: Vladimir Zapolskiy
Commit ddc94378d changed the definition of __kernel_size_t
from unsigned int to unsigned long.
It is true that it fixed warnings on some crosstools
but it increased warnings on the others.
The problem is that we cannot see consistency in terms of
the typedef of __kernel_size_t on M68K
The latest GCC is so clever that it reports more warnings
than old ones did:
--8--
board/freescale/m5253demo/flash.c: In function 'flash_get_offsets':
board/freescale/m5253demo/flash.c:65:23: warning: iteration 2047u
invokes
This series consists of two fixes.
With this series and the crosstools distributed on www.kernel.org,
M68K boards can be built without any warnings.
You can download it from:
https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.9.0/
x86_64-gcc-4.9.0-nolibc_m68k-linux.tar.xz
My build
Since the command name 'make' may not be GNU Make on some platforms
such as FreeBSD, MAKEALL should call scripts/show-gnu-make to get
the command name for GNU MAKE (and error out if it is not found).
The GNU Make should be searched after parsing options because we want
to allow MAKEALL -h even if
Since the command name 'make' may not be GNU Make on some platforms
such as FreeBSD, buildman should call scripts/show-gnu-make to get
the command name for GNU MAKE (and error out if it is not found).
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Acked-by: Simon Glass s...@chromium.org
U-Boot is expected to be built on various platforms.
We should keep in mind that the command 'make' is not always GNU Make,
while all the makefiles are written for GNU Make.
For example, on Linux, people generally do:
make board_config; make
But FreeBSD folks do
gmake board_config; gmake
Masahiro Yamada (3):
scripts: add scripts/show-gnu-make to get GNU Make command name
MAKEALL: make sure to invoke GNU Make
buildman: make sure to invoke GNU Make
MAKEALL | 12 +---
scripts/show-gnu-make | 25 +
Hi Brian,
(Sorry for my late reply.)
On Wed, 16 Jul 2014 19:49:09 -0700
Brian Norris computersforpe...@gmail.com wrote:
On Thu, Jul 17, 2014 at 11:19:42AM +0900, Masahiro Yamada wrote:
When I change the status of patches,
I always do it one by one.
But it is painful if the series
On Tue, Jul 22, 2014 at 11:37:26AM +0900, Masahiro Yamada wrote:
On Wed, 16 Jul 2014 19:49:09 -0700
Brian Norris computersforpe...@gmail.com wrote:
On Thu, Jul 17, 2014 at 11:19:42AM +0900, Masahiro Yamada wrote:
Does Patchwork have any good way to change the status
of the whole series?
Hi,
I don't know what differ with socfpga_dw_mmc.c.
I think you can use it.
Best Regards,
Jaehoon Chung
On 07/16/2014 09:34 PM, Pavel Machek wrote:
Hi!
Once ethernet changes I merged, I can rediff mmc changes for
application. It will look something like this:
Albert, can you apply the
Tom, Vasili
On Mon, 23 Jun 2014 09:10:01 -0400
Tom Rini tr...@ti.com wrote:
On Sun, Jun 22, 2014 at 12:19:21PM +0300, Vasili Galka wrote:
I'll really appreciate any help on this.
On Sun, Jun 15, 2014 at 3:57 PM, Vasili Galka vvv...@gmail.com wrote:
Hi,
I've installed a m68k-elf
Hi Jeroen,
On Fri, 18 Jul 2014 20:19:52 +0200
Jeroen Hofstee jer...@myspectrum.nl wrote:
Instead, they should call the make command via this helper script
to make sure it is GNU Make.
yup, or the name of the executable could be displayed, so
it only needs to be checked once at startup
Add a whitespace between the name and the email address.
When switching to Kconfig, the first version of MAINTAINERS files
will be generated based on the boards.cfg file.
So, the maintainers field should be corrected even if it is a really
minor fix.
Signed-off-by: Masahiro Yamada
Hi
I try to make use of uboot's secure verify feature, but failed. My procedure is
below:
1) Enable control device tree
Ø Add CONFIG_OF_CONTROL / CONFIG_OF_SEPARATE to file vexpress_aemv8a.h
2) Enable FIT and verify boot
Ø Add CONFIG_FIT/CONFIG_RSA/CONFIG_FIT_SIGNATURE to file
Hi all,
Apoligies if this has been asked before. I'm very new to U-Boot, and
did look around but found nothing on the topic.
I've been doing some porting of U-Boot to a board based around a
Freescale i.MX286 CPU. So far thing are working, but I was wondering
how one specifies the MAC OUI?
As
On Mon, 2014-07-21 at 13:30 +0200, ZY - pavel wrote:
Cleanups as suggested by wd on mailing list.
Signed-off-by: Pavel Machek pa...@denx.de
---
v2: calloc is actually needed, document it.
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -16,8 +16,6 @@ static
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