Freescale's flash control driver is using architecture specific timer API
i.e. usec2ticks
Replace usec2ticks with get_timer() (generic timer API)
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Changes for v2: updated timeout time to 10ms
drivers/mtd/nand/fsl_elbc_nand.c | 8
Hi Marek,
On 09/21/2014 04:44 PM, Marek Vasut wrote:
diff --git a/board/kosagi/novena/Makefile b/board/kosagi/novena/Makefile
new file mode 100644
index 000..f67bbc9
--- /dev/null
+++ b/board/kosagi/novena/Makefile
@@ -0,0 +1,11 @@
+#
+# Copyright (C) 2014 Marek Vasutma...@denx.de
+#
+#
Hi Marek,
I checked the I2C stuff, didn't saw any major issues. Here are a couple
of comments for possible improvements:
On 09/21/2014 04:44 PM, Marek Vasut wrote:
+/*
+ * I2C
+ */
+/* I2C1, RAM */
+struct i2c_pads_info i2c_pad_info0 = {
I can suggest to reword the comment as: I2C1: DDR3
Hello Donald,
On 23-09-14 05:03, Donald Dade wrote:
I recently bought a Jetson TK1 with the intent of learning all about ARM
board bring up; essentially everything that happens between the reset
vector and the spawning of the init process (in Linux). I've got a good
understanding of this for
The arg_off() and arg_off_size() update the 'current NAND
device' variable (dev). This is then used when assigning the
(nand_info_t*)nand value. Place the assignment after the
arg_off(_size) calls to prevent using incorrect (nand_info_t*)
nand value.
Signed-off-by: Rostislav Lisovy
OMAP GPMC driver used with some NAND Flash devices
(e.g. Spansion S34ML08G1) causes that U-boot shows
hundreds of 'nand: bit-flip corrected' error messages.
Possible cause was discussed in the mailinglist thread:
http://lists.denx.de/pipermail/u-boot/2014-April/177508.html
The issue was partially
Hi,
On 09/22/2014 02:01 PM, Marek Vasut wrote:
On Saturday, September 20, 2014 at 04:54:35 PM, Hans de Goede wrote:
We need to call usb_kbd_deregister() before calling usb_stop().
usbkbd's stdio_dev-priv points to the usb_device, and usb_kbd_testc
dereferences usb_device-privptr.
usb_stop
Hi,
On 09/22/2014 04:07 AM, Chen-Yu Tsai wrote:
Hi,
On Mon, Sep 22, 2014 at 1:05 AM, Ian Campbell i...@hellion.org.uk wrote:
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
From: Oliver Schinagl oli...@schinagl.nl
To setup clocks and control voltages.
perhaps add ... For P2WI and
Add support for the Kosagi Novena board. Currently supported are:
- I2C busses
- FEC Ethernet
- MMC0, MMC1, Booting from MMC
- SATA
- USB ports
- USB Ethernet
Signed-off-by: Marek Vasut ma...@denx.de
---
arch/arm/Kconfig | 4 +
board/kosagi/novena/Kconfig | 23 ++
On Mon, 2014-09-22 at 16:28 +0200, ZY - sr wrote:
Hi SoCFPGA-developers!
I'm currently using Marek's latest SoCFPGA port. This works really great so
far.
Thank you all for this effort.
What I need additionally is SPI NOR flash support. So I talked a bit with
Marek
and tried to port
From: Joe Perches j...@perches.com
Pick the following commit from Linux kernel:
commit 66cb4ee0e52ca721f609fd5eec16187189ae5fda
Author: Joe Perches j...@perches.com
Date: Wed Sep 10 09:40:47 2014 +1000
checkpatch: remove unnecessary + after {8,8}
There's a useless + use that needs to be
This change fixes suspend/resume issue in the kernel caused
by the wrong 'aclk_cores' clock value expected by the kernel.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
board/samsung/odroid/odroid.c | 4 ++--
1 file changed, 2 insertions(+), 2
Hi Chin Liang,
On 23.09.2014 12:20, Chin Liang See wrote:
Perhaps somebody from Altera with deeper Cadence SPI controller knowledge
can take a quick look at this. Could be a pretty obvious mistake that I
made while copying / porting the code. Or something else thats simply
missing.
Any hints
The i.MX28 has two I2C IP blocks, but the MXS I2C driver is hard-coded
to use the I2C block 0 . Add multibus support so we can use both I2C
busses as seen fit.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Stefano Babic sba...@denx.de
---
drivers/i2c/mxs_i2c.c | 47
Make sure the boot.scr exists on the card before loading it
from the card to avoid annoying message on the console.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Stefano Babic sba...@denx.de
---
include/configs/m28evk.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
Make sure the boot.scr exists on the card before loading it
from the card to avoid annoying message on the console.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Stefano Babic sba...@denx.de
---
include/configs/m53evk.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
Enable the CONFIG_CMD_FS_GENERIC on m28evk to avoid per-fs specific commands
and tweak the environment to cater for this new option.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Stefano Babic sba...@denx.de
---
include/configs/m28evk.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
Enable the CONFIG_CMD_FS_GENERIC on m53evk to avoid per-fs specific commands
and tweak the environment to cater for this new option.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Stefano Babic sba...@denx.de
---
include/configs/m53evk.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
On Sun, Sep 21, 2014 at 07:49:44PM +0200, Albert ARIBAUD wrote:
Hi Tom,
The following changes since commit
9170818a4e004af7893fa0113f6e5b4afafded55:
kconfiglib: change SPDX-License-Identifier to ISC (2014-09-17
21:03:18 -0400)
are available in the git repository at:
Hello Marek,
Am 23.09.2014 13:15, schrieb Marek Vasut:
The i.MX28 has two I2C IP blocks, but the MXS I2C driver is hard-coded
to use the I2C block 0 . Add multibus support so we can use both I2C
busses as seen fit.
Signed-off-by: Marek Vasutma...@denx.de
Cc: Stefano Babicsba...@denx.de
---
Hi Marek,
On Fri, 2014-09-19 at 06:27 +0200, Marek Vasut wrote:
On Thursday, September 18, 2014 at 10:52:12 AM, Alexey Brodkin wrote:
If that's an introduction to porting U-Boot, it might bring to light some new
ideas about the porting process and also point out some obstacles we were not
On Mon, Sep 22, 2014 at 10:11 AM, Chen-Yu Tsai w...@csie.org wrote:
On Mon, Sep 22, 2014 at 2:44 AM, Ian Campbell i...@hellion.org.uk wrote:
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
From: Hans de Goede hdego...@redhat.com
Signed-off-by: Hans de Goede hdego...@redhat.com
On Tue, 2014-09-23 at 19:50 +0800, Chen-Yu Tsai wrote:
Ian, include/configs/sun?i.h and sunxi-common.h only have config
related #defines. Are we sure this is the place for something
like register offsets?
I guess not ;-)
For reference, drivers/i2c/mvtwsi.c has sunxi specific register
On Tue, Sep 23, 2014 at 7:54 PM, Ian Campbell i...@hellion.org.uk wrote:
On Tue, 2014-09-23 at 19:50 +0800, Chen-Yu Tsai wrote:
Ian, include/configs/sun?i.h and sunxi-common.h only have config
related #defines. Are we sure this is the place for something
like register offsets?
I guess not
On Monday, September 22, 2014 at 11:38:19 PM, Nikolay Dimitrov wrote:
Hi Marek,
I checked the I2C stuff, didn't saw any major issues. Here are a couple
of comments for possible improvements:
On 09/21/2014 04:44 PM, Marek Vasut wrote:
+/*
+ * I2C
+ */
+/* I2C1, RAM */
+struct
On Monday, September 22, 2014 at 08:24:05 PM, Nikolay Dimitrov wrote:
Hi Marek,
On 09/21/2014 04:44 PM, Marek Vasut wrote:
diff --git a/board/kosagi/novena/Makefile b/board/kosagi/novena/Makefile
new file mode 100644
index 000..f67bbc9
--- /dev/null
+++
On Tuesday, September 23, 2014 at 11:10:34 AM, Hans de Goede wrote:
Hi,
On 09/22/2014 02:01 PM, Marek Vasut wrote:
On Saturday, September 20, 2014 at 04:54:35 PM, Hans de Goede wrote:
We need to call usb_kbd_deregister() before calling usb_stop().
usbkbd's stdio_dev-priv points to the
On Monday, September 22, 2014 at 11:29:10 PM, Steve Rae wrote:
Implement a feature to allow fastboot to write the downloaded image
to the space reserved for the Protective MBR and the Primary GUID
Partition Table.
Signed-off-by: Steve Rae s...@broadcom.com
Please CC Lukasz ...
Best
On Tue, 2014-09-23 at 20:07 +0800, Chen-Yu Tsai wrote:
On Tue, Sep 23, 2014 at 7:54 PM, Ian Campbell i...@hellion.org.uk wrote:
On Tue, 2014-09-23 at 19:50 +0800, Chen-Yu Tsai wrote:
Ian, include/configs/sun?i.h and sunxi-common.h only have config
related #defines. Are we sure this is the
Hi,
On 09/23/2014 02:15 PM, Marek Vasut wrote:
On Tuesday, September 23, 2014 at 11:10:34 AM, Hans de Goede wrote:
Hi,
On 09/22/2014 02:01 PM, Marek Vasut wrote:
On Saturday, September 20, 2014 at 04:54:35 PM, Hans de Goede wrote:
We need to call usb_kbd_deregister() before calling
On Fri, Sep 19, 2014 at 04:54:05AM -0500, Chin Liang See wrote:
Hi guys,
On Wed, 2014-09-17 at 06:54 -0500, Chin Liang See wrote:
On Tue, 2014-09-16 at 11:56 +0200, ZY - pavel wrote:
Hi!
I'd be interested in maintaining u-boot-socfpga repository. So far,
we don't
have
Dear Tom,
In message 20140923125419.GB25506@bill-the-cat you wrote:
OK, I've thought about this a lot. I think the best way forward is to
have a new tree on git.denx.de, u-boot-socfpga that Marek will run for
the v2014.10 merge window. This will give the Altera team time to get
up to
On Tue, Sep 23, 2014 at 03:43:02PM +0200, Wolfgang Denk wrote:
Dear Tom,
In message 20140923125419.GB25506@bill-the-cat you wrote:
OK, I've thought about this a lot. I think the best way forward is to
have a new tree on git.denx.de, u-boot-socfpga that Marek will run for
the v2014.10
On Tue, Sep 23, 2014 at 8:48 AM, Heiko Schocher h...@denx.de wrote:
Hello Marek,
Am 23.09.2014 13:15, schrieb Marek Vasut:
The i.MX28 has two I2C IP blocks, but the MXS I2C driver is hard-coded
to use the I2C block 0 . Add multibus support so we can use both I2C
busses as seen fit.
Hi SoCFPGA-developers!
So this is my 2nd posting regarding the Candence SPI driver on SoCFPGA.
I got it working now. But only with one quick-hack, as you can see in
patch 4/4. Which disabled the dcache. Or more precise, doesn't enable it.
Thanks to Michael who pointed this out.
Since I really
The Cadence SPI driver currently has some problems when the dcache is enabled.
As a work-around until this problem is fixed in the SPI driver, lets not
enable the dcache on the socfpga platforms. As its also done in the
rocketboards version.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Chin Liang
This define is currently not supported in mainline U-Boot. So don't
define it. Otherwise the drivers doesn't work correctly.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Chin Liang See cl...@altera.com
Cc: Dinh Nguyen dingu...@altera.com
Cc: Vince Bridgers vbrid...@altera.com
Cc: Marek Vasut
This driver is copied directly from the Altera Rockerboard.org U-Boot
repository. I used this git tag: ACDS14.0.1_REL_GSRD_RC2. With minimal
changes to enable compilation in mainline U-Boot.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Chin Liang See cl...@altera.com
Cc: Dinh Nguyen
Signed-off-by: Stefan Roese s...@denx.de
Cc: Chin Liang See cl...@altera.com
Cc: Dinh Nguyen dingu...@altera.com
Cc: Vince Bridgers vbrid...@altera.com
Cc: Marek Vasut ma...@denx.de
Cc: Pavel Machek pa...@denx.de
Cc: Michael Trimarchi mich...@amarulasolutions.com
---
Dear Tom,
In message 20140923134613.GC25506@bill-the-cat you wrote:
What about the u-boot-uniphier repository?
I thought that was done already, oops, so yes, that's fine too.
Done now, thanks.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk
On Tue, Sep 23, 2014 at 12:10:41PM +0900, Masahiro YAMADA wrote:
2014-09-23 2:26 GMT+09:00 Simon Glass s...@chromium.org:
Hi Masahiro,
On 22 September 2014 11:13, Masahiro YAMADA yamad...@jp.panasonic.com
wrote:
2014-09-23 0:33 GMT+09:00 Simon Glass s...@chromium.org:
On OMAP platforms, SATA controller provides the SCSI subsystem
so implement scsi_init().
Get rid of the unnecessary sata_init() call from dra7xx-evm
and omap5-uevm board files.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap-common/sata.c | 6 ++
board/ti/dra7xx/evm.c
The DMA/FIS buffers are set in ahci_port_start() which is called
after ahci_host_init(). So don't start the DMA engine here
(i.e. don't set FIS_RX)
This fixes the following error at kernel boot on OMAP platforms (e.g. DRA7x)
WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147
At least on OMAP, init_sata() no longer performs scsi_scan()
so we must do it explicitly here.
Cc: Dan Murphy dmur...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
common/spl/spl_sata.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c
Hi,
Patch 1 fixes a bug in the AHCI code that was causing L3 errors
on OMAP platforms.
Patches 3, 4 and 5 clean up the SATA/SCSI implementation for OMAP
platorms.
cheers,
-roger
---
Roger Quadros (4):
ahci: Don't start command DMA engine before buffers are set
OMAP5+: sata/scsi: Implement
scsi_scan() must be called as part of scsi_init() and not
as part of sata_init().
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap-common/sata.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/omap-common/sata.c
On Tuesday, September 23, 2014 at 04:08:32 PM, Stefan Roese wrote:
The Cadence SPI driver currently has some problems when the dcache is
enabled. As a work-around until this problem is fixed in the SPI driver,
lets not enable the dcache on the socfpga platforms. As its also done in
the
On Tuesday, September 23, 2014 at 03:49:27 PM, Otavio Salvador wrote:
On Tue, Sep 23, 2014 at 8:48 AM, Heiko Schocher h...@denx.de wrote:
Hello Marek,
Am 23.09.2014 13:15, schrieb Marek Vasut:
The i.MX28 has two I2C IP blocks, but the MXS I2C driver is hard-coded
to use the I2C block 0
On 21.09.2014 14:58, Marek Vasut wrote:
This entire series is the second stab at making SoCFPGA usable with
mainline U-Boot again. There are much fewer bits missing than in the
last series, more cleanup happened and bugs were fixed. This allows
me to use mainline U-Boot on my SoCFPGA systems.
Hi Marek,
On Tue, Sep 23, 2014 at 8:15 AM, Marek Vasut ma...@denx.de wrote:
-void i2c_init(int speed, int slaveadd)
+int i2c_set_bus_num(unsigned int bus)
{
+ uint32_t mxs_i2c_regs;
+
+ switch (bus) {
+ case 0:
+ mxs_i2c_regs = MXS_I2C0_BASE;
+
On 23.09.2014 16:32, Marek Vasut wrote:
diff --git a/board/altera/socfpga/socfpga_cyclone5.c
b/board/altera/socfpga/socfpga_cyclone5.c index 10f15e0..3f19d89 100644
--- a/board/altera/socfpga/socfpga_cyclone5.c
+++ b/board/altera/socfpga/socfpga_cyclone5.c
@@ -76,7 +76,9 @@ int
Hi
On Tue, Sep 23, 2014 at 5:20 PM, Stefan Roese s...@denx.de wrote:
On 23.09.2014 16:32, Marek Vasut wrote:
diff --git a/board/altera/socfpga/socfpga_cyclone5.c
b/board/altera/socfpga/socfpga_cyclone5.c index 10f15e0..3f19d89 100644
--- a/board/altera/socfpga/socfpga_cyclone5.c
+++
If CONFIG_SPL_BUILD and CONFIG_ENV_IS_IN_FAT are
defined, u-boot spl will fail to build. Fix that.
Signed-off-by: Felipe Balbi ba...@ti.com
---
common/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/common/Makefile b/common/Makefile
index aca0f7f..1ff7ce0 100644
---
By using CONFIG_ENV_IS_IN_FAT it's far easier
to have a private, minimal environment for e.g.
booting off of network or mounting rootfs on NFS
without having to modify the configuration header.
Signed-off-by: Felipe Balbi ba...@ti.com
---
include/configs/am43xx_evm.h | 11 +--
1 file
On Mon, Sep 22, 2014 at 09:33:37AM -0600, Simon Glass wrote:
Hi Tom,
Here are some minor fixes for sandbox, buildman and patman.
The following changes since commit 9170818a4e004af7893fa0113f6e5b4afafded55:
kconfiglib: change SPDX-License-Identifier to ISC (2014-09-17 21:03:18
The definitions for div ratio supposed to be in hex and were added
in dec by mistake.
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
Based on u-boot-ti/master
arch/arm/include/asm/arch-keystone/clock_defs.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git
Hi Tom,
Here are some bug fixes for dm.
The following changes since commit 2a8c9c86b92a9ccee3c27286de317e19bb0530b3:
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' (2014-09-21
16:56:44 +0200)
are available in the git repository at:
git://git.denx.de/u-boot-dm.git
for you to
This series tries to unify the Samsung board configs into a few header
files for exynos5 and exynos4.
The purpose is to make it easier to move to driver model. In that case
I would like things like the GPIO drivers and serial drivers to work in
a standard way, and not need to support device tree
Add a keyboard definition so that the keyboard can be used on pit.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Add new patch to enable keyboard on pit
arch/arm/dts/exynos5420-peach-pit.dts | 55 +++
1 file changed, 55
Exynos 5250 boards (snow, spring) use the I2C driver but Exynos 5420 boards
cannot due to a hardware design decision. Select the correct driver to use
in each case.
Signed-off-by: Simon Glass s...@chromium.org
Tested-by: Ajay Kumar ajaykumar...@samsung.com
---
Changes in v3: None
Changes in v2:
The device seems to hang in SPL if the full speed is used when booting from
USB, perhaps because the PMIC has not been set to the maximum ARM core
voltage yet. Slow it down to a reliable speed.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Add new patch to
With the driver model conversion we are going to be using driver model for
SPI and not for I2C. This works OK so long as a board doesn't need both
dm and non-dm versions of the cros_ec driver. Since pit uses SPI and snow
uses I2C we need to split the configs so that only one driver is compiled
for
We want exynos5250-dt.h to be a board which can support any exynos5250
device. This matches the naming used by Linux. As a first step, rename
the existing -dt files to -common to make it clear they are common files,
and not specific boards.
Signed-off-by: Simon Glass s...@chromium.org
---
These boards do not in fact have a Chrome OS EC, nor a TPS565090 PMIC, so
move the settings into a separate common file to be used by those that need
it.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
include/configs/exynos5-common.h| 18
Most of the arndale features are common with other exynos5250 boards. To
permit easier addition of driver model support, use the common file.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Reduce the number of common elements to avoid needing #undefs later
Unfortunately on Pit the AP has no direct access to the tps65090 but must
talk through the EC (over SPI) to the EC's I2C bus.
When driver model supports PMICs this will be relatively easy. In the
meantime the best approach is to duplicate the driver. It will be refactored
once driver model
Things run faster when the data cache is enabled, so turn it on along with
the 'dcache' command.
Signed-off-by: Simon Glass s...@chromium.org
Tested-by: Ajay Kumar ajaykumar...@samsung.com
---
Changes in v3: None
Changes in v2:
- Fix 'cashe' typo in commit subject
include/configs/exynos5-dt.h
Change this board to add a device tree.
This also adds a pinmux header file although it is not used as yet.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Adjust device tree file based on Robert Baldyga's example
Changes in v2:
- Avoid using a common file, and just add a
This brings in a additional small fix which was missed in a recent update
to the README.
Suggested-by: Masahiro Yamada yamad...@jp.panasonic.com
Signed-off-by: Simon Glass s...@chromium.org
---
board/sandbox/README.sandbox | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Change this board to add a device tree.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Avoid using a common file, and just add a device tree
- Fix device tree base addresses
arch/arm/dts/Makefile | 1 +
arch/arm/dts/s5pc1xx-smdkc100.dts | 29
Enable this feature to support driver model before relocation.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
include/configs/exynos-common.h | 5 +++--
include/configs/odroid.h| 2 --
include/configs/s5p_goni.h | 5 +++--
Most of the smdkv310 features are common with other exynos4 boards. To
permit easier addition of driver model support, use the common file and
add a device tree file.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Leave in a few configs which are not in
Since exynos4 and exyno5 share many settings, we should move these into
a common file to avoid duplication.
In effect the changes are that all exynos boards now have EXT4 and FAT
write support. This affects exynos5250 and exynos5420 which previously
did not. This also disables the ext2 commands
A few things are common but are not in the common file. Fix this and
rename the file to fit with the other exynos*-common files.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Leave CONFIG_SERIAL3 in the individual board files
- Reduce the number of common
On Tue, Sep 23, 2014 at 12:47:55PM -0600, Simon Glass wrote:
Hi Tom,
Here are some bug fixes for dm.
The following changes since commit 2a8c9c86b92a9ccee3c27286de317e19bb0530b3:
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' (2014-09-21
16:56:44 +0200)
are available in
On Sun, 21 Sep 2014, Marek Vasut wrote:
Enable support for the DWC2 USB controller.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chin Liang See cl...@altera.com
Cc: Dinh Nguyen dingu...@altera.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Tom Rini tr...@ti.com
Cc: Wolfgang Denk
Hi!
+++ b/drivers/spi/cadence_qspi.c
@@ -0,0 +1,355 @@
+/*
+ * Copyright (C) 2012
+ * Altera Corporation www.altera.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it
On Tuesday, September 23, 2014 at 10:05:58 PM, Pavel Machek wrote:
Hi!
+++ b/drivers/spi/cadence_qspi.c
@@ -0,0 +1,355 @@
+/*
+ * Copyright (C) 2012
+ * Altera Corporation www.altera.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ *
On Sun, 21 Sep 2014, Marek Vasut wrote:
From: Oleksandr Tymoshenko go...@bluezbox.com
This is the USB host controller used on the Altera SoCFPGA and Raspbery Pi.
This code has three checkpatch warnings, but to make sure it stays at least
readable and clear, these are not fixed. These bugs
On Tue, Sep 23, 2014 at 2:55 PM, Dinh Nguyen
dingu...@opensource.altera.com wrote:
On Sun, 21 Sep 2014, Marek Vasut wrote:
Enable support for the DWC2 USB controller.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chin Liang See cl...@altera.com
Cc: Dinh Nguyen dingu...@altera.com
Cc: Albert
For SPL it is sometimes useful to have a simple malloc() just to permit
driver model to work, in the cases where the full malloc() is not made
available by the board config.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/lib/crt0.S | 2 +-
1 file changed, 1 insertion(+), 1
Now that driver model operations prior to relocation, the remaining
area where it does not work is SPL. This series enables this.
Since SPL is quite memory-constrained, code and data size need to be
kept as small as possible. This series includes a few changes to help
with this:
- Small and
When enabled, set up driver model for SPL. This allows SPL to use the same
drivers as the main U-Boot.
Signed-off-by: Simon Glass s...@chromium.org
---
common/spl/spl.c | 5 +
scripts/Makefile.spl | 1 +
2 files changed, 6 insertions(+)
diff --git a/common/spl/spl.c b/common/spl/spl.c
There is little point in supporting this, and it bloats the code.
(This may be moved into the uclass before final submission)
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/gpio/tegra_gpio.c | 40 +++-
1 file changed, 35 insertions(+), 5
Set up the simple malloc() implementation when requested, in preference to
the full malloc().
Signed-off-by: Simon Glass s...@chromium.org
---
common/spl/spl.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c
index
Since this function can use up quite a bit of space for its strings, disable
it by default in SPL. Use CONFIG_DM_WARN to re-enable it.
Signed-off-by: Simon Glass s...@chromium.org
---
include/config_defaults.h | 1 +
include/dm/util.h | 6 ++
2 files changed, 7 insertions(+)
diff
These ended up in arch/arm/dts/dt-bindings temporarily, but in fact the
correct place is now include/dt-bindings. Move them to be consistent.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/dts/dt-bindings/gpio/gpio.h | 15 ---
{arch/arm/dts =
Add documentation for the various driver model options that are now
available.
Signed-off-by: Simon Glass s...@chromium.org
---
README | 119
doc/driver-model/README.txt | 44
2 files changed, 153 insertions(+),
For SPL we don't expect to need to remove a device. Save some code space
by dropping this feature. The board config can define
CONFIG_DM_DEVICE_REMOVE if this is in fact needed.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/core/Makefile| 3 +-
drivers/core/device-remove.c
Provide a CONFIG_DM_STDIO option to enable registering a serial device
with the stdio library. This is seldom useful in SPL, so disable it by
default when building for SPL.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/serial/serial-uclass.c | 8 +---
include/config_defaults.h
The simple malloc() implementation is used when memory is tight. It provides
a simple buffer with an incrementing pointer.
At present the implementation is inside dlmalloc. Move it into its own file
so that it is easier to find.
Rather than using relocation as a signal that the full malloc() is
Add platform data for the GPIO driver. It doesn't need to contain anything
since the GPIO driver will actually use information from the CONFIGs for
now. This merely serves to ensure that the GPIO driver is bound.
Signed-off-by: Simon Glass s...@chromium.org
---
board/nvidia/common/board.c | 8
On Tuesday, September 23, 2014 at 09:55:59 PM, Dinh Nguyen wrote:
On Sun, 21 Sep 2014, Marek Vasut wrote:
Enable support for the DWC2 USB controller.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chin Liang See cl...@altera.com
Cc: Dinh Nguyen dingu...@altera.com
Cc: Albert Aribaud
On Wednesday, September 24, 2014 at 12:21:04 AM, Dinh Nguyen wrote:
On Tue, Sep 23, 2014 at 2:55 PM, Dinh Nguyen
dingu...@opensource.altera.com wrote:
On Sun, 21 Sep 2014, Marek Vasut wrote:
Enable support for the DWC2 USB controller.
Signed-off-by: Marek Vasut ma...@denx.de
Cc:
Use the full driver model GPIO and serial drivers in SPL now that these are
supported. Since device tree is not available they will use platform data.
Remove the special SPL GPIO function as it is no longer needed.
This is all in one commit to maintain bisectability.
Signed-off-by: Simon Glass
Since we currently don't have device tree available in SPL, add platform
data so the uart works.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/serial/serial_tegra.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/serial/serial_tegra.c
The linker lists feature is useful in SPL as it holds the driver model
platform data. So don't throw away the lists.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/cpu/u-boot-spl.lds | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/cpu/u-boot-spl.lds
Hi Marek,
On 09/23/2014 12:47 PM, Marek Vasut wrote:
On Monday, September 22, 2014 at 08:24:05 PM, Nikolay Dimitrov wrote:
One more comment - isn't the file novena.o used also for the TPL, when
building for SPL?
No, there's no TPL involved on MX6.
Ahh, ok. So the whole thing fits in OCRAM
Hi Marek,
Some comments about SPI:
On 09/23/2014 01:18 PM, Marek Vasut wrote:
+/*
+ * SPI
+ */
+#ifdef CONFIG_MXC_SPI
+static iomux_v3_cfg_t ecspi1_pads[] = {
+ /* SS1 */
+ MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(SPI_PAD_CTRL),
+ MX6_PAD_EIM_D17__ECSPI1_MISO |
Hi Marek,
Following are some comments about FEC Ethernet:
On 09/23/2014 01:18 PM, Marek Vasut wrote:
+#define ENET_PAD_CTRL \
+ (PAD_CTL_PKE | PAD_CTL_PUE |\
+ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |
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