On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
The clocks on the A80 are hooked up slightly different, add support for this.
Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Ian Campbell i...@hellion.org.uk
Couple of minor comments:
---
On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
The DRAM Base differs between sun9i and the others and we cannot use
math in various places like the environment setting and linker scripts,
so simply define everything which contains the SDRAM_BASE twice.
Is it really not possible to use
On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
Add a headerfile with the sun9i ccu register layout.
Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Ian Campbell i...@hellion.org.uk
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On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
Add initial sun9i (A80) clock setup support, enough to get the uart + mmc
going.
Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Ian Campbell i...@hellion.org.uk
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U-Boot mailing
On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
According to the Cortex-A7 MPCore Technical Reference Manual:
You must ensure this bit is set to 1 before the caches and MMU are enabled,
or any cache and TLB maintenance operations are performed.
Given that this is a feature of the
On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
Add a headerfile with all the base addresses from the sun9i blocks.
Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Ian Campbell i...@hellion.org.uk
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On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
As the comment says now that we have SPL support this is no longer necessary,
as PLL6 is already setup with the exact same parameters by the SPL.
Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Ian Campbell
On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite
different, so add a wrapper cpu.h which includes the right mach specific
cpu_sun#i.h based on mach, like we already do with clock.h and dram.h .
Note for reviewers,
On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
Which pll-s are available depends on the machine type, move the
clock_get_pllX / clock_set_pllX prototypes to the clock_sun?i.h header files
so that we only declare what is actually available. e.g. clock_get_pll5p()
is not available on
On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
Wait 1 second for the sdcard to respond, rather then waiting for
0xf milliseconds.
Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Ian Campbell i...@hellion.org.uk
(needn't wait for the rest of the series I think)
---
On Tue, 2015-01-13 at 13:33 +0100, Hans de Goede wrote:
While running some tests with an Olinuxino-A13-Micro + a 7 Olimex LCD module
I noticed that the screen flickered. This is caused by the lcd display clk
phase reg value being set to 0, where it should be 1 in this setup.
This commit adds
On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
Add initial sun9i (A80) support, only uart + mmc are supported for now.
Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Ian Campbell i...@hellion.org.uk
+#define CONFIG_SYS_PROMPTsun9i#
Should we make all these say
On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote:
Signed-off-by: Hans de Goede hdego...@redhat.com
---
configs/Merrii_A80_Optimus_defconfig | 6 ++
Needs a MAINTAINERS update, otherwise:
Acked-by: Ian Campbell i...@hellion.org.uk
1 file changed, 6 insertions(+)
On 12/31/14 1:14 PM, Marek Vasut wrote:
Add support for USB host mode and USB device mode for the
Cyclone V development kit and enable support for UMS (to
export SD card as USB mass storage). The UMS is activated
via 'ums 0 mmc 0' command, the system must be connected to
a host PC via HPS
On 12/31/14 1:14 PM, Marek Vasut wrote:
Drop the _cyclone5 suffix from socfpga_cyclone5.c since this file
will contain Arria 5 support as well.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chin Liang See cl...@opensource.altera.com
Cc: Dinh Nguyen dingu...@opensource.altera.com
Cc: Pavel
On 12/31/14 1:14 PM, Marek Vasut wrote:
Replace multiple spaces with a single tab.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chin Liang See cl...@opensource.altera.com
Cc: Dinh Nguyen dingu...@opensource.altera.com
Cc: Pavel Machek pa...@denx.de
Cc: Stefan Roese s...@denx.de
Cc:
On 12/31/14 1:14 PM, Marek Vasut wrote:
Sync SoCFPGA Cyclone V development kit pinmux configuration with
Rocketboard U-Boot v2013.01.01-114-g9381569 (ACDS14.1_REL_GSRD_PR).
NOTE: This change is useless until we get proper SPL support, at
which point this will likely need further
On 12/31/14 1:14 PM, Marek Vasut wrote:
Import DTS for Arria V development kit and enable support
for DT. The DT is imported from Linux 3.19-rc1 as of commit
97bf6af1f928216fd6c5a66e8a57bfa95a659672 .
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chin Liang See cl...@opensource.altera.com
On 12/31/14 1:14 PM, Marek Vasut wrote:
Add support for the Altera Arria V development kit.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chin Liang See cl...@opensource.altera.com
Cc: Dinh Nguyen dingu...@opensource.altera.com
Cc: Pavel Machek pa...@denx.de
Cc: Stefan Roese s...@denx.de
On 12/31/14 1:15 PM, Marek Vasut wrote:
Zap this unused empty function, no point in having it.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chin Liang See cl...@opensource.altera.com
Cc: Dinh Nguyen dingu...@opensource.altera.com
Cc: Pavel Machek pa...@denx.de
Cc: Stefan Roese
On 12/31/14 1:14 PM, Marek Vasut wrote:
Since all boards now have a DT, instead of hard-coding the board
name into the U-Boot binary, read the board name from DT model
property.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chin Liang See cl...@opensource.altera.com
Cc: Dinh Nguyen
On 12/31/14 1:14 PM, Marek Vasut wrote:
Sync SoCFPGA Cyclone V development kit pinmux configuration with
Rocketboard U-Boot v2013.01.01-114-g9381569 (ACDS14.1_REL_GSRD_PR).
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chin Liang See cl...@opensource.altera.com
Cc: Dinh Nguyen
Signed-off-by: Sinan Akman si...@writeme.com
Cc: Tom Rini tr...@ti.com
---
board/freescale/mpc837xerdb/MAINTAINERS |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mpc837xerdb/MAINTAINERS
b/board/freescale/mpc837xerdb/MAINTAINERS
index 8592a2c..81b4eed
Hi Hans,
On 13 January 2015 at 04:33, Hans de Goede hdego...@redhat.com wrote:
While running some tests with an Olinuxino-A13-Micro + a 7 Olimex LCD module
I noticed that the screen flickered. This is caused by the lcd display clk
phase reg value being set to 0, where it should be 1 in this
On Friday, January 16, 2015 at 10:59:27 PM, Pavel Machek wrote:
On Thu 2015-01-15 01:04:30, Marek Vasut wrote:
On Wednesday, January 14, 2015 at 05:41:01 PM,
dingu...@opensource.altera.com
wrote:
From: Dinh Nguyen dingu...@opensource.altera.com
Signed-off-by: Dinh Nguyen
On Friday, January 16, 2015 at 08:04:20 PM, Pavel Machek wrote:
Hi!
Hi!
+void wait_di_buffer(void)
+{
+ if (debug_data-di_report.cur_samples == NUM_DI_SAMPLE) {
+ debug_data-di_report.flags |= DI_REPORT_FLAGS_READY;
+ while (debug_data-di_report.cur_samples != 0)
On Friday, January 16, 2015 at 07:35:11 PM, Pavel Machek wrote:
Hi!
-#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE4096
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0/* device 0 */
+#define CONFIG_ENV_OFFSET
On Sat, Jan 17, 2015 at 02:41:47AM -0500, Sinan Akman wrote:
Hi Tom
On 06/24/2014 01:34 PM, Tom Rini wrote:
On Tue, Jun 24, 2014 at 01:13:06AM -0400, Sinan Akman wrote:
Hi Masahiro
Masahiro Yamada wrote:
Hi Sinan,
[...]
+Orphan powerpc mpc83xx-
Now I realized the dangling branch and dangling match messages on
Linux is generated during the ubifs_replay_journal(). Under U-Boot
this call is disabled:
super.c mount_ubifs:
#ifndef __UBOOT__
err = ubifs_replay_journal(c);
if (err)
goto out_journal;
#endif
I'm unfortunately not an expert in
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