Now that mailbox driver supports cache flush and invalidation, we can
enable dcache.
Signed-off-by: Alexander Stein
Acked-by: Stephen Warren
Tested-by: Stephen Warren
---
include/configs/rpi-common.h | 1 -
include/configs/rpi_2.h | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
dif
As both cores are similar merge the cache handling code for both CPUs
to arm11 directory.
Signed-off-by: Alexander Stein
Acked-by: Stephen Warren
Tested-by: Stephen Warren
---
Changes in v4:
* Used git format-patch -M to generate patches
arch/arm/cpu/arm11/Makefile | 8 ++
arch
Apparently lcd_panel_disable is not defined anywhere, so no config for
an arm1136 board would have set CONFIG_LCD. Remove the unused code.
Signed-off-by: Alexander Stein
Acked-by: Stephen Warren
Tested-by: Stephen Warren
---
arch/arm/cpu/arm1136/cpu.c | 10 --
1 file changed, 10 deleti
This adds dcache support for dwc2. The DMA buffers must be DMA aligned and
is flushed for outgoing transactions before starting transfer. For
ingoing transactions it is invalidated after the transfer has finished.
Signed-off-by: Alexander Stein
Acked-by: Stephen Warren
---
Changes in v4:
* Updat
This patchset enables dcache support for Raspberry Pi 1.
First the cache support code for arm1136 and 1176 was merged.
CONFIG_SYS_CACHELINE_SIZE is defined as 32 bytes which is used as alignment
for mailbox buffer allocations.
Then rpi mailbox code has now dcache flush for writing the mailbox reque
The cacheline is always 32 bytes for arm1176 CPUs, so define it at board
config level for cache handling code.
The ARM Cortex-A7 has a dcache line size of 64 bytes.
Signed-off-by: Alexander Stein
Acked-by: Stephen Warren
Tested-by: Stephen Warren
---
Changes in v4:
* Set CONFIG_SYS_CACHELINE_SI
The mailbox buffer is required to be at least 16 bytes aligned, but for
cache invalidation and/or flush it needs to be cacheline aligned.
Use ALLOC_CACHE_ALIGN_BUFFER for all mailbox buffer allocations.
Signed-off-by: Alexander Stein
Acked-by: Stephen Warren
Tested-by: Stephen Warren
---
Change
When using dcache the setup data for the mailbox must be actually written
into memory before calling into firmware. Thus flush and invalidate the
memory.
Signed-off-by: Alexander Stein
Acked-by: Stephen Warren
Tested-by: Stephen Warren
---
Changes in v3:
* Use ARCH_DMA_MINALIGN instead of fixed
Hi Simon,
On Wed, Jul 22, 2015 at 11:49 PM, Simon Glass wrote:
> The procedure to drop from 64-bit mode to 32-bit is a bit messy. Add a
> function to take care of it. It requires identity-mapped pages and that
> the calling code is running below 4GB.
>
> Signed-off-by: Simon Glass
> ---
>
> arc
Hi Simon,
On Wed, Jul 22, 2015 at 11:49 PM, Simon Glass wrote:
> Most EFI implementations use 64-bit. Add a way to build U-Boot as a 64-bit
> EFI payload. The payload unpacks a (32-bit) U-Boot and starts it. This can
> be enabled for x86 boards at present.
>
> Signed-off-by: Simon Glass
> ---
>
Hi Simon,
On Wed, Jul 22, 2015 at 11:49 PM, Simon Glass wrote:
> This is not in a good place. I'm hoping that Masahiro can help figure this
> one out.
Please check my approach without the need to change this file.
http://patchwork.ozlabs.org/patch/499458/
>
> Signed-off-by: Simon Glass
> ---
Hi,
after getting dcache support for Raspberry Pi 1 (see other thread) to work: I
wanted to do that for rpi2 too.
But even without dcaches rpi2 is slower than rpi1 for both MMC and USB ethernet.
I have no idea why, but trying the new dhry command from current origin/master
confirms my suspicion.
Hi Simon,
On Wed, Jul 22, 2015 at 11:49 PM, Simon Glass wrote:
> The EFI stub provides information to U-Boot in a table. This includes the
> memory map which is needed to decide where to relocate U-Boot. Collect this
> information in the early init code and store it in global_data.
>
> Signed-off
Hi Tom,
can you please pull this batch from Stefan as well?
This pull request does not contain patches that are still under review.
Pull request for those will be sent another time.
The following changes since commit 413978d118bb7d7b0a8488d97d802f2899cd81ce:
Merge git://git.denx.de/u-boot-uni
Hi Simon,
On Wed, Jul 22, 2015 at 11:49 PM, Simon Glass wrote:
> The EFI stub can pass a table to U-Boot with information about the memory map
> Potentially other things will follow. Add a way to access this table.
>
> Signed-off-by: Simon Glass
> ---
>
Reviewed-by: Bin Meng
But please see ni
Hello,
it seems extlinux.conf is pushed as *the* u-boot configuration.
As in it is promoted by many people and its flexibility is praised.
It overrides boot script when both are present.
However,
1) it is not documented. There are examples in readme which partially
work and produce warnings bu
Hi Simon,
On Wed, Jul 22, 2015 at 11:49 PM, Simon Glass wrote:
> The EFI memory map is passed from the stub to U-Boot in a table. Add a
> command to display it in a vaguely readable fashion.
>
> Signed-off-by: Simon Glass
> ---
>
> common/Makefile | 1 +
> common/cmd_efi.c | 258
> +
Hi Simon,
On Wed, Jul 22, 2015 at 11:49 PM, Simon Glass wrote:
> When U-Boot runs as an EFI payload it needs to avoid setting up the CPU
> again. Also U-Boot currently does not handle interrupts for many devices, so
> run with interrupts disabled.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x
Hi Simon,
On Wed, Jul 22, 2015 at 11:49 PM, Simon Glass wrote:
> When U-Boot is running from EFI some of the x86 init is replaced with
> EFI-specific init. For example, since DRAM has already been set up, we only
> need to find it, not init it. Add these functions so that boards can easily
> allo
Hi Simon,
On Wed, Jul 22, 2015 at 11:49 PM, Simon Glass wrote:
> Disable a few things which interfere with the EFI init. This allows the
> Minnowboard MAX to boot into EFI, load a U-Boot payload then boot to the
> U-Boot prompt.
>
> Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
But please
Hi Simon,
On Wed, Jul 22, 2015 at 11:49 PM, Simon Glass wrote:
> Disable a few things which interfere with the EFI init. This allows QEMU to
> to boot into EFI, load a U-Boot payload then boot to the U-Boot prompt.
>
> Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
But please see nits below
Hi Simon,
Reviewed-by: Bin Meng
But please see nits below.
On Wed, Jul 22, 2015 at 11:49 PM, Simon Glass wrote:
> We cannot use this driver when running from EFI as we have no direct hardware
> access. Coreboot uses a different driver which uses tables provided by
coreboot. I don't see any of
On Wed, Jul 22, 2015 at 11:49 PM, Simon Glass wrote:
> Add some documentation on the EFI implementation in U-Boot.
>
> Signed-off-by: Ben Stoltz
> Signed-off-by: Simon Glass
> ---
>
Well written doc!
Reviewed-by: Bin Meng
But please check nits below.
> doc/README.efi | 237
> +
On Fri, Jul 24, 2015 at 5:03 PM, Bin Meng wrote:
> Hi Simon,
>
> On Wed, Jul 22, 2015 at 11:49 PM, Simon Glass wrote:
>> When U-Boot is running from EFI some of the x86 init is replaced with
>> EFI-specific init. For example, since DRAM has already been set up, we only
>> need to find it, not ini
On Thursday, July 23, 2015 at 09:25:17 PM, Adrian Alonso wrote:
> Add support for usb driver for i.MX7D SoC
>
> Signed-off-by: Adrian Alonso
> Signed-off-by: Ye.Li
> Signed-off-by: Peng Fan
So errr, why exactly can ehci-mx6 not be used here ? The code looks
almost like a copy of ehci-mx6 with
Hello Stefan,
sorry for replaying late.
Am 06.07.2015 um 13:36 schrieb Stefan Roese:
> This patch adds support for the "OHB System AG" baseboard
> with is equipped with the TQMa6S SoM.
>
> Signed-off-by: Stefan Roese
Acked-by Markus Niebel
> Cc: Markus Niebel
> Cc: Stefano Babic
> ---
> v2
Signed-off-by: Yangbo Lu
---
include/configs/ls2085a_simu.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/configs/ls2085a_simu.h b/include/configs/ls2085a_simu.h
index d0d2eed..bd15b3d 100644
--- a/include/configs/ls2085a_simu.h
+++ b/include/configs/ls2085a_simu.h
@@ -
Lokesh,
On 07/24/2015 12:20 AM, Lokesh Vutla wrote:
Hi Vitaly,
On Thursday 23 July 2015 11:31 PM, Vitaly Andrianov wrote:
On 07/22/2015 11:39 AM, Lokesh Vutla wrote:
This is just a cosmetic change that makes
the calling of pll init code looks much cleaner.
Signed-off-by: Lokesh Vutla
---
On Friday 24 July 2015 12:59 AM, Tom Rini wrote:
On Wed, Jul 22, 2015 at 09:09:11PM +0530, Lokesh Vutla wrote:
Add proper register definition for JTAG ID and
cleanup cpu_is_* functions.
Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini
Thanks for the review Tom.
Vitaly has some comments.
On 07/22/2015 05:51 PM, Sören Brinkmann wrote:
> On Wed, 2015-07-22 at 05:38PM +0200, Michal Simek wrote:
>> ps-clk-frequency is platform specific setting and shouldn't be the part
>> of DTSI.
>>
>> Signed-off-by: Michal Simek
>> ---
>>
>> Sync with mainline.
>>
>> ---
>> arch/arm/dts/zynq-7000.d
Hi,
>> Tegra124 requires the bootloader to perform VPR initialization, otherwise the
>> GPU cannot be used by the system. Since using the GPU without that
>> initialization results in a hang, the GPU DT node is left disabled, and it is
>> the task of the bootloader to enable it after ensuring it i
Signed-off-by: Codrin Ciubotariu
---
Changes for v3:
- none; new patch;
drivers/net/vsc9953.c | 38 +++---
include/vsc9953.h | 46 +++---
2 files changed, 42 insertions(+), 42 deletions(-)
diff --git a/drivers/
The new bitfield value must not be higher than its mask.
Signed-off-by: Codrin Ciubotariu
---
include/bitfield.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/bitfield.h b/include/bitfield.h
index cffaf7a..a59f3c2 100644
--- a/include/bitfield.h
+++ b/include/bitfie
When a port is enabled at init time, the initializing function
touches more bits than necessary to enable a port (also touches
reserved bits and default bit values). This patch fixes this issue
by changing the value of the define used to enable the port and
assures that no other bits are changes by
This patch groups some macros defined for registers and
replaces some magic numbers from vsc9953 with macros. Also,
"port" and "port_nr" words are replaced with "port_no",
puts each variable declaration on a line and removes
unnecessary tabs.
Signed-off-by: Codrin Ciubotariu
---
Changes for v2:
These new operations allow manipulation of bitfields
within a word by using a mask instead of width and
shift values to extract/replace the bitfields.
Signed-off-by: Codrin Ciubotariu
---
Changes for v3:
- none; new patch;
include/bitfield.h | 32
1 fil
The VSC9953 DS reserves a register between vlan_mask and anag_efil
registers.
Signed-off-by: Johnson Leung
Signed-off-by: Codrin Ciubotariu
---
Changes for v2:
- removed Change-id field;
Changes for v3:
- added signature;
include/vsc9953.h | 1 +
1 file changed, 1 insertion(+
This patch creates a flexible parser for Ethernet Switch
configurations that should support complex commands.
The parser searches for predefined keywords in the command
and calls the proper function when a match is found.
Also, the parser allows for optional keywords, such as
"port", to apply the c
At startup, the default configuration should be:
- enable HW learning on all ports (HW default);
- all ports are VLAN aware;
- all ports are members of VLAN 1;
- all ports have Port-based VLAN 1;
- on all ports, the switch is allowed to remove
maximum one VLAN tag,
- on egress, the switch
This patch replaces the parser used by VSC9953 L2 Switch driver with
the generic one. Also, the config macro that enables the
VSC9953 commands has been replaced in all the platforms that
use this driver with the config macro that corresponds to the
generic parser.
Signed-off-by: Codrin Ciubotariu
The new added command:
ethsw [port ] statistics { [help] | [clear] }
will print counters like the number of Rx/Tx frames,
number of Rx/Tx bytes, number of Rx/Tx unicast frames, etc.
This patch also adds this commnd in the genereric ethsw
parser from cmd_ethsw.c
Signed-off-by: Codrin Ciubotariu
-
The new added commands can be used to configure VLANs for a port
on both ingress and egress.
The new commands are:
ethsw [port ] pvid { [help] | show | }
- set/show PVID (ingress and egress VLAN tagging) for a port;
ethsw [port ] vlan { [help] | show | add | del }
- add a VLAN to a port (VLAN
The new command:
ethsw [port ] [vlan ] fdb
{ [help] | show | flush | { add | del } }
Can be used to add and delete FDB entries. Also, the command can be used
to show entries from the FDB tables. When used with [port ]
and [vlan ], only the matching the FDB entries can be seen or
flushed.
The command:
ethsw [port ] learning { [help] | show | auto | disable }
can be used to enable/disable HW learning on a port.
This patch also adds this command to the generic ethsw parser from
cmd_ethsw.
Signed-off-by: Johnson Leung
Signed-off-by: Codrin Ciubotariu
---
Changes for v2:
-
The code from common/env_flags.c that checks if a
string has the format of a MAC address has been moved
in net/eth.c as a separate function called
eth_validate_ethaddr_str().
Signed-off-by: Codrin Ciubotariu
---
Changes for v3:
- none, new patch;
common/env_flags.c | 15 ++-
On Thu, Jul 23, 2015 at 10:17:29PM -0600, Stephen Warren wrote:
> On 07/14/2015 09:44 AM, Simon Glass wrote:
> > Hi Stephen,
> >
> > On 13 July 2015 at 22:52, Stephen Warren wrote:
> >> On 07/11/2015 08:04 AM, Simon Glass wrote:
> >>> Hi Stephen,
> >>>
> >>> On 10 July 2015 at 23:34, Stephen Warr
The command:
ethsw vlan fdb { [help] | show | shared | private }
- make VLAN learning shared or private"
configures the FDB to share the FDB entries learned on multiple VLANs
or to keep them separated. By default, the FBD uses private VLAN
learning. This command has also been added to the ethsw g
Signed-off-by: Codrin Ciubotariu
---
Changes for v2:
- removed Change-id field;
Changes for v3:
- this patch also includes the Copyright year updates for the modified
values;
drivers/net/vsc9953.c | 2 +-
include/vsc9953.h | 11 +++
2 files changed, 4 insertions(+
The command:
ethsw [port ] ingress filtering
{ [help] | show | enable | disable }
- enable/disable VLAN ingress filtering on port
can be used to enable/disable/show VLAN ingress filtering on a port.
This command has also been added to the ethsw generic parser
from common/cmd_ethsw.c
Signed
This patch set adds several features for VSC9953 L2 Switch:
- VLAN configuration;
- port statistics;
- FDB table operations;
- enable/disable HW learning;
- private/shared VLAN learning.
Also, the parser needed to be changed to allow commands with optional
On Thu, Jul 23, 2015 at 06:25:54PM -0700, Ash Charles wrote:
> Hi,
>
> In testing v2015.07 with OMAP35xx (Overo) boards (ES3.1), I see boot
> failure which I bisected down to this patch. Reverting just this
> patch from v2015.07 allows the same boards to boot into SPL without
> issue. My OMAP37
Hi Codrin,
On Fri, Jul 24, 2015 at 8:52 AM, Codrin Ciubotariu
wrote:
> The new bitfield value must not be higher than its mask.
>
> Signed-off-by: Codrin Ciubotariu
> ---
Reviewed-by: Joe Hershberger
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http:
ARM erratum 801819 ("An eviction from L1 data cache might stall
indefinitely in the L2 write buffer preventing a snoop from
completing") applies to A15 which may not have the erratum fix
integrated (CPUID maynot exactly help here, since certain SoC
versions might choose to pick up just the fix and
The ci_udc driver request allocation assumes that the endpoint descriptor
pointer is set to retrieve the endpoint number, but that is only true
when the endpoint is enabled. This results in a NULL ptr dereference
which for me happens to return 0 value. This causes the EP0 request
struct to be retur
On Fri, Jul 24, 2015 at 7:04 AM, Tom Rini wrote:
> Can you give us more details on the exact nature of the failure? Thanks!
Oh sorry--that wasn't clear! The boards appear to get stuck in SPL
before anything can be printed to the console. Basically, I power on,
see gunk from the boot rom on the c
Hi Marek,
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: Friday, July 24, 2015 4:44 AM
> To: Alonso Lazcano Adrian-B38018
> Cc: u-boot@lists.denx.de; sba...@denx.de; ota...@ossystems.com.br;
> Estevam Fabio-R49496; Li Frank-B20596; Garg Nitin-B37173
> Subject: Re:
On 07/23/2015 08:45 PM, Simon Glass wrote:
> Hi York,
>
> On 23 July 2015 at 19:15, York Sun wrote:
>>
>>
>> On 07/23/2015 03:24 PM, Simon Glass wrote:
>>> Hi York,
>>>
>>> On 23 July 2015 at 16:10, York Sun wrote:
Simon,
I am facing a weird issue on the latest u-boot. I can suc
On Friday, July 24, 2015 at 05:34:27 PM, Alonso Adrian wrote:
> Hi Marek,
Hi!
> > -Original Message-
> > From: Marek Vasut [mailto:ma...@denx.de]
> > Sent: Friday, July 24, 2015 4:44 AM
> > To: Alonso Lazcano Adrian-B38018
> > Cc: u-boot@lists.denx.de; sba...@denx.de; ota...@ossystems.com
Le mercredi 22 juillet 2015 à 11:17 +0200, Hans de Goede a écrit :
> Hi,
>
> On 22-07-15 10:45, Paul Kocialkowski wrote:
> > Now that the musb-new driver has a Kconfig, we can move Kconfig options to
> > enable controllers to it, so that it's easier in e.g. menuconfig.
> >
> > Signed-off-by: Paul
Le mercredi 22 juillet 2015 à 11:22 +0200, Hans de Goede a écrit :
> Hi,
>
> On 22-07-15 10:45, Paul Kocialkowski wrote:
> > The USB_KEYBOARD Kconfig is not specific to sunxi, so we can move it to the
> > common USB Kconfig.
> >
> > Signed-off-by: Paul Kocialkowski
> > ---
> > board/sunxi/Kconf
Le mercredi 22 juillet 2015 à 11:31 +0200, Hans de Goede a écrit :
> Hi,
>
> On 22-07-15 10:45, Paul Kocialkowski wrote:
> > This makes sunxi boards use the USB_EHCI_HCD Kconfig option instead of
> > defining
> > USB_EHCI as a config define. This allows for more flexibility in enabling
> > the
>
Le mercredi 22 juillet 2015 à 11:37 +0200, Hans de Goede a écrit :
> Hi,
>
> On 22-07-15 10:45, Paul Kocialkowski wrote:
> > USB_STORAGE and USB_KEYBOARD should only be selected when either
> > USB_EHCI_HCD or
> > USB_MUSB_HOST is set. In addition, the musb controller should automatically
> > be
Le jeudi 23 juillet 2015 à 09:15 +0200, Lukasz Majewski a écrit :
> Hi Paul,
>
> > Le lundi 20 juillet 2015 à 14:57 +0200, Lukasz Majewski a écrit :
> > > Hi Paul,
> > >
> > > > FASTBOOT is defined both by CONFIG_USB_FUNCTION_FASTBOOT AND
> > > > CONFIG_CMD_FASTBOOT, so it doesn't make much sense
On 07/24/2015 09:14 AM, Rob Herring wrote:
The ci_udc driver request allocation assumes that the endpoint descriptor
pointer is set to retrieve the endpoint number, but that is only true
when the endpoint is enabled. This results in a NULL ptr dereference
which for me happens to return 0 value. T
On Friday, July 24, 2015 at 07:24:28 PM, Paul Kocialkowski wrote:
> Le jeudi 23 juillet 2015 à 09:15 +0200, Lukasz Majewski a écrit :
> > Hi Paul,
> >
> > > Le lundi 20 juillet 2015 à 14:57 +0200, Lukasz Majewski a écrit :
> > > > Hi Paul,
> > > >
> > > > > FASTBOOT is defined both by CONFIG_USB_
On Friday, July 24, 2015 at 05:14:21 PM, Rob Herring wrote:
> The ci_udc driver request allocation assumes that the endpoint descriptor
> pointer is set to retrieve the endpoint number, but that is only true
> when the endpoint is enabled. This results in a NULL ptr dereference
> which for me happe
The following changes since commit b217c89e8565ade3aaa9f74c33c93236bf151187:
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq (2015-07-20
17:12:52 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-usb.git HEAD
for you to fetch changes up to 58d6d139c3e7bb92
Hi Bin,
I've merged in u-boot-x86/master to upstream/master and pushed it to
u-boot-x86/testing.
Can you please give it a test and make sure your PCI fixes are still correct?
Regards,
Simon
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On 07/24/2015 10:12 AM, Nishanth Menon wrote:
> ARM erratum 801819 ("An eviction from L1 data cache might stall
> indefinitely in the L2 write buffer preventing a snoop from
> completing") applies to A15 which may not have the erratum fix
> integrated (CPUID maynot exactly help here, since certain
Simon's 'tegra124: Implement spl_was_boot_source()' needs
a prototype for save_boot_params_ret() to build cleanly
for 64-bit Tegra210.
Signed-off-by: Tom Warren
---
Changes in V3: None
Changes in V2: New patch
arch/arm/mach-tegra/board.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arc
Based on T124 Venice2. SDMMC1 is SD-card slot.
Signed-off-by: Tom Warren
---
Changes in V3:
- made DTS file conform with 64-bit FDT
- removed untested/unneeded nodes like APBDMA, PWM, etc.
Changes in V2: None
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/tegra210-p2571.dts | 106 ++
This patch series adds support for the Tegra210
SoC and the P2571 board. Most of the T210 info
is identical to T124 at this point, so I just
cloned Venice2/Jetson-TK1 board files and T124
header/SoC code. Pinmux is the major area of
difference at this time, but other changes will
be made as more f
Moved Tegra config options to mach-tegra/Kconfig so that both
32-bit and 64-bit builds can co-exist for Tegra SoCs.
T210 will be 64-bit only (no SPL) and will require a 32-bit
AVP/BPMP loader.
Signed-off-by: Tom Warren
---
Changes in V3:
- used common ARMV7 Kconfig option for 32-bit T210 Tegra
Based on Venice2, incorporates Stephen Warren's
latest P2571 pinmux table.
With Thierry Reding's 64-bit build fixes, this
will build and and boot in 64-bit on my P2571
(when used with a 32-bit AVP loader).
Signed-off-by: Tom Warren
---
Changes in V3:
- fix COUNTER_FREQUENCY to match T210/P2571 O
All based off of Tegra124. As a Tegra210 board is brought
up, these may change a bit to match the HW more closely,
but probably 90% of this is identical to T124.
Note that since T210 is a 64-bit build, it has no SPL
component, and hence no cpu.c for Tegra210.
Signed-off-by: Tom Warren
---
Change
Derived from Tegra124, modified as appropriate during T210
board bringup. Cleaned up debug statements to conserve
string space, too. This also adds misc 64-bit changes
from Thierry Reding/Stephen Warren.
Signed-off-by: Tom Warren
Signed-off-by: Thierry Reding
Signed-off-by: Stephen Warren
---
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