Hi Stefan,
On Mon, Jan 18, 2016 at 5:56 PM, Stefan Roese wrote:
> On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
> are provided by a superio chip connected to the LPC bus. We must
> program the superio chip so that serial ports are available for us.
>
>
Hi Stefan,
On Mon, Jan 18, 2016 at 5:56 PM, Stefan Roese wrote:
> The FSP enables the BayTrail internal UART (again). Boards that don't use
> this UART but an external one instead (e.g. provided by a Super IO chip)
> need to disable this internal UART. So that the one from the
Hi Stefan,
On Mon, Jan 18, 2016 at 5:56 PM, Stefan Roese wrote:
> Some BayTrail boards may want to use a different legacy UART than the
> internal one. E.g. one provided by a Winbond Super IO chip, like the
> W83627. This patch adds a function to disable this BayTrail internal
>
Hi Stefan,
On Tue, Jan 19, 2016 at 4:40 PM, Bin Meng wrote:
> Hi Stefan,
>
> On Mon, Jan 18, 2016 at 5:56 PM, Stefan Roese wrote:
>> Some BayTrail boards may want to use a different legacy UART than the
>> internal one. E.g. one provided by a Winbond Super IO
On 19/01/2016 08:13, Peng Fan wrote:
> From: Peng Fan
>
> Add CONFIG_SPI_FLASH_STMICRO to let qspi driver can detect the
> qspi chips.
> "
> => sf probe
> SF: Detected N25Q256 with page size 256 Bytes, erase size 64 KiB, total 32 MiB
> "
>
> Signed-off-by: Peng Fan
Hi Miao,
On Tue, Jan 19, 2016 at 10:39 AM, Miao Yan wrote:
> Hi Bin,
>
> 2016-01-16 21:24 GMT+08:00 Bin Meng :
>> Hi Miao,
>>
>> On Fri, Jan 15, 2016 at 11:12 AM, Miao Yan wrote:
>>> This patch adds the ability to load and link
Hi Miao,
On Tue, Jan 19, 2016 at 10:46 AM, Miao Yan wrote:
> Hi Bin,
>
> 2016-01-16 21:23 GMT+08:00 Bin Meng :
>> Hi Miao,
>>
>> On Fri, Jan 15, 2016 at 11:12 AM, Miao Yan wrote:
>>> Enable ACPI IO space for piix4 (for pc board)
Hi Bin,
On 19.01.2016 09:44, Bin Meng wrote:
On Tue, Jan 19, 2016 at 4:40 PM, Bin Meng wrote:
Hi Stefan,
On Mon, Jan 18, 2016 at 5:56 PM, Stefan Roese wrote:
Some BayTrail boards may want to use a different legacy UART than the
internal one. E.g. one
Hi Chris,
On 18/01/2016 00:36, Chris Packham wrote:
> Hi,
>
> Is there any hook for performing board specific actions prior to
> booting the OS. A quick google search turned up this thread from
> 2014[1]. But the eventual outcome seemed to be that the device model
> will take care of restoring
Hi Simon,
On Tue, Jan 19, 2016 at 11:39 AM, Simon Glass wrote:
> This series adds an interrupt driver for x86. Since different platforms
> can implement this in their own way, we no-longer need the platform-specific
> weak function. We can also dispense with the
Hi Bin,
On 19.01.2016 09:40, Bin Meng wrote:
Hi Stefan,
On Mon, Jan 18, 2016 at 5:56 PM, Stefan Roese wrote:
The FSP enables the BayTrail internal UART (again). Boards that don't use
this UART but an external one instead (e.g. provided by a Super IO chip)
need to disable this
Hi Bin,
(added Simon again to Cc)
On 19.01.2016 09:44, Bin Meng wrote:
> Hi Stefan,
>
> On Tue, Jan 19, 2016 at 4:40 PM, Bin Meng wrote:
>> Hi Stefan,
>>
>> On Mon, Jan 18, 2016 at 5:56 PM, Stefan Roese wrote:
>>> Some BayTrail boards may want to use a
Hi Stefan,
On Tue, Jan 19, 2016 at 5:29 PM, Stefan Roese wrote:
> Hi Bin,
>
> (added Simon again to Cc)
>
> On 19.01.2016 09:44, Bin Meng wrote:
>> Hi Stefan,
>>
>> On Tue, Jan 19, 2016 at 4:40 PM, Bin Meng wrote:
>>> Hi Stefan,
>>>
>>> On Mon, Jan 18, 2016 at
Hi Wenbin,
On Tue, Jan 19, 2016 at 6:21 PM, Wenbin Song wrote:
> Hi: Bin,
> Because we use the ns16550 as the early console when booting kernel ,
> and the earlycon driver on kernel cannot initialize port->uartclk rightly,
> So if we want to use it, we must
Hi Bin,
On 19.01.2016 11:15, Bin Meng wrote:
On Tue, Jan 19, 2016 at 5:29 PM, Stefan Roese wrote:
Hi Bin,
(added Simon again to Cc)
On 19.01.2016 09:44, Bin Meng wrote:
Hi Stefan,
On Tue, Jan 19, 2016 at 4:40 PM, Bin Meng wrote:
Hi Stefan,
On Mon, Jan
Hi Stefan,
On Tue, Jan 19, 2016 at 6:54 PM, Stefan Roese wrote:
> Hi Bin,
>
>
> On 19.01.2016 11:15, Bin Meng wrote:
>>
>> On Tue, Jan 19, 2016 at 5:29 PM, Stefan Roese wrote:
>>>
>>> Hi Bin,
>>>
>>> (added Simon again to Cc)
>>>
>>> On 19.01.2016 09:44, Bin Meng
From: Gong Qianyu
Enable three DSPI flash memories on board.
Commands:
=> sf probe 1:0
SF: Detected N25Q128A with page size 256 Bytes,
erase size 64 KiB, total 16 MiB
=> sf probe 1:1
SF: Detected SST25WF040B with page size 256 Bytes,
From: Gong Qianyu
QSPI and IFC are pin-multiplexed on LS1043A. So we use
ls1043aqds_sdcard_ifc_defconfig to support IFC in SD boot and
ls1043aqds_sdcard_qspi_defconfig to support QSPI in SD boot.
Signed-off-by: Gong Qianyu
---
V4:
- No
Enable the U-Boot Driver Model(DM) to use the Freescale QSPI driver.
Signed-off-by: Gong Qianyu
---
V3-V4:
- No change.
V2:
- Fix blank line issues.
arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 2 ++
board/freescale/ls1043aqds/MAINTAINERS | 1 +
Hi Tom,
The following changes since commit 52bc7c7e2b31d6ba8d394f3d22b551abfa365363:
eeprom: fix eeprom write procedure (2015-12-16 10:31:31 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-video.git master
for you to fetch changes up to
Hi Wenbin,
On Tue, Jan 19, 2016 at 2:48 PM, Wenbin Song wrote:
> ---
Please include a commit message and SoB here.
> configs/ls1043aqds_lpuart_defconfig | 8
> 1 file changed, 8 insertions(+)
> create mode 100644 configs/ls1043aqds_lpuart_defconfig
>
> diff
Hi Wenbin,
On Tue, Jan 19, 2016 at 2:48 PM, Wenbin Song wrote:
> From: Wenbin Song
>
> Need to initialize ns16550 to support earlycon on kernel.
>
> Signed-off-by: Wenbin Song
> Signed-off-by: Mingkai Hu
Hi Wenbin,
On Tue, Jan 19, 2016 at 2:48 PM, Wenbin Song wrote:
> From: Shaohui Xie
>
Please try to add a commit message.
> Signed-off-by: Shaohui Xie
> Signed-off-by: Mingkai Hu
> ---
>
Hi Wenbin,
On Tue, Jan 19, 2016 at 2:48 PM, Wenbin Song wrote:
> From: songwenbin
>
> If configured CONFIG_LPUART, should undefine the NS16550
>
> Signed-off-by: Wenbin Song
> ---
> include/configs/ls1043aqds.h | 11
Hello Simon,
Am 19.01.2016 um 04:42 schrieb Simon Glass:
Hi Heiko,
On 15 January 2016 at 23:29, Heiko Schocher wrote:
Hello Simon,
Am 15.01.2016 um 00:12 schrieb Simon Glass:
Hi Heiko,
On 16 December 2015 at 22:45, Heiko Schocher wrote:
Hello Stephen,
Am
On Wed, Oct 14, 2015 at 09:55:46AM -0700, Sergey Temerkhanov wrote:
> This commit adds functions issuing calls to secure monitor or
> hypervisore. This allows using services such as Power State
> Coordination Interface (PSCI) provided by firmware, e.g. ARM
> Trusted Firmware (ATF)
>
> The SMC
On Wed, Oct 14, 2015 at 09:55:49AM -0700, Sergey Temerkhanov wrote:
> This commit adds the FDT for the ThunderX family of SoCs
>
> Signed-off-by: Sergey Temerkhanov
> Signed-off-by: Radha Mohan Chintakuntla
>
> Reviewed-by: Simon Glass
On Wed, Oct 14, 2015 at 09:55:52AM -0700, Sergey Temerkhanov wrote:
> Change the dram_init() function on ThunderX to query ATF services for
> the real installed DRAM size
>
> Signed-off-by: Sergey Temerkhanov
> Signed-off-by: Radha Mohan Chintakuntla
On Wed, Oct 14, 2015 at 09:55:50AM -0700, Sergey Temerkhanov wrote:
> This commit adds basic Cavium ThunderX 88xx board definitions and support.
>
> Signed-off-by: Sergey Temerkhanov
> Signed-off-by: Radha Mohan Chintakuntla
With a minor
On Wed, Oct 14, 2015 at 09:55:47AM -0700, Sergey Temerkhanov wrote:
> This commit adds the psci.h header file from Linux kernel
> which contains definitions related to the PSCI interface provided
> by firmware
>
> Signed-off-by: Sergey Temerkhanov
> Signed-off-by: Radha
On Wed, Oct 14, 2015 at 09:55:45AM -0700, Sergey Temerkhanov wrote:
> This patch adds code which sets up 2-level page tables on ARM64 thus
> extending available VA space. CPUs implementing 64k translation
> granule are able to use direct PA-VA mapping of the whole 48 bit
> address space.
> It
On Wed, Oct 14, 2015 at 09:54:24AM -0700, Sergey Temerkhanov wrote:
> This patch adds Kconfig entries to facilitate usage of pl01x as
> a debug UART.
>
> Signed-off-by: Sergey Temerkhanov
> Signed-off-by: Radha Mohan Chintakuntla
>
>
On Wed, Oct 14, 2015 at 09:54:23AM -0700, Sergey Temerkhanov wrote:
> This patch adds an ability to use pl01x as a debug UART. It must
> be configured like other types of debug UARTs
>
> Signed-off-by: Sergey Temerkhanov
> Signed-off-by: Radha Mohan Chintakuntla
On Wed, Oct 14, 2015 at 09:55:44AM -0700, Sergey Temerkhanov wrote:
> This patch adds the read_mpidr() function which returns the
> MPIDR_EL1 register value
>
> Signed-off-by: Sergey Temerkhanov
> Signed-off-by: Radha Mohan Chintakuntla
>
>
On Wed, Oct 14, 2015 at 09:55:51AM -0700, Sergey Temerkhanov wrote:
> This commit adds functions issuing calls to the product-specific ATF
> services
>
> Signed-off-by: Sergey Temerkhanov
> Signed-off-by: Radha Mohan Chintakuntla
Applied to
On Wed, Oct 14, 2015 at 09:55:48AM -0700, Sergey Temerkhanov wrote:
> On some systems, UART initialization is performed before running U-Boot.
> This commit allows to skip UART re-initializaion on those systems
>
> Signed-off-by: Sergey Temerkhanov
> Signed-off-by:
On Mon, Jan 18, 2016 at 02:17:43PM +0530, Mugunthan V N wrote:
> Enable sata driver model for dra72_evm as dwc_ahci supports
> driver model
>
> Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signature
On Thu, Jan 14, 2016 at 01:02:03PM -0500, Tom Rini wrote:
> Enabling this function always removes some class of string saftey issues.
> The size change here in general is about 400 bytes and this seems a reasonable
> trade-off.
>
> Cc: Peng Fan
> Cc: Peter Robinson
On Thu, Jan 14, 2016 at 06:24:44PM -0500, Tom Rini wrote:
> A general best practice for SPDX is that Makefiles should have an
> identifier, add these as everything else is currently covered.
>
> Signed-off-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
On Thu, Jan 14, 2016 at 01:02:05PM -0500, Tom Rini wrote:
> Only when we have CONFIG_CMD_UNZIP enabled do we have the 'gzwrite'
> command. While this command should be separated from CONFIG_CMD_UNZIP
> we should also only include the write portion of the gz code in that
> case as well.
>
>
On Tue, Jan 19, 2016 at 08:58:45AM +0100, Anatolij Gustschin wrote:
> Hi Tom,
>
> The following changes since commit 52bc7c7e2b31d6ba8d394f3d22b551abfa365363:
>
> eeprom: fix eeprom write procedure (2015-12-16 10:31:31 -0500)
>
> are available in the git repository at:
>
>
On Thu, Jan 14, 2016 at 01:02:04PM -0500, Tom Rini wrote:
> Both of these boards are very close to their limit and with some toolchains
> such as gcc 5.x are too large. Switch to tiny printf to reclaim some size.
>
> Signed-off-by: Tom Rini
Applied to u-boot/master,
On 01/14/2016 08:49 PM, Prabhakar Kushwaha wrote:
>
>> -Original Message-
>> From: york sun [mailto:york@nxp.com]
>> Sent: Thursday, January 14, 2016 10:36 PM
>> To: Ashish Kumar ; u-boot@lists.denx.de
>> Cc: Prabhakar Kushwaha
>>
On 01/10/2016 06:15 PM, Gong Qianyu wrote:
> From: Gong Qianyu
>
> In current driver everytime we memcpy 4 bytes to the dest memory
> regardless of the remaining length.
> This patch adds checking the remaining length before memcpy.
> If the length is shorter than 4
On Fri, Dec 18, 2015 at 02:17:10PM +0900, Masahiro Yamada wrote:
> Currently, this function returns wrong size if "bootm_low" is defined,
> but "bootm_size" is not.
>
> Signed-off-by: Masahiro Yamada
> Reviewed-by: Simon Glass
Applied to
On Mon, Jan 18, 2016 at 07:29:32AM -0800, Bin Meng wrote:
> With driver model timer conversion, quark based board does not boot
> any more as mdelay() is called during quark_pcie_early_init() which
> is before driver model gets initialized. Fix this breakage.
>
> Signed-off-by: Bin Meng
On Mon, Jan 18, 2016 at 02:17:38PM +0530, Mugunthan V N wrote:
> All the clocks which has to be enabled has to be done in
> enable_basic_clocks(), so moving enable sata clock to common
> clocks enable function.
>
> Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
On Sat, Jan 16, 2016 at 02:50:26PM +, Tom Rini wrote:
> With gcc-5.x we get:
> drivers/pci/pci_rom.c: In function 'dm_pci_run_vga_bios':
> drivers/pci/pci_rom.c:352:3: warning: 'ram' may be used uninitialized in
> this function [-Wmaybe-uninitialized]
>
> While unconvinced that this can
On Mon, Jan 18, 2016 at 02:17:41PM +0530, Mugunthan V N wrote:
> Implement a sata driver for Synopsys DWC sata device based on
> U-boot driver model.
>
> Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital
On Sun, Jan 17, 2016 at 02:42:41AM +, Tom Rini wrote:
> We need to use %lx not %x to describe a fdt_addr_t
>
> Cc: Simon Glass
> Signed-off-by: Tom Rini
Reworded the subject and applied to u-boot/master, thanks!
--
Tom
signature.asc
Description:
On Sun, Jan 17, 2016 at 02:44:37AM +, Tom Rini wrote:
> With gcc-5.3 we get a warning for using switch() on a bool type.
> Rewrite these sections as if/else and update the one section that was
> using 1/0 instead of true/false.
>
> Cc: Simon Glass
> Cc: Przemyslaw Marczak
On Thu, Jan 14, 2016 at 10:05:13PM -0500, Tom Rini wrote:
> In a number of places we had wordings of the GPL (or LGPL in a few
> cases) license text that were split in such a way that it wasn't caught
> previously. Convert all of these to the correct SPDX-License-Identifier
> tag.
>
>
On Mon, Jan 18, 2016 at 02:17:40PM +0530, Mugunthan V N wrote:
> Prepare sata driver for DM conversion by abstracting sata phy
> init to seperate function.
>
> Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description:
On Mon, Jan 18, 2016 at 02:17:42PM +0530, Mugunthan V N wrote:
> Enable sata driver model for dra74_evm as dwc_ahci supports
> driver model
>
> Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signature
> "Tom" == Tom Rini writes:
Hi,
>> #define CONFIG_EXTRA_ENV_SETTINGS"x_bootargs=console"\
>> "=ttyS0,115200 mtdparts="CONFIG_MTDPARTS\
>> - "x_bootcmd_kernel=nand read 0x640 0x10 0x30\0" \
>> + "x_bootcmd_kernel=nand read 0x640 0x10
The iocon and bamboo boards are often on the verge of, or going over,
their allowed size limits depending on toolchain used. If we turn off
CONFIG_SYS_LONGHELP we can gain approximately 14KiB back.
Cc: Dirk Eibach
Cc: Stefan Roese
Signed-off-by: Tom Rini
On 01/10/2016 06:14 PM, Gong Qianyu wrote:
> From: Gong Qianyu
>
> This patch fixes the following compile warning:
> drivers/spi/fsl_qspi.c: In function 'fsl_qspi_probe':
> drivers/spi/fsl_qspi.c:937:15:
> warning: cast to pointer from integer of different size
>
Hi,
I am an application software guy learning low-level embedded programming.
I am trying to block/disable u-boot console access all together. Is there
any helpful documentation for this topic.
The things I gathered until now:
1. Disable Serial Port pins.
Question - If an attacker gains root
Hi,
I am an application software guy learning low-level embedded programming.
I am trying to block/disable u-boot console access all together. Is there
any helpful documentation for this topic.
The things I gathered until now:
1. Disable Serial Port pins.
Question - If an attacker gains
On Tuesday, January 19, 2016 at 04:16:21 PM, Dinh Nguyen wrote:
> Revert "arm: socfpga: set the fpga global bit to disable HPS to FPGA
> signals"
>
> Apparently, the logic for the FPGA global bit is not universal between Gen5
> and Gen10 devices is not the same. Disabling this bit, while
Hi Tom,
Sorry for the short interval from the previous one,
but please pull one more series.
The following changes since commit 3ed2ece5e162b104cd3ea3788cae841ecd24408f:
armv8: cavium: Get DRAM size from ATF (2016-01-19 22:26:13 +)
are available in the git repository at:
2016-01-20 2:05 GMT+09:00 Masahiro Yamada :
> The if block does the same as the else block does. The conditional
> is not necessary at all.
>
> Signed-off-by: Masahiro Yamada
Applied to u-boot-uniphier/master.
--
Best Regards
2016-01-17 10:13 GMT+09:00 Masahiro Yamada :
> Masahiro Yamada (4):
> ARM: uniphier: refactor outer cache operation slightly
> ARM: uniphier: factor out outer cache sync as a helper function
> ARM: uniphier: fix range invalidate for outer cache
> ARM:
On Fri, Jan 15, 2016 at 06:06:10AM +0100, Alexander Graf wrote:
> When an EFI application runs, it has access to a few descriptor and callback
> tables to instruct the EFI compliant firmware to do things for it. The bulk
> of those interfaces are "boot time services". They handle all object
>
On Tue, Jan 19, 2016 at 09:07:18PM +0800, Ye Li wrote:
>The OFFSET_BITS_MASK should mask bit from 0-23.
>By using GENMASK(24, 0), when using the fast read common (0xb), a
>invalid sf_addr 0x100 is produced by swab32(txbuf) & OFFSET_BITS_MASK.
>
>Signed-off-by: Ye Li
>---
>
On Tue, Jan 19, 2016 at 09:16:35PM +0800, Ye Li wrote:
>The i.MX6SX and i.MX6UL has two ENET controllers, add support for reading
>MAC address from fuse for ENET2.
>
>Signed-off-by: Ye Li
Reviewed-by: Peng Fan
>---
> arch/arm/cpu/armv7/mx6/soc.c |
On Tue, Jan 19, 2016 at 09:16:36PM +0800, Ye Li wrote:
>Initial version for mx6sx SABREAUTO board support with features:
>PMIC, QSPI, NAND flash, SD/MMC, USB, Ethernet, I2C, IO Expander.
>
>Signed-off-by: Ye Li
Tested-by: Peng Fan
>---
>
Adapted from:
>From 5631d9c429857194bd55d7bcd8fa5bdd1a9899a3 Mon Sep 17 00:00:00 2001
From: Michal Marek
Date: Wed, 19 Aug 2015 17:36:41 +0200
Subject: [PATCH 1/1] kbuild: Fix clang detection
We cannot detect clang before including the arch Makefile, because that
can set the
For compatibility clang will report some gcc version. However since we
are checking gcc versions in order to then fail to build, we should
limit these tests only to when we are using gcc and not clang.
Signed-off-by: Tom Rini
---
arch/arm/config.mk |3 ++-
On Tuesday, January 19, 2016 at 04:50:06 PM, Dinh Nguyen wrote:
> Hi Marek,
Hi Dinh,
> On 01/19/2016 09:16 AM, Dinh Nguyen wrote:
> > Revert "arm: socfpga: set the fpga global bit to disable HPS to FPGA
> > signals"
>
> I apologize for the original patch "arm: socfpga: set the fpga global
> bit
> -Original Message-
> From: york sun
> Sent: Wednesday, January 20, 2016 12:02 AM
> To: Prabhakar Kushwaha ; Ashish Kumar
> ; u-boot@lists.denx.de
> Subject: Re: [PATCH] ls2-2085ardb: Correct the model name of ls2085ardb
>
> On
On Wed, Jan 20, 2016 at 08:54:21AM +0900, Masahiro Yamada wrote:
> Hi Tom,
>
> Sorry for the short interval from the previous one,
> but please pull one more series.
No worries :)
>
>
> The following changes since commit 3ed2ece5e162b104cd3ea3788cae841ecd24408f:
>
> armv8: cavium: Get
Hi Bin,
2016-01-19 17:25 GMT+08:00 Bin Meng :
> Hi Miao,
>
> On Tue, Jan 19, 2016 at 10:46 AM, Miao Yan wrote:
>> Hi Bin,
>>
>> 2016-01-16 21:23 GMT+08:00 Bin Meng :
>>> Hi Miao,
>>>
>>> On Fri, Jan 15, 2016 at 11:12 AM, Miao Yan
Hi Miao,
On Wed, Jan 20, 2016 at 9:58 AM, Miao Yan wrote:
> Hi Bin,
>
> 2016-01-19 17:25 GMT+08:00 Bin Meng :
>> Hi Miao,
>>
>> On Tue, Jan 19, 2016 at 10:46 AM, Miao Yan wrote:
>>> Hi Bin,
>>>
>>> 2016-01-16 21:23 GMT+08:00 Bin
2016-01-09 2:12 GMT+09:00 Masahiro Yamada :
> U-Boot relocates the device tree and the initramdisk to the tail
> of the memory region before booting the kernel.
>
> Some UniPhier boards are equipped with a large amount of memory.
> For those boards, the device tree
2016-01-09 2:12 GMT+09:00 Masahiro Yamada :
> The load address of the kernel can be changed via "kernel_addr_r"
> environment. The device tree and the initramdisk should be relocated
> according to the kernel location.
>
> The "bootm_low" should be calculated by
> -Original Message-
> From: york sun
> Sent: Wednesday, January 20, 2016 2:47 AM
> To: Qianyu Gong ; u-boot@lists.denx.de
> Cc: Mingkai Hu ; jt...@openedev.com; Yao Yuan
> ; r58...@freescale.com; Gong Qianyu
>
This patch adds the ability to load and link ACPI tables provided by QEMU.
QEMU tells guests how to load and patch ACPI tables through its fw_cfg
interface, by adding a firmware file 'etc/table-loader'. Guests are
supposed to parse this file and execute corresponding QEMU commands.
Signed-off-by:
Currently, if CONFIG_GENERATE_ACPI_TABLE is defined, U-Boot will generate ACPI
tables itlself, this patchset adds the ability to load the ACPI tables generated
by QEMU.
Changes in v2:
- Drop [PATCH 4/4] x86: qemu: loading ACPI table from QEMU, add a config
option
CONFIG_QEMU_ACPI_TABLE
-
Re-write the logic in qemu_fwcfg_list_firmware(), add a function
qemu_fwcfg_read_firmware_list() to handle reading firmware list.
Signed-off-by: Miao Yan
---
Changes in v2:
- coding style fix
- add comments in header file
arch/x86/cpu/qemu/fw_cfg.c| 63
This patch adds a config option for loading ACPI table from QEMU. When enabled,
U-Boot won't generate ACPI tables, but use those provided by QEMU.
Signed-off-by: Miao Yan
---
arch/x86/Kconfig | 9 +
arch/x86/cpu/qemu/Makefile | 2 ++
Hi,
On 27 December 2015 at 10:28, Mateusz Kulikowski
wrote:
> Add function to poll register waiting for specific bit(s).
> Similar functions are implemented in few drivers - they are almost
> identical and can be generalized.
> Signed-off-by: Mateusz Kulikowski
Hi Mateusz,
On 6 January 2016 at 11:21, Mateusz Kulikowski
wrote:
> This commit add support for 96Boards Dragonboard410C.
>
> It is board based on APQ8016 Qualcomm SoC, complying with
> 96boards specification.
>
> Features (present out of the box):
> - 4x Cortex A53
Hi Masahiro,
On 18 January 2016 at 22:15, Masahiro Yamada
wrote:
> 2015-12-28 23:20 GMT+09:00 Simon Glass :
>> Hi Masahiro,
>>
>> On 18 December 2015 at 04:15, Masahiro Yamada
>> wrote:
>>> This commit intends to
Hi,
On 18 January 2016 at 22:09, Mugunthan V N wrote:
>
> On Monday 18 January 2016 02:53 PM, Bin Meng wrote:
> > +Simon
> >
> > On Mon, Jan 18, 2016 at 4:47 PM, Mugunthan V N wrote:
> >> Implement a SATA uclass that can represent a SATA controller.
>
Hi,
On 18 January 2016 at 02:39, Sjoerd Simons
wrote:
> On Thu, 2016-01-14 at 08:51 -0700, Simon Glass wrote:
>> Hi Eddie,
>>
>> On 14 January 2016 at 05:47, Eddie Cai
>> wrote:
>> > Hi Simon
>> >
>> > I think the best way to reduce SPL
Hello Tom,
Am 04.01.2016 um 23:07 schrieb Enric Balletbò i Serra:
From: Ladislav Michl
- move chip reset to separate function
- use CONFIG_SMC911X_BASE instead of hardcoded value
- remove unneeded local variable from board_eth_init.
Signed-off-by: Ladislav Michl
Add a method which can locate a clock for a device, given its index. This
uses the normal device tree bindings to return the clock device and the
first argument which is normally used as a peripheral ID in U-Boot.
Signed-off-by: Simon Glass
---
Changes in v3:
- Use
Hello Tom,
Am 04.01.2016 um 23:23 schrieb Tom Rini:
On Mon, Jan 04, 2016 at 11:07:58PM +0100, Enric Balletbo i Serra wrote:
Enable CONFIG_NET_RANDOM_ETHADDR to generate a random MAC address
when ETHADDR is not set.
Signed-off-by: Enric Balletbo i Serra
Hello Tom,
Am 04.01.2016 um 23:24 schrieb Tom Rini:
On Mon, Jan 04, 2016 at 11:08:01PM +0100, Enric Balletbo i Serra wrote:
From: Ladislav Michl
The patch fixes some indentation style problems in omap3_igep00x0.h file.
Signed-off-by: Ladislav Michl
Hello Tom,
Am 04.01.2016 um 23:23 schrieb Tom Rini:
On Mon, Jan 04, 2016 at 11:08:00PM +0100, Enric Balletbo i Serra wrote:
From: Ladislav Michl
File is already included:
omap3_igep00x0.h -> ti_omap3_common.h -> ti_armv7_omap.h ->
ti_armv7_common.h ->
Hi Wenbin,
On Wed, Jan 20, 2016 at 12:29 PM, Wenbin Song wrote:
> Hi: Bin,
>
> Could you tell me which tree your patches have been merged into ?
>
I believe it will be merged via u-boot-dm, cc Simon to confirm.
> Regards
>
> Wenbin Song
>
[snip]
Regards,
Bin
Hi: Bin,
Could you tell me which tree your patches have been merged into ?
Regards
Wenbin Song
-Original Message-
From: Bin Meng [mailto:bmeng...@gmail.com]
Sent: Tuesday, January 19, 2016 4:03 PM
To: Wenbin Song
Cc: York Sun ; Mingkai
This patch adds basic support for the LCD controller of the Marvell
Armada XP SoC.
An AXP based custom board port will be added later, to use this
driver to display a splash screen via the bmp command later.
Signed-off-by: Stefan Roese
Cc: Anatolij Gustschin
Cc:
This patch adds support for the Armada XP (MV78260) based theadorable
board. Its equipped with onboard DDR3, UART, ethernet, I2C, SPI NOR,
LCD and SATA (SSD) interfaces / devices.
Two defconfigs are added:
theadorable_defconfig:
The production U-Boot version with a stripped down drivers and
Enable ACPI IO space for piix4 (for pc board) and ich9 (for q35 board)
Signed-off-by: Miao Yan
---
Changes in v2:
- add ACPI_PM1_BASE in Kconfig
- drop PCI device ID checks
arch/x86/cpu/qemu/Kconfig | 7 +++
arch/x86/cpu/qemu/qemu.c
Hi Stephen,
On 19 January 2016 at 09:49, Stephen Warren wrote:
>
> On 01/18/2016 07:08 PM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 18 January 2016 at 12:43, Stephen Warren wrote:
>>>
>>> On 01/14/2016 01:26 PM, Simon Glass wrote:
Add a driver for interrupts on quark and move the code currently in
cpu_irq_init() into its probe() method.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2: None
arch/x86/cpu/quark/Makefile | 2 +-
At present interrupt routing is set up from arch_misc_init(). We can do it
a little later instead, in interrupt_init().
This removes the manual pirq_init() call. Where the platform does not have
an interrupt router defined in its device tree, no error is generated. Some
platforms do not have
Add a driver for interrupts on queensbay and move the code currently in
cpu_irq_init() into its probe() method.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2: None
arch/x86/cpu/queensbay/Makefile | 2 +-
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