test/py raises an error, if a board has not enabled bdi command
> pytest.skip('bdinfo command not supported')
E NameError: global name 'pytest' is not defined
import pytest in test/py/u_boot_utils.py fixes this.
Signed-off-by: Heiko Schocher
---
found on the corvus board, wh
This API helps to map physical register addresss pace of device to
virtual address space easily. Its just a wrapper around map_physmem()
with MAP_NOCACHE flag.
Signed-off-by: Vignesh R
Suggested-by: Simon Glass
Reviewed-by: Jagan Teki
---
v4: Reorder include files to avoid build warning on dr
On Tue, May 3, 2016 at 9:01 PM, Stefan Roese wrote:
> Hi Bin,
>
> thank you very much for this patch series. I've given the patchset
> a quick review and tested it shortly on the BayTrail Congatec
> board. And have seen no issues so far. Shutdown and reboot also
> seem to work just fine. I'll defi
On 05/06/2016 01:59 AM, Stefan Agner wrote:
> There could be runtime determined board specific reason why a EHCI
> initialization fails (e.g. ENODEV if a Port is not available). In
> this case, properly return the error code.
> While at it, that function (board_ehci_hcd_init) has actually two
> doc
There could be runtime determined board specific reason why a EHCI
initialization fails (e.g. ENODEV if a Port is not available). In
this case, properly return the error code.
While at it, that function (board_ehci_hcd_init) has actually two
documentation blocks... Use the correct function name for
From: Stephen Warren
It can take a while for a host machine to notice that a USB device has
disconnected, and process the change. At the end of the DFU test, we wait
up to 10 seconds for this to happen. This change makes the test wait the
same (up to) 10 seconds at the start of the test for any p
The clock parent of the AHB root clock when using mux option 1
is the SYS PLL 270MHz clock. This is specified in Table 5-11
Clock Root Table of the i.MX 7Dual Applications Processor
Reference Manual.
While it could be a documentation error, the 270MHz parent is
also mentioned in the boot ROM conf
Several UART input selects are missing. The fourth input select
for UART2_TX_DATA_ALT0 is actually also missing in the documentation.
(at least in Rev. B of the i.MX 7Dual Reference Manual). However,
when looking at the tables of other input selects, it is very natural
that there must be an input s
Add ethernet driver for the AR933x and AR934x Atheros MIPS machines.
The driver could be easily extended to other WiSoCs.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
Cc: Wills Wang
---
drivers/net/Kconfig | 9 +
drivers/net/Makefile | 1 +
drivers/net/ag7xxx.c |
On 04/06/2016 11:50 PM, Shengzhou Liu wrote:
> Optimize DDR timing for good margins to support new Transcend
> and Apacer DDR4 UDIMM besides current Micron UDIMM.
>
> Verified 1333MT/s, 1600MT/s, 1866MT/s, 2133MT/s rate with
> following UDIMM on LS2080ARDB.
> - Micron UDIMM: MTA18ASF1G72AZ-2G1A1Z
The DuoVero board fails to compile with EFI enabled as the generated
binaries are too large. As this platform doesn't currently need EFI,
disable this feature.
Signed-off-by: Ash Charles
---
include/configs/duovero.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/duovero.h
The Gumstix DuoVero board isn't compiling currently. These patches get
it compiling and booting again.
Ash Charles (2):
omap4: load files for legacy boot
omap4: duovero: Disable EFI booting
include/configs/duovero.h | 1 +
include/configs/ti_omap4_common.h | 5 -
2 files changed
Be sure to load the zImage and fdtfile prior to actually booting in
case we are doing a legacy boot.
Signed-off-by: Ash Charles
---
include/configs/ti_omap4_common.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/configs/ti_omap4_common.h
b/include/configs/ti_om
On Thu, May 5, 2016 at 8:28 AM, Simon Glass wrote:
> Adjust this driver to avoid using struct netdev in functions that driver
> model will call. Also refactor the receive function to be compatible with
> driver model.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Heiko Schocher
> Tested-on: smar
Add support for the Atheros AR934x WiSoCs. This patchs adds complete
system init, including PLL and DRAM init, both of which happen from
full C environment, since the AR934x has proper SRAM.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Wills Wang
---
arch/mips/dts/ar934x.dtsi
The assignment const T var; var = value; is illegal, since var is
constant. Drop the const to fix the compiler warning.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Wills Wang
---
arch/mips/mach-ath79/reset.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mip
Add support for the TPLink WDR4300 router, which is based on the
AR9344 MIPS 74Kc CPU and has 128 MiB of RAM. The USB is supported
on this system as well.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Wills Wang
---
arch/mips/dts/Makefile | 1 +
arch/mips/dts/tplink_wdr4300.
Add code to ungate the ethernet controller on ar933x and ar934x .
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Wills Wang
---
arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 +
arch/mips/mach-ath79/include/mach/ath79.h | 1 +
arch/mips/mach-ath79/reset.c
Add generic EHCI node for the ChipIdea EHCI controller in the ath79.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Wills Wang
---
arch/mips/dts/ar933x.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/mips/dts/ar933x.dtsi b/arch/mips/dts/ar933x.dtsi
index 11f60a2..2e
Add code to ungate the USB controller on ar933x and ar934x .
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Wills Wang
---
arch/mips/mach-ath79/include/mach/ath79.h | 2 +
arch/mips/mach-ath79/reset.c | 61 +++
2 files changed, 63 insertions(+)
Add nodes for both ethernet controllers in the ath79 MIPS.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Wills Wang
---
arch/mips/dts/ar933x.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/mips/dts/ar933x.dtsi b/arch/mips/dts/ar933x.dtsi
index 2e124a4..f
The indent in this file triggers my OCD, so fix it. Replace multiple
spaces with tabs and align the values in one column.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Wills Wang
---
arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 2103 ---
1 file changed, 1069 in
There really is zero reason for including netdev.h in generic mips CPU code.
Removing the netdev.h from cpu.c also fixes the following compiler warning:
In file included from arch/mips/cpu/cpu.c:10:0:
include/netdev.h:204:41: warning: 'struct eth_device' declared inside parameter
list [enabled by
On 4 May 2016 at 16:49, Vignesh R wrote:
>
> This series converts davinci_spi driver to adapt to driver model
> framework. And enables the driver on k2l, k2e, k2hk evms. Also,
> added support for davinci_spi on k2g evm.
>
> Tested on k2l, k2e, k2hk and k2g evms.
>
> Rebased on top of v2016.05-rc3
On 4 May 2016 at 16:49, Vignesh R wrote:
> This API helps to map physical register addresss pace of device to
> virtual address space easily. Its just a wrapper around map_physmem()
> with MAP_NOCACHE flag.
>
> Signed-off-by: Vignesh R
> Suggested-by: Simon Glass
Reviewed-by: Jagan Teki
__
Hi,
On 4 May 2016 at 21:37, Yang, Wenyou wrote:
> Hi,
>
>
> On 2016/5/5 11:18, Simon Glass wrote:
>
> Hi,
>
> On May 4, 2016 21:15, "Yang, Wenyou" wrote:
>>
>> Hi Simon,
>>
>> > -Original Message-
>> > From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
>> > Sent: 201
On Thu, May 5, 2016 at 10:46 AM, Tom Rini wrote:
> On Wed, May 04, 2016 at 10:45:09PM -0500, Derald D. Woods wrote:
>
> > Hi Tom,
> >
> > Is anyone still attempting to boot the OMAP 3530 BeagleBoard with
> > U-Boot master?
>
> Yes, but...
>
> > In order to boot my BeagleBoard Rev. C4, I need to b
On Wed, May 04, 2016 at 10:45:09PM -0500, Derald D. Woods wrote:
> Hi Tom,
>
> Is anyone still attempting to boot the OMAP 3530 BeagleBoard with
> U-Boot master?
Yes, but...
> In order to boot my BeagleBoard Rev. C4, I need to basically
> undefine CONFIG_SPL_EXT_SUPPORT and CONFIG_SYS_THUMB_BUI
On 05.05.16 15:28, Simon Glass wrote:
> Flushing part of the cache should be done on cache boundaries. Trying to
> flush part of a cache line is not supported and the request may be ignored
> or print warnings.
>
> Adjust the bootm code to align the end address to prevent this problem.
>
> Signed
Hi Simon,
On 05.05.16 15:28, Simon Glass wrote:
> At present CONFIG_SKIP_LOWLEVEL_INIT prevents U-Boot from calling
> lowlevel_init(). This means that the instruction cache is not enabled and
> the board runs very slowly.
>
> What is really needed in many cases is to skip the call to lowlevel_ini
The current delays in the DDR initialization routines for am33xx
architectures are sometimes not running long enough leading to DDR
init errors. On am437x, this shows up as an L3 NOC error after the
kernel boots. This is due to the timer not being initialized
properly, but instead still containing
This should return a non-zero value if there is a missing property. Update
the return value accordingly. The only expected error is -FDT_ERR_NOTFOUND.
Signed-off-by: Simon Glass
---
Changes in v2: None
lib/fdtdec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/fdtdec.
Add driver-model support to this driver. Most features can be controlled
from the device tree.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/video/atmel_lcdfb.c | 91 +
include/atmel_lcd.h | 9 +
2 files changed, 100 inserti
The code does not compile if ECC is enabled.
Signed-off-by: Andre Renaud
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/mtd/nand/atmel_nand.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 8fac824..15958cb
Adjust the driver to use struct display_timing for its display timing.
This is what is used by driver-model and allows the LCD init code to be
common.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/video/atmel_lcdfb.c | 106 +---
1 file chang
The code does not compile if ECC is enabled.
Signed-off-by: Andre Renaud
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/mtd/nand/atmel_nand.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 8fac824..15958cb
From: Andre Renaud
This empty line should not be there. Remove it.
Signed-off-by: Andre Renaud
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/mtd/nand/nand_base.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index
Add this file from Linux v4.5.
Signed-off-by: Simon Glass
Reviewed-by: Heiko Schocher
Tested-on: smartweb, corvus, taurus, axm
Tested-by: Heiko Schocher
---
Changes in v2: None
arch/arm/dts/Makefile |1 +
arch/arm/dts/at91sam9g45.dtsi | 1335
Add these definitions so that GPIOs can be used with driver model.
Signed-off-by: Simon Glass
Reviewed-by: Heiko Schocher
Tested-on: smartweb, corvus, taurus, axm
Tested-by: Heiko Schocher
---
Changes in v2: None
arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c | 18 ++
From: Andre Renaud
Add register definitions for the AT91 RTC so that this can potentially be
used in U-Boot.
Signed-off-by: Andre Renaud
Signed-off-by: Simon Glass
Reviewed-by: Heiko Schocher
---
Changes in v2: None
arch/arm/mach-at91/include/mach/at91_rtc.h | 71 ++
From: Andre Renaud
This needs to be set to avoid a fatal error when ECC is used.
Signed-off-by: Andre Renaud
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/mtd/nand/atmel_nand.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/
Add driver-model support to this driver. The old code remains for now so
that we can convert boards one at a time.
Signed-off-by: Simon Glass
Reviewed-by: Heiko Schocher
Tested-on: smartweb, corvus, taurus, axm
Tested-by: Heiko Schocher
Acked-by: Joe Hershberger
---
Changes in v2: None
driv
From: Andre Renaud
This uses the wrote base register value. Fix it.
Signed-off-by: Andre Renaud
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/mtd/nand/atmel_nand.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mt
Adjust this driver to avoid using struct netdev in functions that driver
model will call. Also refactor the receive function to be compatible with
driver model.
Signed-off-by: Simon Glass
Reviewed-by: Heiko Schocher
Tested-on: smartweb, corvus, taurus, axm
Tested-by: Heiko Schocher
Reviewed-by:
At present CONFIG_SKIP_LOWLEVEL_INIT prevents U-Boot from calling
lowlevel_init(). This means that the instruction cache is not enabled and
the board runs very slowly.
What is really needed in many cases is to skip the call to lowlevel_init()
but still perform CP15 init. Add an option to handle th
Flushing part of the cache should be done on cache boundaries. Trying to
flush part of a cache line is not supported and the request may be ignored
or print warnings.
Adjust the bootm code to align the end address to prevent this problem.
Signed-off-by: Simon Glass
Reviewed-by: Heiko Schocher
T
From: Andre Renaud
Avoid generating this section if there is nothing in it.
Signed-off-by: Andre Renaud
Signed-off-by: Simon Glass
Acked-by: Joe Hershberger
---
Changes in v2: None
net/bootp.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/net/bootp.c b/net/bootp.c
index d785
From: Andre Renaud
This is available on AT91SAM9G45. Add the peripheral address and flag
definitions.
Signed-off-by: Andre Renaud
Signed-off-by: Simon Glass
Reviewed-by: Heiko Schocher
Reviewed-by: Andreas Bießmann
---
Changes in v2: None
arch/arm/mach-at91/include/mach/at91_sck.h| 21
The end address of the cache flush must be cache-line-aligned since
otherwise (at least on ARM926-EJS) the request is ignored. When the cache
is enabled this means that packets are not sent.
Signed-off-by: Simon Glass
Reviewed-by: Heiko Schocher
Acked-by: Joe Hershberger
---
Changes in v2: Non
This series is mainly designed to move the macb Ethernet to driver model,
along with the LCD controller. It also includes a few fixes:
- NAND with ECC doesn't build properly
- The instruction cache is off by default
- Ethernet macb doesn't send packets when the cache is enabled
A Snapper 9G45-bas
On 03.05.16 08:39, Simon Glass wrote:
> This is available on AT91SAM9G45. Add the peripheral address and flag
> definitions.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/arm/mach-at91/include/mach/at91_sck.h| 21 +
> arch/arm/mach-at91/include/mach/at91sam9g45.h | 1 +
2016-04-29 3:45 GMT+09:00 Stephen Warren :
> From: Stephen Warren
>
> Commit 724219a65f55 "ARM: always perform per-CPU GIC init" removed some
> ifdefs to unify the MULTIENTRY-vs-non-MULTIENTRY paths. However, the
> wrong endif was removed.
I missed this too
due to too much nested ifdefs.
> This
On Thu, May 05, 2016 at 11:22:42AM +0530, Lokesh Vutla wrote:
>
>
> On Wednesday 06 April 2016 05:32 PM, Lokesh Vutla wrote:
> > Peripherals like spi etc. uses DMA for transfers. So, when loading the fit
> > image the destination address should be dma aligned.
>
> After the v5 of my FS support
Hi,
Any help on this question ? Am I missing something basic ? why
signer(mkimage) needs to produce the fitImage and uboot dtb as single step.
-- Forwarded message --
From: shr ch
Date: Thu, Apr 28, 2016 at 4:34 PM
Subject: mkimage needs fitImage
To: u-boot@lists.denx.de
Hi,
another observation -- noticed "#if 0" in a header file i'm working
with, so did a quick grep from the top:
$ grep -r "^#if 0" * | wc -l
223
$
and, what the heck:
$ grep -r "^#if 1" * | wc -l
37
$
so after next release, i might rummage around in that and submit
patches, particula
Hi,
On 3 May 2016 at 00:39, Simon Glass wrote:
> This series is mainly designed to move the macb Ethernet to driver model,
> along with the LCD controller. It also includes a few fixes:
>
> - NAND with ECC doesn't build properly
> - The instruction cache is off by default
> - Ethernet macb doesn'
Hi,
On 4.5.2016 16:50, Masahiro Yamada wrote:
> Hi Michal,
>
> Does this patch look good?
> or does it have impact on your customers?
Sorry I missed it. Yes it looks good.
Applied.
Thanks,
Michal
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