hi,
i'm actually trying to convert my i.mx6 boards to DM, many things are
already doing well.
But I've trouble getting the console (UART) runnin SPL.
The "preloader_console_init" is called very early in board_init_f, i
guess that DM isn't ready at this point.
has anyone experience in this?
On 06.06.2018 16:05, Baruch Siach wrote:
Equivalent code that disables the hidden i2c0 slave already exists in
the Turris Omnia platform specific code. But this hidden i2c0 slave that
interferes the i2c bus is not board specific. Armada 38x SoCs and at
least some Kirkwood variants are affected as
+ Boris
+ Suneel (who helped in DM MTD)
+ Siva, Michal (zynq qspi)
On Wed, Jun 6, 2018 at 9:00 PM, Miquel Raynal wrote:
> During the last months, Boris Brezillon shared his work to support
> serial flashes within Linux. First, he delivered (and merged) a new
> layer called spi-mem. He also initi
CONFIG_SPL_FSL_LS_PPA is needed only in case of falcon boot
Support for this is not present in PPA currently, so
removing the default option from defconfig
Signed-off-by: Vinitha V Pillai
Signed-off-by: Ruchika Gupta
---
configs/ls1043ardb_sdcard_defconfig | 1 -
1 file changed, 1 deletion(-)
On Wed, 2018-06-06 at 10:39 +0200, Marek Vasut wrote:
> On 05/24/2018 07:04 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This is file system generic loader which can be used to load
> > the file image from the storage into target such as memory.
> > The consumer drive
LS1012A-FRDM and LS1012A-FRWY board.
1-Move all common files applicable for both boards LS1012A-FRDM
and LS1012A-FRWY into board directory ls1012afrx.
2-Restructure LS1012A-FRDM code. Only board specific files are
in LS1012A-FRDM board directory.
Signed-off-by: Pramod Kumar
---
Depends on:
h
From: Ken Ma
Changes in v2:
- Fix error printing:
- Change some debug to pr_err;
- mii bus has no parent member and it is not a udevice, so dev_err
is changed to pr_err for mii bus error printings.
Ken Ma (2):
dm: mdio: add a uclass for MDIO
mdio: add marvell MDIO driver
MAINTAIN
Add board support for LS1012A-FRWY board,
sharing many common functionalities with LS1012A-FRDM.
Signed-off-by: Pramod Kumar
---
Depends on:
http://patchwork.ozlabs.org/patch/918935/
http://patchwork.ozlabs.org/patch/918933/
http://patchwork.ozlabs.org/patch/918932/
Changes for v2:
- Rebased pa
On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
clock when OHCI1 is in use.
Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")
Signed-off-by: Vasily Khoruzhick
---
drivers/usb/host/ohci-sunxi.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
dif
We can use compatibles instead.
Signed-off-by: Vasily Khoruzhick
---
drivers/usb/host/ohci-sunxi.c | 88 +++
1 file changed, 68 insertions(+), 20 deletions(-)
diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
index ce2b47a5c4..dfdd1e538d
We can use compatibles instead.
Signed-off-by: Vasily Khoruzhick
---
drivers/usb/host/ehci-sunxi.c | 89 +++
1 file changed, 69 insertions(+), 20 deletions(-)
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
index 360efc9116..39b98c21ca
EHCI0 is bit 24, EHCI1 - 25, OHCI0 - 28, OHCI1 - 29
Fixes commit fef73766d9ad ("sunxi: clock: Fix OHCI clock gating for H3/H5")
Signed-off-by: Vasily Khoruzhick
---
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/i
On Wed, Jun 6, 2018 at 9:36 AM, Jagan Teki wrote:
Why is the SoC / compatible information not coming from DT instead ? Why
is the driver polluted by more ifdefs ?
>>>
>>> Because this platform doesn't have DM clock driver yet. This code will
>>> be removed once this driver is implemented
From: Ken Ma
Add a uclass which provides access to MDIO busses and includes
operations required by MDIO.
The implementation is based on the existing mii/phy/mdio data
structures and APIs.
This patch also adds evice tree binding for MDIO bus.
Signed-off-by: Ken Ma
---
Changes in v2: None
MAIN
From: Ken Ma
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
*) The MDIO interface is shared by all Ethernet ports, so a dri
From: Ken Ma
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
*) The MDIO interface is shared by all Ethernet ports, so a dri
From: Ken Ma
Changes in v2:
- Fix error printing:
- Change some debug to pr_err;
- mii bus has no parent member and it is not a udevice, so dev_err
is changed to pr_err for mii bus error printings.
Ken Ma (2):
dm: mdio: add a uclass for MDIO
mdio: add marvell MDIO driver
MAINTAIN
From: Ken Ma
Add a uclass which provides access to MDIO busses and includes
operations required by MDIO.
The implementation is based on the existing mii/phy/mdio data
structures and APIs.
This patch also adds evice tree binding for MDIO bus.
Signed-off-by: Ken Ma
---
Changes in v2: None
MAIN
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Wednesday, June 06, 2018 8:32 PM
> To: u-boot@lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志); Joe Hershberger; Simon Glass
> Subject: [PATCH 1/2] net: Add option to prefer bootp/dhcp serverip
>
> Currently we can choose between 2 different types of
Banana Pi M2 Zero is a board by Sinovoip with Allwinner H2+ SoC, 16-bit
512MiB DDR3 memory, a MicroSD slot, two MicroUSB ports (one OTG and one
powering-only) and a miniHDMI port.
Signed-off-by: Icenowy Zheng
Signed-off-by: Jun Nie
---
arch/arm/dts/Makefile | 1 +
ar
Hi,
2018년 6월 7일 (목) 00:09, Tom Rini 님이 작성:
> On Wed, Jun 06, 2018 at 09:55:18PM +0900, Minkyu Kang wrote:
>
> > Dear Tom,
> >
> > The following changes since commit
> 0315d6959fdd9d2a4d89016c311e9c8c8d239a10:
> >
> > ARM: mvebu: a38x: Add missing SPDX license identfier (2018-05-15
> 09:08:00
>
Hi Chris,
On 27 May 2018 at 17:45, Simon Glass wrote:
> On 27 May 2018 at 03:52, Chris Packham wrote:
>> Many mailing-lists consider a long Cc list a sign of spam and will
>> either drop the message or mark it for moderation. Because patman
>> automatically invokes get_maintainer.pl the Cc list
On 06/06/2018 09:04 PM, Jagan Teki wrote:
> On Thu, Jun 7, 2018 at 12:15 AM, Marek Vasut wrote:
>> On 05/24/2018 09:58 PM, Marek Vasut wrote:
>>> The N25Q256(A) datasheet clearly states that this device does have
>>> a Flag Status Register and does update FSR PEC bit 7 during Program
>>> and Erase
On Fri, Jun 1, 2018 at 2:45 AM, Marek Vasut wrote:
> Add new compatible to the Ethernet AVB driver for R8A77990 E3 SoC.
>
> Signed-off-by: Marek Vasut
> Cc: Joe Hershberger
> Cc: Nobuhiro Iwamatsu
Acked-by: Joe Hershberger
___
U-Boot mailing list
U-
On Wed, Jun 6, 2018 at 5:30 PM, Joe Hershberger wrote:
> On Sat, Jun 2, 2018 at 11:21 PM, Chris Packham
> wrote:
>> When connecting to from a CPU direct to a 88e6097 typically RGMII is
>> used. In order for traffic to actually pass we need to force the link up
>> so the CPU MAC on the other end
On Sat, Jun 2, 2018 at 11:21 PM, Chris Packham wrote:
> When connecting to from a CPU direct to a 88e6097 typically RGMII is
> used. In order for traffic to actually pass we need to force the link up
> so the CPU MAC on the other end will see the link.
>
> Cc: Kevin Smith
> Signed-off-by: Chris P
On Mon, Jun 4, 2018 at 9:53 PM, Vasily Khoruzhick wrote:
> On Wed, May 16, 2018 at 3:26 PM Joe Hershberger
> wrote:
>>
>> On Mon, May 14, 2018 at 10:34 AM, Vasily Khoruzhick
>> wrote:
>> > That can happen if duplicate UDP packet arrived, and that's not uncommon.
>> > Anyway, we ignore packets
On Mon, May 21, 2018 at 10:02 AM, wrote:
> From: Radu Bulie
>
> VCAP tables must be initialized even if no advanced classification
> is used. If no initialization is performed, then ECC error will
> be observed by the user when the first packet enters the l2switch.
> The error is marked in MPIC_
On 06/06/2018 01:39 PM, Thomas Fitzsimmons wrote:
> Florian Fainelli writes:
>
>> On 05/10/2018 06:04 AM, Thomas Fitzsimmons wrote:
>>> Florian Fainelli writes:
>>>
On 05/06/2018 04:09 AM, Thomas Fitzsimmons wrote:
>
> [...]
>
> +
> +config BCMSTB_ACCOMMODATE_STBLINUX
> + bool
Florian Fainelli writes:
> On 05/10/2018 06:04 AM, Thomas Fitzsimmons wrote:
>> Florian Fainelli writes:
>>
>>> On 05/06/2018 04:09 AM, Thomas Fitzsimmons wrote:
[...]
+
+config BCMSTB_ACCOMMODATE_STBLINUX
+ bool ""
+ default y
+ help
+This prevents U-Boot
Hi Miquel,
On Wed, 6 Jun 2018 17:30:37 +0200
Miquel Raynal wrote:
> There should not be a 'nand' command, a 'sf' command and certainly not
> another 'spi-nand'. Write a 'mtd' command instead to manage all MTD
> devices at once. This should be the preferred way to access any MTD
> device.
Just
The am3517-evm boards stores the environment in NAND, but after merging
various configs, the board was trying to load environment variables from
FAT which would ultimately fail and cause some chatter.
This patch removes the ENV_IS_IN_FAT flag to eliminate the noise.
Signed-off-by: Adam Ford
dif
Tom Rini writes:
> On Wed, May 23, 2018 at 09:24:03PM -0400, Thomas Fitzsimmons wrote:
>
>> Add support for loading U-Boot on the Broadcom 7445 SoC. This port
>> assumes Broadcom's BOLT bootloader is acting as the second stage
>> bootloader, and U-Boot is acting as the third stage bootloader, lo
On Thu, Jun 7, 2018 at 12:15 AM, Marek Vasut wrote:
> On 05/24/2018 09:58 PM, Marek Vasut wrote:
>> The N25Q256(A) datasheet clearly states that this device does have
>> a Flag Status Register and does update FSR PEC bit 7 during Program
>> and Erase cycles to indicate the cycle is in progress. En
On 05/31/2018 12:00 PM, Marek Vasut wrote:
> On 05/31/2018 11:52 AM, See, Chin Liang wrote:
>> On Tue, 2018-05-29 at 18:39 +0200, Marek Vasut wrote:
>>> Make sure the ARM ACTLR register has correct configuration, otherwise
>>> the Linux kernel refuses to boot. In particular, the "Write Full Line
>>
On 05/24/2018 09:58 PM, Marek Vasut wrote:
> The N25Q256(A) datasheet clearly states that this device does have
> a Flag Status Register and does update FSR PEC bit 7 during Program
> and Erase cycles to indicate the cycle is in progress. Enable the
> FSR PEC bit polling on this device to prevent d
Add support for loading U-Boot on the Broadcom 7445 SoC. This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.
Signed-off-by: Thomas Fitzsimmons
Cc: Stefan Roese
Cc: Tom Rini
Add support for Broadcom BCM7445
Changes for v3:
- Rebase to master
- Add "ARM BROADCOM BCMSTB" entry to top-level MAINTAINERS
- Fix SPDX formatting
- In Kconfig use CPU_V7A, not CPU_V7, per acf15001...
Thomas Fitzsimmons (1):
board: arm: Add support for Broadcom BCM7445
MAINTAINE
Add setjmp/longjmp functions for x86_64.
The FPU control word and MXCSR control bits are preserved across calls.
Signed-off-by: Ivan Gorinov
---
arch/x86/cpu/x86_64/setjmp.S | 66 +++
arch/x86/cpu/x86_64/setjmp.c | 19 -
arch/x86/include/asm/
Add setjmp/longjmp functions for x86_64.
The FPU control word and MXCSR control bits are preserved across calls.
v2:
Added the FPU control word and MXCSR to jmp_buf;
Using ENTRY/ENDPROC macros.
Ivan Gorinov (1):
x86: Add 64-bit setjmp/longjmp implementation
arch/x86/cpu/x86_64/setjmp.S |
On 06/02/2018 10:41 AM, Heinrich Schuchardt wrote:
> The lines of tinker-rk3288_defconfig should be ordered in the same
> sequence as the generated .config.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> configs/tinker-rk3288_defconfig | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
On 06/06/2018 07:58 AM, Maxime Ripard wrote:
On Mon, Jun 04, 2018 at 11:15:34AM -0700, Martin Kelly wrote:
[snip as the thread is getting long]
On 06/04/2018 01:21 AM, Maxime Ripard wrote:
On Fri, Jun 01, 2018 at 10:16:32AM -0700, Martin Kelly wrote:
On 06/01/2018 04:05 AM, Maxime Ripard wrot
On Wed, Jun 6, 2018 at 9:35 AM, Jagan Teki wrote:
> On Wed, Jun 6, 2018 at 8:43 PM, Vasily Khoruzhick wrote:
>> extra_usb_gate_mask isn't shifted later and thus
>> CCM_USB_CTRL_OHCI0_CLK and CCM_USB_CTRL_OHCI1_CLK will be enabled for
>> phy 1 on A64.
>
> Where are you checking phy 1? and you sti
On Wed, Jun 6, 2018 at 8:43 PM, Marek Vasut wrote:
> On 06/06/2018 05:12 PM, Vasily Khoruzhick wrote:
>> On Wed, Jun 6, 2018 at 2:02 AM, Marek Vasut wrote:
>>> On 06/06/2018 05:38 AM, Vasily Khoruzhick wrote:
On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
clock whe
On Wed, Jun 6, 2018 at 8:43 PM, Vasily Khoruzhick wrote:
> On Wed, Jun 6, 2018 at 6:56 AM, Jagan Teki wrote:
>> On Wed, Jun 6, 2018 at 9:08 AM, Vasily Khoruzhick wrote:
>>> On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
>>> clock when OHCI1 is in use.
>>>
>>> Fixes commit d
The line length limit that fw_{printenv,setenv} impose (1024
characters) has tripped me up twice in as many days, so I figured I'd
rewrite it to use getline as we already have that in tools/.
But in looking how I structure that change, I've immediately run into
questions...
Right now I have a hor
We can use the hardware hash block to reduce space, particularly useful
for verifying FIT signatures from SPL.
Signed-off-by: Ben Whitten
---
drivers/crypto/Kconfig | 5 +
drivers/crypto/Makefile| 1 +
drivers/crypto/atmel_sha.c | 289 +
dr
Move to calling the abstraction which allows for hardware acceleration.
We also remove unneeded defines and only include objects if required.
Signed-off-by: Ben Whitten
---
common/hash.c | 4
common/image-fit.c | 27 +--
include/image.h| 42
The md5 function was missing from the common hash functions
Signed-off-by: Ben Whitten
---
common/hash.c| 8
include/image.h | 1 +
include/u-boot/md5.h | 7 ---
lib/Makefile | 1 +
lib/md5.c| 4 ++--
5 files changed, 16 insertions(+), 5 deletions(-)
There should not be a 'nand' command, a 'sf' command and certainly not
another 'spi-nand'. Write a 'mtd' command instead to manage all MTD
devices at once. This should be the preferred way to access any MTD
device.
Signed-off-by: Miquel Raynal
---
cmd/Kconfig | 5 +
cmd/Makefile
Add support for the MX35LF2GE4AB chip, which is similar to its cousin
MX35LF1GE4AB, with two planes instead of one.
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/spi/macronix.c | 20 ++--
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/nand/spi/macr
On Wed, Jun 6, 2018 at 4:35 AM, Jun Nie wrote:
> 2018-06-06 9:08 GMT+08:00 Teddy Reed :
>> When using verified-boot in the SPL, the FIT content must be
>> verified before it can be used.
>>
>> Currently the load_addr FIT property is read and used as input to
>> memcpy before the property is verifi
From: Boris Brezillon
Add minimal support for the MX35LF1GE4AB SPI NAND chip.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/spi/Makefile | 2 +-
drivers/mtd/nand/spi/core.c | 1 +
drivers/mtd/nand/spi/macronix.c | 138
include/linux/mtd/
From: Frieder Schrempf
Add support for the W25M02GV chip.
Signed-off-by: Frieder Schrempf
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/spi/Makefile | 2 +-
drivers/mtd/nand/spi/core.c| 1 +
drivers/mtd/nand/spi/winbond.c | 143
Declare the SPI NAND device accessible on the SPI bus with CS1.
Signed-off-by: Miquel Raynal
---
arch/mips/dts/mscc,ocelot_pcb.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/mips/dts/mscc,ocelot_pcb.dtsi
b/arch/mips/dts/mscc,ocelot_pcb.dtsi
index 4e532363c3..2f37ef92f9 1
From: Boris Brezillon
Add bindings for SPI NAND chips.
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
---
doc/device-tree-bindings/mtd/spi-nand.txt | 27 +++
1 file changed, 27 insertions(+)
create mode 100644 doc/device-tree-bindings/mtd/spi-nand.txt
di
Describe all SPI CS pins that are not part of the SoC. CS0 can only be
used as SPI CS, while CS1, CS2 and CS3 defaults as GPIOs.
Signed-off-by: Miquel Raynal
---
arch/mips/dts/mscc,ocelot.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/mips/dts/mscc,ocelot.dts
From: Peter Pan
Add a SPI NAND framework based on the generic NAND framework and the
spi-mem infrastructure.
In its current state, this framework supports the following features:
- single/dual/quad IO modes
- on-die ECC
Signed-off-by: Peter Pan
Signed-off-by: Boris Brezillon
Signed-off-by: M
From: Peter Pan
Add a basic driver for Micron SPI NANDs. Only one device is supported
right now, but the driver will be extended to support more devices
afterwards.
Signed-off-by: Peter Pan
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/spi/Makefile | 2 +-
From: Boris Brezillon
Some controllers are exposing high-level interfaces to access various
kind of SPI memories. Unfortunately they do not fit in the current
spi_controller model and usually have drivers placed in
drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI
memories in gen
The user might want to trigger the probe of any MTD device, export these
functions so they can be called from a command source file.
Signed-off-by: Miquel Raynal
---
drivers/mtd/mtd-uclass.c | 9 +
include/linux/mtd/mtd.h | 3 +++
2 files changed, 12 insertions(+)
diff --git a/drivers/
From: Boris Brezillon
The NAND sub-layers are likely to need the MTD_OPS_XXX mode information
in order to decide if they should enable/disable ECC or how they should
place the OOB bytes in the provided OOB buffer.
Add a field to nand_page_io_req to pass this information.
Signed-off-by: Boris Br
Sync the Kconfig raw NAND entry title with the code architecture.
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/raw/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index a820af61ce..6ef82cab88 100644
---
From: Boris Brezillon
Add an intermediate layer to abstract NAND device interface so that
some logic can be shared between SPI NANDs, parallel/raw NANDs,
OneNANDs, ...
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
---
drivers/mtd/nand/Kconfig | 3 +
drivers/mtd/nand/Makefile
NAND flavors, like serial and parallel, have a lot in common and would
benefit to share code. Let's move raw (parallel) NAND specific code in a
raw/ subdirectory, to ease the addition of a core file in nand/ and the
introduction of a spi/ subdirectory specific to SPI NANDs.
Signed-off-by: Miquel R
From: Brian Norris
We are going to begin using the mtd->dev.of_node field for MTD device
nodes, so let's add helpers for it. Also, we'll be making some
conversions on spi_nor (and nand_chip eventually) too, so get that ready
with their own helpers.
Signed-off-by: Brian Norris
Reviewed-by: Boris
Fix build errors produced by mtd.h and dm/device.h if not included in
the right order.
Signed-off-by: Miquel Raynal
---
include/linux/mtd/mtd.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 777a926623..52d1afb5b8 100644
--- a/include/
There is no reason to have NAND, SPI flashes and UBI sections outside of
the MTD submenu in Kconfig.
Signed-off-by: Miquel Raynal
---
drivers/mtd/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 19579801d2..d21b0920dc
Some helpers might be useful in a future 'mtd' U-Boot command to parse
MTD device list.
Signed-off-by: Miquel Raynal
---
drivers/mtd/mtdcore.h | 6 --
include/linux/mtd/mtd.h | 6 ++
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/mtdcore.h b/drivers/mtd/mtdc
From: Boris Brezillon
Some MTD sublayers/drivers are implementing ->_read/write_oob() and
provide dummy wrappers for their ->_read/write() implementations.
Let the core handle this case instead of duplicating the logic.
Signed-off-by: Boris Brezillon
Acked-by: Robert Jarzmik
Acked-by: Brian No
During the last months, Boris Brezillon shared his work to support
serial flashes within Linux. First, he delivered (and merged) a new
layer called spi-mem. He also initiated in Linux MTD subsystem the move
of all 'raw' NAND related code to a raw/ subdirectory, adding at the
same time a NAND core t
On 06/06/2018 05:12 PM, Vasily Khoruzhick wrote:
> On Wed, Jun 6, 2018 at 2:02 AM, Marek Vasut wrote:
>> On 06/06/2018 05:38 AM, Vasily Khoruzhick wrote:
>>> On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
>>> clock when OHCI1 is in use.
>>>
>>> Fixes commit dd3228170ad7 ("usb
On Wed, Jun 6, 2018 at 6:56 AM, Jagan Teki wrote:
> On Wed, Jun 6, 2018 at 9:08 AM, Vasily Khoruzhick wrote:
>> On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
>> clock when OHCI1 is in use.
>>
>> Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")
>>
>> Signe
On Wed, Jun 6, 2018 at 2:02 AM, Marek Vasut wrote:
> On 06/06/2018 05:38 AM, Vasily Khoruzhick wrote:
>> On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
>> clock when OHCI1 is in use.
>>
>> Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")
>>
>> Signed-off-by
On Wed, Jun 06, 2018 at 09:55:18PM +0900, Minkyu Kang wrote:
> Dear Tom,
>
> The following changes since commit 0315d6959fdd9d2a4d89016c311e9c8c8d239a10:
>
> ARM: mvebu: a38x: Add missing SPDX license identfier (2018-05-15 09:08:00
> -0400)
>
> are available in the git repository at:
>
> g
On Tue, Jun 05, 2018 at 11:58:34PM +0530, Jagan Teki wrote:
> Hi Tom,
>
> Please pull this PR.
>
> thanks,
> Jagan.
>
> The following changes since commit 809e0e398a91db7bf8b4d6259d9bfc6fbd6bce83:
>
> Merge branch 'master' of git://git.denx.de/u-boot-sunxi (2018-06-04
> 08:55:00 -0400)
>
>
On Mon, Jun 04, 2018 at 11:15:34AM -0700, Martin Kelly wrote:
> [snip as the thread is getting long]
>
> On 06/04/2018 01:21 AM, Maxime Ripard wrote:
> > On Fri, Jun 01, 2018 at 10:16:32AM -0700, Martin Kelly wrote:
> > > On 06/01/2018 04:05 AM, Maxime Ripard wrote:
> > >
> > > I can see the issu
Hi Chris
Thanks a lot for your detailed review and kind advice!
Please see my inline reply.
Yours,
Ken
From: Chris Packham
Sent: Wednesday, June 6, 2018 1:52 AM
To: Ken Ma
Cc: u-boot; Prafulla Wadaskar; Luka Perkov; xypron.g...@gmx.de; Michal Simek;
Ale
dtimg command allows user to work with Android DTB/DTBO image format.
Such as, getting the address of desired DTB/DTBO file, printing the dump
of the image in U-Boot shell, etc.
This command is needed to provide Android boot with new Android DT image
format further.
Signed-off-by: Sam Protsenko
Android documentation recommends new image format for storing DTB/DTBO
files: [1]. To support that format, this patch adds helper functions for
Android DTB/DTBO format. In image-android-dt.* files you can find helper
functions to work with Android DT image format, such us routines for:
- printi
Code that disables the i2c slave is now in the mvtwsi i2c driver.
Platform must enable DM_I2C to use that code. Add a comment in the code
as a reminder for the planned DM_I2C migration of Turris Omnia.
Reviewed-by: Heiko Schocher
Signed-off-by: Baruch Siach
---
v2: Add Reviewed-by from Heiko
---
Equivalent code that disables the hidden i2c0 slave already exists in
the Turris Omnia platform specific code. But this hidden i2c0 slave that
interferes the i2c bus is not board specific. Armada 38x SoCs and at
least some Kirkwood variants are affected as well. Add code to disable
this slave to th
On Wed, Jun 6, 2018 at 9:08 AM, Vasily Khoruzhick wrote:
> On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
> clock when OHCI1 is in use.
>
> Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")
>
> Signed-off-by: Vasily Khoruzhick
> ---
> drivers/usb/host/ohci
From: Dennis Gilmore
The helios4 is built on the SolidRun Armada 38x SOM.
The port os based on the ClearFog board, using information from
https://github.com/helios-4/u-boot-marvell as well as dtb input
from https://github.com/helios-4/linux-marvell
Signed-off-by: Dennis Gilmore
Signed-off-by: D
Hi Christian,
On Wed, May 23, 2018 at 9:39 PM, Christian Gmeiner
wrote:
> Hi Bin,
>
> Am Mi., 23. Mai 2018 um 15:10 Uhr schrieb Bin Meng :
>
>> Hi Christian,
>
>> On Wed, May 23, 2018 at 8:00 PM, Christian Gmeiner
>> wrote:
>> > If we use u-boot as coreboot payload with a generic dts without
>>
Dear Tom,
The following changes since commit 0315d6959fdd9d2a4d89016c311e9c8c8d239a10:
ARM: mvebu: a38x: Add missing SPDX license identfier (2018-05-15 09:08:00
-0400)
are available in the git repository at:
git://git.denx.de/u-boot-samsung.git master
for you to fetch changes up to 105e3d8
Currently we can choose between 2 different types of behavior for the
serverip variable:
1) Always overwrite it with the DHCP server IP address (default)
2) Ignore what the DHCP server says (CONFIG_BOOTP_SERVERIP)
This patch adds a 3rd option:
3) Use serverip from DHCP if no serverip is gi
The ax25-ae350 target currently uses CONFIG_BOOTP_SERVERIP which means we
ignore the DHCP provided TFTP ip address. This breaks every case where we
do now provide a serverip environment variable.
Instead, let's use the new CONFIG_BOOT_PREFER_SERVERIP option to fall back
to the DHCP provided TFTP I
On Wed, Jun 06, 2018 at 11:23:05AM +0100, Ben Whitten wrote:
> On 25 May 2018 at 12:46, Tom Rini wrote:
> > On Thu, May 24, 2018 at 02:43:24PM +0100, Ben Whitten wrote:
> >
> >> Move to calling the abstraction which allows for hardware acceleration.
> >>
> >> Signed-off-by: Ben Whitten
> >> ---
>
On Fri, May 25, 2018 at 04:08:14PM +0300, Alexey Brodkin wrote:
> In case of no relocation we'll just waste some space at the very end
> of usable memory area. If target device has very limited amount of memory
> (for example 256 kB) this loss will be pretty inconvenient.
>
> Signed-off-by: Alexe
On Mon, May 28, 2018 at 11:39:57PM +1200, Chris Packham wrote:
> Split the rtc_{get,set,reset} functions so that the bodies can be used
> in a DM driver.
>
> Signed-off-by: Chris Packham
> Reviewed-by: Stefan Roese
Applied to u-boot/master, thanks!
--
Tom
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On Wed, May 23, 2018 at 09:24:03PM -0400, Thomas Fitzsimmons wrote:
> Add support for loading U-Boot on the Broadcom 7445 SoC. This port
> assumes Broadcom's BOLT bootloader is acting as the second stage
> bootloader, and U-Boot is acting as the third stage bootloader, loaded
> as an ELF program
On Tue, May 22, 2018 at 02:04:21AM +0300, Sam Protsenko wrote:
> In commit e163a931af34 ("cmd: gpt: backup boot code before writing MBR")
> there was added the procedure for storing old boot code when doing "gpt
> write". But instead of storing just backup code, the whole MBR was
> stored, and onl
On Thu, May 31, 2018 at 09:00:43AM +0200, Patrice Chotard wrote:
> Since commit 0e373c0ade8c ("spl: add SPL_RESET_SUPPORT"),
> reset is supported in SPL, enable this flag for STM32F SoCs family.
>
> This allows to remove a specific case in RCC mfd driver.
>
> Signed-off-by: Patrice Chotard
App
On Mon, May 28, 2018 at 11:39:58PM +1200, Chris Packham wrote:
> Add DM support for the Marvell RTC driver.
>
> Signed-off-by: Chris Packham
> Reviewed-by: Stefan Roese
Applied to u-boot/master, thanks!
--
Tom
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On Thu, May 24, 2018 at 05:04:57PM +0900, Masahiro Yamada wrote:
> For distro-boot, the TIMEOUT directive in the boot script specifies
> how long to pause in units of 1/10 sec. [1]
>
> Commit 8594753ba0a7 ("menu: only timeout when menu is displayed")
> corrected this by simply dividing the timeou
On Thu, May 24, 2018 at 05:15:26PM +0300, riku.voi...@linaro.org wrote:
> From: Riku Voipio
>
> Reading doc/README.distro , we see platform needs to set
> pxefile_addr_r to support distro boot.
>
> Signed-off-by: Riku Voipio
Applied to u-boot/master, thanks!
--
Tom
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On Sat, May 19, 2018 at 11:25:05PM -0500, David Lechner wrote:
> This disables networking related items in the config. The EV3 does not have
> any networking hardware, so this is wasted space.
>
> Signed-off-by: David Lechner
Applied to u-boot/master, thanks!
--
Tom
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On Sat, May 19, 2018 at 11:25:07PM -0500, David Lechner wrote:
> This updates the LEGO MINDSTORMS EV3 boot script to try loading a
> uEnv.txt file and a da850-lego-ev3.dtb device tree during boot.
>
> Signed-off-by: David Lechner
Applied to u-boot/master, thanks!
--
Tom
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On Sat, May 19, 2018 at 11:25:06PM -0500, David Lechner wrote:
> This removes the unused clock and RAM config options that were cargo-
> culted when this board was copied from the DA850 EVM.
>
> Signed-off-by: David Lechner
Applied to u-boot/master, thanks!
--
Tom
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