- at91sam9g20-taurus.dts: use labels
- cleanup taurus port to compile clean with
current mainline again. SPL has no serial
output anymore, so it fits into SRAM.
Signed-off-by: Heiko Schocher
---
arch/arm/dts/at91sam9g20-taurus.dts | 158 ++--
add labels to rtc, pinctrl and watchdog node.
This makes it possible to reference the nodes
from board dts files.
Signed-off-by: Heiko Schocher
---
arch/arm/dts/at91sam9260.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/at91sam9260.dtsi
On Fri, Apr 05, 2019 at 03:52:58AM +0200, Heinrich Schuchardt wrote:
> Add parameter checks in the StartImage() and Exit() boottime services:
> - check that the image handle is valid and has the loaded image protocol
> installed
> - in StartImage() record the current image
> - in Exit() check
On 4/11/19 6:49 AM, AKASHI Takahiro wrote:
On Tue, Apr 09, 2019 at 07:10:11AM +0200, Heinrich Schuchardt wrote:
On 4/9/19 3:18 AM, AKASHI Takahiro wrote:
On Fri, Apr 05, 2019 at 03:33:54AM +0200, Heinrich Schuchardt wrote:
Since TianoCore EDK2 commit d65f2cea36d1 ("ShellPkg/CommandLib: Locate
On Tue, Apr 09, 2019 at 06:02:05AM +0200, Heinrich Schuchardt wrote:
> On 4/9/19 3:31 AM, AKASHI Takahiro wrote:
> > On Thu, Apr 04, 2019 at 10:23:47PM +0200, Heinrich Schuchardt wrote:
> >> If an exception occurs in a UEFI loaded image we need the start address of
> >> the image to determine the
Hi Daniel,
On 10.04.19 21:36, Daniel Schwierzeck wrote:
Am 05.04.19 um 13:44 schrieb Stefan Roese:
This patch enables USB and file-system support on the LinkIt smart
MT7688 module for both, the normal and the RAM default config.
Signed-off-by: Stefan Roese
Cc: Daniel Schwierzeck
---
On Tue, Apr 09, 2019 at 07:10:11AM +0200, Heinrich Schuchardt wrote:
> On 4/9/19 3:18 AM, AKASHI Takahiro wrote:
> > On Fri, Apr 05, 2019 at 03:33:54AM +0200, Heinrich Schuchardt wrote:
> >> Since TianoCore EDK2 commit d65f2cea36d1 ("ShellPkg/CommandLib: Locate
> >> proper UnicodeCollation
The new DM implementation currently does not support the Sheeva
88SV331xV5 specific quirk present in the legacy implementation. The
legacy code is thus kept for this SoC and others not yet migrated to
DM_MMC.
Signed-off-by: Pierre Bourdon
Cc: Jaehoon Chung
Cc: Stefan Roese
---
Enable DM_MMC for compliance with the driver model migration.
Signed-off-by: Pierre Bourdon
Cc: Marek Behun
---
configs/turris_omnia_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index c406b25753..fd9dc5a61b 100644
Hello Stefano,
We have a bunch of queued patches on imx/next tree and as we are
working on porting boards over DM it'd be good to get all current work
soon merged on master so we can conduct tests and find regressions
early.
When are you intending to send it?
--
Otavio Salvador
# CC Jagan
There's a version mismatch error with the sunxi-fel tool from sunxi-tools
( https://github.com/linux-sunxi/sunxi-tools )
./sunxi-fel -v uboot u-boot-sunxi-with-spl.bin write 0x4310 my.env
Stack pointers: sp_irq=0x2000, sp=0x5E08
Reading the MMU translation table from
Commit c4bd12a7dad4 ("i2c: mux: Generate longer i2c mux name") changed
the naming scheme of i2c devices within a mux. This broke references to
i2c@0 in the Turris Omnia board initialization code.
Signed-off-by: Pierre Bourdon
Cc: Marek Behún
---
board/CZ.NIC/turris_omnia/turris_omnia.c | 4
Fixes building mkimage on systems where OpenSSL header files do not
live in the standard include path.
Signed-off-by: Pierre Bourdon
---
tools/Makefile | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/Makefile b/tools/Makefile
index d377d85f74..12a3027e23 100644
--- a/tools/Makefile
[cc: mvebu maintainers]
I've spent the best part of today trying to get upstream u-boot
running on my Armada 835 device (Turris Omnia). I think in the process
I might have uncovered a bug with SPL u-boot on these SoC.
mvebu is "special" in having a different memory map in SPL vs. "main"
mode.
> On 4/10/19 6:57 PM, Ilias Apalodimas wrote:
> >Hi Alexander, Heinrich,
> >
> >(Resending since i was too quick on the trigger forgot to cc the public
> >mailing list. Sorry for the mess)
> >
> >I can't get an armv7 board (STM32MP157C-DK2) to boot with bootefi on
> >specific kernel/uboot
On 4/10/19 6:57 PM, Ilias Apalodimas wrote:
Hi Alexander, Heinrich,
(Resending since i was too quick on the trigger forgot to cc the public
mailing list. Sorry for the mess)
I can't get an armv7 board (STM32MP157C-DK2) to boot with bootefi on
specific kernel/uboot configurations.
u-boot
Am 05.04.19 um 13:44 schrieb Stefan Roese:
> This patch enables USB and file-system support on the LinkIt smart
> MT7688 module for both, the normal and the RAM default config.
>
> Signed-off-by: Stefan Roese
> Cc: Daniel Schwierzeck
> ---
> configs/linkit-smart-7688-ram_defconfig | 14
Am 08.04.19 um 10:31 schrieb Horatiu Vultur:
> This patch series adds network support for ServalT SoCs family.
> There is only one pcb in this family: ServalT(pcb116).
>
> This patch series is based on: u-boot-mips/next.
>
> Horatiu Vultur (3):
> net: Add MSCC ServalT network driver.
>
Hello,
I've got some valuable feedback from Roman (cc:) that the magic numbers
of the legacy and the newer LZ4 formats do not match, hence with the
current patch U-Boot would try to handle the legacy "lz4 -l"-compressed
kernel as a raw/uncompressed image.
Since U-Boot itself supports only the
Hello Heinrich,
>
> @Simon, @Alex
> Why did we ever introduce this value?
> 127 MB in baf70c02107 ("efi: Relocate FDT to 127MB instead of 128MB")
> 128 MB in ad0c1a3d2ce ("efi_loader: Put fdt into convenient location")
>
> baf70c02107 says that the Sandbox has only 128 MiB. But why should we
>
On 4/10/19 8:48 AM, Igor Opaniuk wrote:
Hi Heinrich,
Thanks for looking into this,
On Tue, Apr 9, 2019 at 11:28 PM Heinrich Schuchardt wrote:
On 4/9/19 3:08 PM, Igor Opaniuk wrote:
With CONFIG_CMD_BOOTEFI=y, load command causes data abort
when path_to_uefi(fp->str, path) tries to write
Hi Frank,
as said, the error happened in the last -rc4 version,
but does not happen in the current release version (2019.04).
/dev/mmcblk0p1 on the SD card is my boot partition (FAT16 LBA)
and uses default settings. Hope the following info answers your questions.
(yes, the SD card capacity is
On 4/10/19 6:57 PM, Ilias Apalodimas wrote:
Hi Alexander, Heinrich,
(Resending since i was too quick on the trigger forgot to cc the public
mailing list. Sorry for the mess)
I can't get an armv7 board (STM32MP157C-DK2) to boot with bootefi on
specific kernel/uboot configurations.
u-boot
Dear Tom,
In message <20190409014201.GH4664@bill-the-cat> you wrote:
>
> So it is release day and despite a few last minute regression fixes, I
> think I'm overall comfortable doing the release today.
Thanks, and here is the short version of the release statistics:
Changes between v2019.01 and
On 4/10/19 11:22 AM, Tom Rini wrote:
On Wed, Apr 10, 2019 at 11:13:32AM -0600, Stephen Warren wrote:
On 4/10/19 10:23 AM, Marek Vasut wrote:
On 4/10/19 5:12 PM, Stephen Warren wrote:
Hi,
it would be nice if I was CCed on this.
Sorry, I didn't drill down in Jenkins/git data to find out
On 4/10/19 11:02 AM, Patrick Delaunay wrote:
Check the value of block_dev before to use this pointer.
This patch solves problem for the command "load" when ubifs
is previously mounted: in this case the function
blk_get_device_part_str("ubi 0") don't return error but return
block_dev = NULL and
On Wed, Apr 10, 2019 at 11:13:32AM -0600, Stephen Warren wrote:
> On 4/10/19 10:23 AM, Marek Vasut wrote:
> > On 4/10/19 5:12 PM, Stephen Warren wrote:
> >
> > Hi,
> >
> > it would be nice if I was CCed on this.
>
> Sorry, I didn't drill down in Jenkins/git data to find out where the
> commits
On 4/10/19 10:23 AM, Marek Vasut wrote:
> On 4/10/19 5:12 PM, Stephen Warren wrote:
>
> Hi,
>
> it would be nice if I was CCed on this.
Sorry, I didn't drill down in Jenkins/git data to find out where the
commits came from; I just had a list of commit descriptions and knew
which branch they
Hi Alexander, Heinrich,
(Resending since i was too quick on the trigger forgot to cc the public
mailing list. Sorry for the mess)
I can't get an armv7 board (STM32MP157C-DK2) to boot with bootefi on
specific kernel/uboot configurations.
u-boot version: U-Boot 2019.04-rc3
kernel version:
%g/rathen then/rather than/
Signed-off-by: Heinrich Schuchardt
---
disk/part.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/disk/part.c b/disk/part.c
index f30f9e9187..98cc54db20 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -468,7 +468,7 @@ int
Hi,
Thank you very much for your response and fix for the issue.
Do you know when your patches will be pushed to an official u-boot repository?
Could you send/share me the patches earlier if it will last longer than a few
days, please?
My next step is to investigate how to enable traces for
Image type is not supplied to `mkimage -l`. For this reason, we cannot
use imagetool_verify_print_header_by_type. Instead, this patch uses
imagetool_verify_print_header to look through all header types to find
one where image validation succeeds.
This patch fixes failures in
On Wed, Apr 10, 2019 at 06:23:46PM +0200, Marek Vasut wrote:
> On 4/10/19 5:12 PM, Stephen Warren wrote:
>
> Hi,
>
> it would be nice if I was CCed on this.
>
> > I see that some mmc tests have been added to test/py, but I see problems
> > with them:
> >
> > 1) test_mmc_rescan assumes that
On Wed, Apr 10, 2019 at 11:02:57AM +0200, Patrick Delaunay wrote:
> Avoid ram_end = 0 on 32bit targets with ram_end at 4G.
>
> Signed-off-by: Patrick Delaunay
> ---
> example of issue in stm32mp1 board ev1:
> ram_start = c000
> size = 4000
> ram_end = 1
> ram_end &=
On Wed, Apr 10, 2019 at 1:52 AM Alex Kiernan wrote:
>
> On Tue, Apr 9, 2019 at 6:36 PM Jordan Hand wrote:
> >
> > Signed-off-by: Jordan Hand
> > ---
> > Image type is not supplied to `mkimage -l`. For this reason, we cannot
> > use imagetool_verify_print_header_by_type. Instead, this patch uses
On 4/10/19 5:12 PM, Stephen Warren wrote:
Hi,
it would be nice if I was CCed on this.
> I see that some mmc tests have been added to test/py, but I see problems
> with them:
>
> 1) test_mmc_rescan assumes that each entry in env__mmc_rd_configs is a
> separate device that can be rescanned. This
On 2/21/19 6:10 PM, Tom Rini wrote:
> On Thu, Feb 21, 2019 at 04:35:06PM -0600, Andrew F. Davis wrote:
>
>> On HS devices the 512b region of reset isolated memory called
>> MCU_PSRAM0 is firewalled by default. Until SYSFW is loaded we
>> cannot use this memory. It is only used to store a single
Import Linux 5.1-rc1 DT from 9e98c678c2d6 ("Linux 5.1-rc1") for the
meson-g12a-u200 board, the meson-g12a.dtsi and the corresponding bindings.
Signed-off-by: Neil Armstrong
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/meson-g12a-u200.dts | 29 +++
From: Jerome Brunet
The Amlogic U200 board is based on the Amlogic S905D2 SoC
from the Amlogic G12A SoC family.
The board has the following specifications :
- Amlogic S905D2 ARM Cortex-A53 quad-core SoC
- XGB DDR4 SDRAM
- 10/100 Ethernet (Internal PHY)
- 1 x USB 3.0 Host
- eMMC
- SDcard
From: Jerome Brunet
Add support for the Amlogic G12A SoC, which is a mix between the
new physical memory mapping of AXG and the functionnalities of
the previous Amlogic GXL/GXM SoCs.
To handle the internal ethernet PHY, the Amlogic G12A SoCs now
embeds a dedicated PLL to feed the internal PHY.
From: Jerome Brunet
Add basic support for the Amlogic G12A clock controller based on
the AXG driver.
Signed-off-by: Jerome Brunet
Signed-off-by: Neil Armstrong
---
arch/arm/include/asm/arch-meson/clock-g12a.h | 104 ++
drivers/clk/meson/Kconfig| 8 +
From: Jerome Brunet
Add pinctrl support for the Amlogic G12A SoC, which is
very similar to the Amlogic AXG support but with an additionnal
drive-strength register bank.
Signed-off-by: Jerome Brunet
Signed-off-by: Neil Armstrong
---
drivers/pinctrl/meson/Kconfig |4 +
From: Jerome Brunet
In order to support the Amlogic G12A clock controller,
re-architect the clock files into a meson directory.
No functionnal changes.
MAINTAINERS entry is also updated.
Signed-off-by: Jerome Brunet
Signed-off-by: Neil Armstrong
---
MAINTAINERS
This patchset adds basic support for the recent Amlogic G12A SoC family.
This SoC family embeds 4xCortex A53 CPUs, and is very similar to
the AXG SoC Family with the multimedia features of previous families.
This patchset adds :
- pinctrl support
- clk driver atfer a rework of the drivers files
I see that some mmc tests have been added to test/py, but I see problems
with them:
1) test_mmc_rescan assumes that each entry in env__mmc_rd_configs is a
separate device that can be rescanned. This isn't actually true; entries
in that array are intended to drive the mmc read test, and so can
Hi Andrzej,
Please could you avoid top posting?
On Wed, 10 Apr 2019 at 06:07, Witkowski, Andrzej
wrote:
>
> Hi,
>
> Thank you very much for your response and fix for the issue.
>
> Do you know when your patches will be pushed to an official u-boot repository?
Perhaps a few weeks.
> Could you
Hi Stefano,
Did you get any chance to review it?
Thanks.
Best regards,
Yangbo Lu
> -Original Message-
> From: Y.b. Lu
> Sent: Monday, April 8, 2019 11:04 PM
> To: u-boot@lists.denx.de
> Cc: Prabhakar Kushwaha ; Peng Fan
> ; sba...@denx.de
> Subject: RE: [v2, 0/5] Split fsl_esdhc driver
On 26/03/2019 16:02, Neil Armstrong wrote:
> From: Jerome Brunet
>
> Add pinctrl support for the Amlogic G12A SoC, which is
> very similar to the Amlogic AXG support but with an additionnal
> drive-strength register bank.
>
> Signed-off-by: Jerome Brunet
> Signed-off-by: Neil Armstrong
> ---
On 08/04/2019 10:09, Guillaume La Roque wrote:
> Periphs bank offset must be applied on all pins and
> PMX bank to prevent issue in meson_pinconf_set call.
> Without offset on pins when a call to pinconf is done
> meson_gpio_calc_reg_and_bit return wrong offset.
> To avoid breaking pmx function
On 26/03/2019 11:25, Neil Armstrong wrote:
> Signed-off-by: Neil Armstrong
> ---
> drivers/reset/reset-meson.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
> index 92f04695ec..31aa4d41e8 100644
> ---
On 26/03/2019 11:20, Neil Armstrong wrote:
> LibreTech AC is a single board computer manufactured by Libre Technology
> with the following specifications:
>
> - Amlogic S805X ARM Cortex-A53 quad-core SoC @ 1.2GHz
> - ARM Mali 450 GPU
> - 512MiB DDR4 SDRAM
> - 10/100 Ethernet
> - HDMI 2.0
On 22/03/2019 14:49, Guillaume La Roque wrote:
> This patch add support for I2C controller in Meson-AXG SoC,
> Due to the IP changes between I2C controller, we need to introduce
> a compatible data to make the divider factor configurable.
>
> backport from linux:
> 931b18e92cd0 ("2c: meson: add
The vendor U-boot branch and defconfig was wrong for the
Khadas VIM2, fix this.
Signed-off-by: Neil Armstrong
---
board/amlogic/q200/README.khadas-vim2 | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/amlogic/q200/README.khadas-vim2
The following changes since commit 3c99166441bf3ea325af2da83cfe65430b49c066:
Prepare v2019.04 (2019-04-08 21:40:40 -0400)
are available in the Git repository at:
git://git.denx.de/u-boot-sh.git master
for you to fetch changes up to c8630bb09674e2b8496753929ac4d0a610583f1e:
ARM: rmobile:
The following changes since commit 3c99166441bf3ea325af2da83cfe65430b49c066:
Prepare v2019.04 (2019-04-08 21:40:40 -0400)
are available in the Git repository at:
git://git.denx.de/u-boot-socfpga.git master
for you to fetch changes up to ef8679b24ec6226b7198e06747ff047a16030ca4:
arm:
The following changes since commit 3c99166441bf3ea325af2da83cfe65430b49c066:
Prepare v2019.04 (2019-04-08 21:40:40 -0400)
are available in the Git repository at:
git://git.denx.de/u-boot-usb.git master
for you to fetch changes up to 69535b33bc1fce43dcc10b646cf44db81cffa131:
usb:
When using the generic PHY on boards using an RGMII Realtek PHY,
gigabit speed is not always reliable.
This patch enables the Realtek PHY driver for such boards.
Signed-off-by: Neil Armstrong
---
configs/khadas-vim2_defconfig | 1 +
configs/nanopi-k2_defconfig | 1 +
Extend PHYTEC phyBOARD-i.MX6UL for phyCORE-i.MX6UL SoM (PCL063)
with eMMC on SoM.
CPU: Freescale i.MX6ULL rev1.0 792 MHz (running at 396 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 38C
Reset cause: POR
Model: Phytec phyBOARD-i.MX6ULL-Segin SBC
Board: PHYTEC phyCORE-i.MX6ULL
DRAM:
Hello Frieder,
Am 10.04.2019 um 15:31 schrieb Schrempf Frieder:
Hi Heiko,
On 10.04.19 14:44, Heiko Schocher wrote:
Hello Frieder,
Am 10.04.2019 um 12:49 schrieb Schrempf Frieder:
Hi,
I have a customer who has a NAND device with two MTD partitions and
each > of the partitions contains one
On Wed, 2019-04-10 at 15:23 +0200, Parthiban Nallathambi wrote:
> Hello Wadim,
>
> Thanks for sharing the details.
>
> On 4/10/19 10:35 AM, Wadim Egorov wrote:
> > Martyn,
> >
> > On 09.04.19 12:46, Martyn Welch wrote:
> > > On Tue, 2019-04-09 at 11:30 +0200, Parthiban Nallathambi wrote:
> > >
Hi Heiko,
On 10.04.19 14:44, Heiko Schocher wrote:
> Hello Frieder,
>
> Am 10.04.2019 um 12:49 schrieb Schrempf Frieder:
>> Hi,
>>
>> I have a customer who has a NAND device with two MTD partitions and
>> each > of the partitions contains one UBI volume with a UBIFS filesystem.
>
> Bad idea
Hello Wadim,
Thanks for sharing the details.
On 4/10/19 10:35 AM, Wadim Egorov wrote:
Martyn,
On 09.04.19 12:46, Martyn Welch wrote:
On Tue, 2019-04-09 at 11:30 +0200, Parthiban Nallathambi wrote:
Hello Martyn,
On 4/9/19 10:49 AM, Martyn Welch wrote:
On Mon, 2019-04-08 at 20:04 +0200,
On Wed, Apr 10, 2019 at 8:46 PM Lukas Auer
wrote:
>
> Boards such as qemu-riscv, which receive their device tree at runtime,
> for example from QEMU or firmware, are unable to add the appropriate
> device tree properties to make devices available pre relocation.
> Instead, they must rely on the
Boards such as qemu-riscv, which receive their device tree at runtime,
for example from QEMU or firmware, are unable to add the appropriate
device tree properties to make devices available pre relocation.
Instead, they must rely on the DM_FLAG_PRE_RELOC flag to be set for the
required drivers.
Hello Frieder,
Am 10.04.2019 um 12:49 schrieb Schrempf Frieder:
Hi,
I have a customer who has a NAND device with two MTD partitions and each > of
the partitions contains one UBI volume with a UBIFS filesystem.
Bad idea ... why?
You may loose lifetime of the board, as UBI cannot use PEBs
On Wed, Mar 13, 2019 at 05:49:27PM +0100, Marek Vasut wrote:
> Add test for 'mmc rescan' subcommand. This tests whether the
> system can switch to a specific card and then rescan the card.
>
> Signed-off-by: Marek Vasut
> Cc: Tom Rini
> Cc: Simon Glass
> Reviewed-by: Simon Glass
Applied to
On Wed, Mar 13, 2019 at 05:49:29PM +0100, Marek Vasut wrote:
> Add option to the mmc rd test to check the duration of the
> execution of the mmc read command. This allows intercepting
> read performance regressions.
>
> Signed-off-by: Marek Vasut
> Cc: Tom Rini
> Cc: Simon Glass
>
On Wed, Mar 13, 2019 at 05:49:28PM +0100, Marek Vasut wrote:
> Add test for 'mmc info' subcommand. This tests whether the card
> information is obtained correctly and verifies the device, bus
> speed, bus mode and bus width.
>
> Signed-off-by: Marek Vasut
> Cc: Tom Rini
> Cc: Simon Glass
>
On Wed, Mar 13, 2019 at 05:49:25PM +0100, Marek Vasut wrote:
> Factor out the 'mmc dev' call so it can be recycled by other tests.
>
> Signed-off-by: Marek Vasut
> Cc: Tom Rini
> Cc: Simon Glass
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
On Wed, Mar 13, 2019 at 05:49:26PM +0100, Marek Vasut wrote:
> Add separate test for 'mmc dev' subcommand. This tests whether
> the system can switch to a specific card.
>
> Signed-off-by: Marek Vasut
> Cc: Tom Rini
> Cc: Simon Glass
> Reviewed-by: Simon Glass
Applied to u-boot/master,
On Wed, Feb 27, 2019 at 12:55:57PM +0200, Anssi Hannula wrote:
> A FAT12/FAT16 root directory location is specified by a sector offset and
> it might not start at a cluster boundary. It also resides before the
> data area (before cluster 2).
>
> However, the current code assumes that the root
On Wed, Feb 13, 2019 at 12:15:27PM +0100, Jean-Jacques Hiblot wrote:
> Test cases are:
> 1) basic link creation, verify it can be followed
> 2) chained links, verify it can be followed
> 3) replace exiting file a with a link, and a link with a link. verify it
>can be followed
> 4) create a
On Fri, Mar 29, 2019 at 07:29:45AM -0400, Tom Rini wrote:
> From: Benjamin Lim
>
> Ext4 allows for arbitrarily sized block group descriptors when 64-bit
> addressing is enabled, which was previously not properly supported. This
> patch dynamically allocates a chunk of memory of the correct
On Wed, Feb 13, 2019 at 12:15:26PM +0100, Jean-Jacques Hiblot wrote:
> The command line is:
> ln target linkname
>
> Currently symbolic links are supported only in ext4 and only if the option
> CMD_EXT4_WRITE is enabled.
>
> Signed-off-by: Jean-Jacques Hiblot
> Reviewed-by: Tom Rini
On Wed, Feb 13, 2019 at 12:15:25PM +0100, Jean-Jacques Hiblot wrote:
> Re-use the functions used to write/create a file, to support creation of a
> symbolic link.
> The difference with a regular file are small:
> - The inode mode is flagged with S_IFLNK instead of S_IFREG
> - The ext2_dirent's
On Tue, Feb 26, 2019 at 03:45:22PM +, Gero Schumacher wrote:
> Hi,
>
> when I try to load a sparse file via ext4load, I am getting the error message
> 'invalid extent'
>
> After a deeper look in the code, it seems to be an issue in the function
> ext4fs_get_extent_block in
On Wed, Feb 13, 2019 at 12:15:24PM +0100, Jean-Jacques Hiblot wrote:
> There is no need to modify the buffer passed to ext4fs_write_file().
> The memset() call is not required here and was likely copied from the
> equivalent part of the ext4fs_read_file() function where we do need it.
>
>
On Wed, Feb 13, 2019 at 12:15:23PM +0100, Jean-Jacques Hiblot wrote:
> We need to make sure that file writes,file creation, etc. are properly
> performed and do not corrupt the filesystem.
> To help with this, introduce the assert_fs_integrity() function that
> executes the appropriate fsck tool.
On Wed, Feb 13, 2019 at 12:15:22PM +0100, Jean-Jacques Hiblot wrote:
> If the metadata checksums are enabled, all write operations will fail.
>
> Signed-off-by: Jean-Jacques Hiblot
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Jan 30, 2019 at 12:58:05PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> When a file contains extents, U-Boot currently reads extent-related data
> for each block in the file, even if that data is located in the same
> block each time. This significantly slows down loading of
On Tue, Apr 09, 2019 at 12:14:58PM +, eugen.hris...@microchip.com wrote:
> Hello Tom,
>
> Please pull tag u-boot-atmel-2019.07-a , the first set of new features
> and fixes for u-boot-atmel for 2019.07 release.
>
> The features include the pincontrol drive strength/slew rate for
>
On many B boards we have a reset-controller, responsible for very
early board-bringup (voltages, clocks, ...) and bootmode selection.
To be ready for adding more B boards to source tree while avoiding
duplicate code, we add the resetcontroller implementation to the common
part of B boards.
Today the BuR common stuff is only used on AM33XX boards. In future we
plan to have many other platforms than AM33XX so we have to move arch-
specific #include(s) to responsible #ifdef sections. By the way we drop
unneeded #include(s).
Signed-off-by: Hannes Schmelzer
---
- fixup coding style
- drop unused 'PUSH_KEY' define
Signed-off-by: Hannes Schmelzer
---
board/BuR/brxre1/board.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/board/BuR/brxre1/board.c b/board/BuR/brxre1/board.c
index 2d0ed41..6639f22 100644
---
Many B boards are equipped with an I2C-EEPROM where various
information can be stored.
Today there is only a single byte for 'board_id' used.
We write this 'board_id' into environment for later use during boot.
If the value != 0xFF, meaning the byte is programmed, we modify the
"brdefaultip"
The handling of regarding bootmode and early setup has been moved to
central location 'common/br_resetc.c', so use this on brxre1 board.
Signed-off-by: Hannes Schmelzer
---
board/BuR/brxre1/Makefile | 1 +
board/BuR/brxre1/board.c | 159 +-
2
Update DDR configuration with the latest update:
- PUBL_regs: DXnGCR[0]= according to ddr_width to disable Byte
lane 2/3 in 16bit
- fix LPDDR2/3 timing_calc to step RL/WL in relaxed
timings mode
- remove LPDDR3 RL3 (optional) support vs MR0[7]
because MR0[7] can't be
Signed-off-by: Hannes Schmelzer
---
board/BuR/common/common.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 513872a..28ebb84 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@
Manage power supply configuration for board using stpmic1
with LPDDR2 or with LPDDR3:
+ VDD_DDR1 = 1.8V with BUCK3 (bypass if possible)
+ VDD_DDR2 = 1.2V with BUCK2
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/include/mach/ddr.h | 9 +-
board/st/stm32mp1/board.c|
This debug mode is used by CubeMX DDR tuning tools
or manualy for tests during board bring-up.
It is simple console used to change DDR parameters and check
initialization.
Signed-off-by: Patrick Delaunay
---
common/Makefile | 1 +
drivers/ram/stm32mp1/Kconfig
Add command tuning for DDR interactive mode, used during
board bring-up or with CubeMX DDR tools to execute software
tuning for the DDR configuration:
- software read DQS Gating (replace the built-in one)
- Bit de-skew
- Eye Training or DQS training
Signed-off-by: Patrick Delaunay
---
Force alignment of the size of parameters array with
the expected value in the binding, that allows compilation
error when the array size change.
Signed-off-by: Patrick Delaunay
---
.../memory-controllers/st,stm32mp1-ddr.txt | 2 +-
drivers/ram/stm32mp1/stm32mp1_ddr.c|
Add command tests for DDR interactive mode, used during
board bring-up or with CubeMX DDR tools to verify the
DDR configuration.
Signed-off-by: Patrick Delaunay
---
drivers/ram/stm32mp1/Kconfig|8 +
drivers/ram/stm32mp1/Makefile |1 +
Allow fractional support in DDR tools.
Signed-off-by: Patrick Delaunay
---
arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi | 2 +-
arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi | 2 +-
.../memory-controllers/st,stm32mp1-ddr.txt | 4 ++--
Component Notification DDR controller errata (3.00a):9001313030
Synchronization Time Waited After De-assertion of presetn is
128 pclk Cycles.
Signed-off-by: Patrick Delaunay
---
drivers/ram/stm32mp1/stm32mp1_ddr.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git
Regression introduced by rebase, when loop
was replaced by readl_poll_timeout() function.
Signed-off-by: Patrick Delaunay
---
drivers/ram/stm32mp1/stm32mp1_ddr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c
Serie with some update on the DDR driver for stm32mp1 boards
Warning: the serie need to be apply after
1) http://patchwork.ozlabs.org/project/uboot/list/?series=89855
=> for STPMIC1 rename
2) http://patchwork.ozlabs.org/project/uboot/list/?series=91497
=> for DK1/DK2, DDR configuration
The
Am 08.04.19 um 10:31 schrieb Horatiu Vultur:
> Add network driver for Microsemi Ethernet switch.
> It is present on ServalT SoCs.
>
> Signed-off-by: Horatiu Vultur
> ---
> .../include/mach/servalt/servalt_devcpu_gcb.h | 2 +
> drivers/net/mscc_eswitch/Kconfig | 7 +
This patch tries to implement a generic watchdog_reset() function that
can be used by all boards that want to service the watchdog device in
U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG.
Without this approach, new boards or platforms needed to implement a
board specific version
Now that we have a generic DT property "timeout-sec" handling, the
driver specific implementation can be dropped.
This patch also changes the timeout restriction to the min and max
values (clipping). Before this patch, the value provided via
"timeout-sec" was used if the parameter was too high or
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