On Tue, 2019-06-04 at 07:13 +0200, Simon Goldschmidt wrote:
> On Tue, Jun 4, 2019 at 1:57 AM Dalon Westergreen
> wrote:
> >
> >
> > From: Dalon Westergreen
> >
> > CONFIG_OF_EMBED was primarily enabled to support the stratix10
> > spl hex file requirements. Since this option now produces a
>
This patch adds Kconfig entries for the F (Single-Precision)
and D (Double-Precision) floating point instruction-set extensions.
Signed-off-by: Eric Lin
---
Changes for v2:
- Grammatical correction in commit message "adds"
- Fixed the config name to indicate both F and D
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Bin Meng
> Sent: Wednesday, May 08, 2019 9:39 PM
> To: Karsten Merker
> Cc: U-Boot Mailing List
> Subject: Re: [U-Boot] [RFC PATCH 1/1] riscv: increase the environment size for
> the qemu-riscv platform to 128kB
>
> On Mon, May 6,
> From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de]
> Sent: Saturday, June 01, 2019 12:13 AM
> To: padmarao.beg...@microchip.com; u-boot@lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志); cyril.j...@microchip.com;
> bmeng...@gmail.com; anup.pa...@wdc.com; lewis.ha...@microchip.com
> Subject: Re:
>
> Hi BIn
>
> > Hi Rick,
> >
> > On Mon, May 27, 2019 at 4:40 PM Auer, Lukas
> > wrote:
> > >
> > > On Wed, 2019-05-15 at 08:42 -0700, Bin Meng wrote:
> > > > QEMU 4.0.0 'virt' target integrates a generic ECAM PCI host.
> > > > Enable the driver for it.
> > > >
> > > > Signed-off-by: Bin Meng
>
On 29/05/19 3:15 PM, Faiz Abbas wrote:
> Sync the sdhci0 node from kernel. This changes the compatible that is
> required to be there in the driver. Change the same for the SD card node
> which is not yet supported in kernel. This also syncs the main_pmx0 node
> as a side effect.
>
> Also
On Tue, Jun 4, 2019 at 1:57 AM Dalon Westergreen
wrote:
>
> From: Dalon Westergreen
>
> CONFIG_OF_EMBED was primarily enabled to support the stratix10
> spl hex file requirements. Since this option now produces a
> warning during build, and the spl hex can be created using
> alternate methods,
On 6/4/19 5:11 AM, AKASHI Takahiro wrote:
More and more features are coming into UEFI support, while some people
are worried about the growing size of the code. Adding a configuration
option for each feature is a solution, but it will also make
the configuration complicated and unreadable.
With
> Subject: Re: [EXT] Re: [U-Boot] [PATCH 4/6] spl: mmc: support loading i.MX
> container format file
>
> On 5/30/19 9:06 AM, Ye Li wrote:
> > On 2019/5/27 19:31, Marek Vasut wrote:
> >> Caution: EXT Email
> >>
> >> On 5/27/19 11:49 AM, Peng Fan wrote:
> >>> Hi Marek, Lukasz,
> >>>
> Subject:
Hi Simon,
On 05/19/2019 12:08 AM, Simon Glass wrote:
> Hi Christoph,
>
> On Tue, 7 May 2019 at 03:05, Christoph Muellner
> wrote:
>> Currently addr_aligned() performs an alignment and a length check
>> to validate the DMA address. However, some machines have stricter
>> restrictions of DMA-able
On Tue, 2019-06-04 at 02:00 +0200, Marek Vasut wrote:
> On 6/4/19 1:57 AM, Dalon Westergreen wrote:
> > From: Dalon Westergreen <
> > dalon.westergr...@intel.com
> > >
> >
> > Some architectures, Stratix10, require a hex formatted spl that combines
> > the spl image and dtb. This adds a target
More and more features are coming into UEFI support, while some people
are worried about the growing size of the code. Adding a configuration
option for each feature is a solution, but it will also make
the configuration complicated and unreadable.
With this patch, this issue will be addressed by
Hi Christoph,
On 05/07/2019 05:05 PM, Christoph Muellner wrote:
> From: Christoph Müllner
>
> Some machines have limited DMA engines, which cannot deal
> with arbitrary addresses. This patch introduces a function
> to model these restrictions on a machine level.
>
> Signed-off-by: Christoph
Hi Christoph,
On 05/07/2019 05:05 PM, Christoph Muellner wrote:
> Patches on the U-Boot mailing list from Rockchip engineers
> indicate, that the RK3399's DMA engines are not able to use
> addresses in high-memory (above 0xf800).
>
> This patch models this restriction in an RK3399 specific
>
Hi Breno,
On Mon, Jun 3, 2019 at 11:55 PM Breno Matheus Lima wrote:
>
> Commit 22191ac35344 ("drivers/crypto/fsl: assign job-rings to
> non-TrustZone") breaks HABv4 encrypted boot support in the
> following i.MX devices:
>
> - i.MX6UL
> - i.MX7S
> - i.MX7D
> - i.MX7ULP
>
> For preparing a HABv4
Commit 22191ac35344 ("drivers/crypto/fsl: assign job-rings to
non-TrustZone") breaks HABv4 encrypted boot support in the
following i.MX devices:
- i.MX6UL
- i.MX7S
- i.MX7D
- i.MX7ULP
For preparing a HABv4 encrypted boot image it's necessary to
encapsulate the generated DEK in a blob. In
> Subject: [PATCH 5/5] mx6sabreauto: set SYS_MALLOC_F for video
>
> Sabre Auto boards currently hang with:
> ```
> U-Boot 2019.07-rc3-00057-gc41940c406 (Jun 03 2019 - 14:42:41 +0200)
>
> CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz)
> CPU: Automotive temperature grade (-40C to
> Subject: [PATCH 2/5] mx6sabreauto: Select pinctrl driver
>
> With the conversion to DM we should select the pinctrl driver.
>
> Signed-off-by: Sjoerd Simons
> ---
>
> configs/mx6sabreauto_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/configs/mx6sabreauto_defconfig
>
Hi Rick,
On Tue, May 28, 2019 at 5:45 PM Andes wrote:
>
> From: Rick Chen
>
> Use CCTL command to do d-cache write back and invalidate
> instead of fence.
>
> Signed-off-by: Rick Chen
> Cc: Greentime Hu
> ---
> arch/riscv/cpu/ax25/cache.c | 22 +-
> 1 file changed, 13
Hi Rick,
On Tue, May 28, 2019 at 5:44 PM Andes wrote:
>
> From: Rick Chen
>
> When L2 node exists inside cpus node, uclass_get_device
> can not parse L2 node successfully. So move it outside
> from cpus node.
>
> Also add tag-ram-ctl and data-ram-ctl attributes for
> v5l2 cache controller
Hi Rick,
On Tue, May 28, 2019 at 5:44 PM Andes wrote:
>
> From: Rick Chen
>
> Flush and disable cache in cleanup_before_linux()
> which will be called before jump to linux.
>
> The sequence will be preferred as below:
> L1 flush -> L1 disable -> L2 flush -> L2 disable
>
> Signed-off-by: Rick
Hi Rick,
On Tue, May 28, 2019 at 5:44 PM Andes wrote:
>
> From: Rick Chen
>
> Find the UCLASS_CACHE driver to configure the cache controller's
> settings.
>
> Signed-off-by: Rick Chen
> Cc: Greentime Hu
> ---
> board/AndesTech/ax25-ae350/ax25-ae350.c | 15 +++
> 1 file changed,
Hi Rick,
On Tue, May 28, 2019 at 5:44 PM Andes wrote:
>
> From: Rick Chen
>
> Select the v5l2 UCLASS_CACHE driver for AE350.
>
> Signed-off-by: Rick Chen
> Cc: Greentime Hu
> ---
> board/AndesTech/ax25-ae350/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
Hi Rick,
On Tue, May 28, 2019 at 5:44 PM Andes wrote:
>
> From: Rick Chen
>
> Add a v5l2 cache controller driver that is usually found on
> Andes RISC-V ae350 platform. It will parse the cache settings
> from the dtb.
>
> In this version tag and data ram control timing can be adjusted
> by the
> Subject: [PATCH 1/5] mx6sabreauto: Remove CONFIG_SPL_DM to decrease
> the SPL size
>
> The i.mx6 SPL binary cannot be bigger then 68K, while with the current
> defconfig for sabreauto it's only about 56K as soon as USB support gets added
> the size will overflows.
>
> Signed-off-by: Sjoerd
On 06/01/2019 10:47 PM, Matwey V. Kornilov wrote:
> Add build notes for Pine64 Rock64 board.
>
> Signed-off-by: Matwey V. Kornilov
> ---
> doc/README.rockchip | 30 --
Reviewed-by: Kever Yang
Thanks,
- Kever
> 1 file changed, 28 insertions(+), 2 deletions(-)
>
>
> Subject: fsl_esdhc: GPIO regulator as VQMMC supply?
>
> Hi,
>
> I’m trying to implement the VQMMC supply for the an eMMC on my board
> using a GPIO regulator, i.e.
>
> reg_sd_vsel: regulator-sd-vsel {
> pinctrl-names = "default";
> pinctrl-0 = <_sd_vsel>;
> compatible =
> -Original Message-
> From: Sven Schwermer [mailto:s...@svenschwermer.de]
> Sent: 2019年5月31日 18:44
> To: Peng Fan
> Cc: u-boot@lists.denx.de; Jaehoon Chung
> Subject: Re: [PATCH] regulator: Allow autosetting fixed regulators
>
> > How about the following patch? not tested
> >
> >
Hi BIn
> Hi Rick,
>
> On Mon, May 27, 2019 at 4:40 PM Auer, Lukas
> wrote:
> >
> > On Wed, 2019-05-15 at 08:42 -0700, Bin Meng wrote:
> > > QEMU 4.0.0 'virt' target integrates a generic ECAM PCI host.
> > > Enable the driver for it.
> > >
> > > Signed-off-by: Bin Meng
> > > ---
> > >
> > >
On Tue, Jun 4, 2019 at 12:12 AM Alex Marginean wrote:
>
> A very simple test for DM_MDIO, mimicks a register write/read through the
> sandbox bus to a dummy PHY.
>
> Signed-off-by: Alex Marginean
> ---
>
> Changes in v2:
> - new patch, v1 didn't have a test included
> Changes in v3:
>
Hi Alex,
On Tue, Jun 4, 2019 at 12:11 AM Alex Marginean wrote:
>
> Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as
> stand-alone devices. Useful in particular for systems that support
> DM_ETH and have a stand-alone MDIO hardware block shared by multiple
> Ethernet
Hi Rick,
On Mon, May 27, 2019 at 4:40 PM Auer, Lukas
wrote:
>
> On Wed, 2019-05-15 at 08:42 -0700, Bin Meng wrote:
> > QEMU 4.0.0 'virt' target integrates a generic ECAM PCI host.
> > Enable the driver for it.
> >
> > Signed-off-by: Bin Meng
> > ---
> >
> > board/emulation/qemu-riscv/Kconfig |
Hi Troy
Bin Meng 於 2019年6月3日 週一 下午10:56寫道：
>
> Hi Troy,
>
> On Mon, Jun 3, 2019 at 10:53 PM Troy Benjegerdes
> wrote:
> >
> >
> >
> > > On Jun 3, 2019, at 9:19 AM, Bin Meng wrote:
> > >
> > > +Anup
> > >
> > > Hi Troy,
> > >
> > > On Mon, Jun 3, 2019 at 9:19 PM Troy Benjegerdes
> > > wrote:
>
Hi Stefan
Stefan Roese 於 2019年6月3日 週一 下午9:05寫道：
>
> Hi Rick,
>
> On 03.06.19 11:27, Rick Chen wrote:
> > Hi Stefan and other seniors
> >
> > I encounter some problems about cfi flash driver.
> > And hope you can give some comments to resolve it.
> > Followings are the flash verification status
On 6/4/19 1:57 AM, Dalon Westergreen wrote:
> From: Dalon Westergreen
>
> Some architectures, Stratix10, require a hex formatted spl that combines
> the spl image and dtb. This adds a target to create said hex file with
> and offset of SPL_TEXT_BASE.
>
> Signed-off-by: Dalon Westergreen
>
From: Dalon Westergreen
CONFIG_OF_EMBED was primarily enabled to support the stratix10
spl hex file requirements. Since this option now produces a
warning during build, and the spl hex can be created using
alternate methods, CONFIG_OF_EMBED is no longer needed.
Signed-off-by: Dalon Westergreen
From: Dalon Westergreen
Some architectures, Stratix10, require a hex formatted spl that combines
the spl image and dtb. This adds a target to create said hex file with
and offset of SPL_TEXT_BASE.
Signed-off-by: Dalon Westergreen
---
Changes in v2:
-> Move spl hex file generation to SPL
On Thu, 30 May 2019 18:31:48 +0800
Chuanhua Han wrote:
> Usually the i2c bus needs to write the address of the register before
> reading the internal register data of the device (ignoring the
> transmission of the slave address).
>
> Generally, the stop signal is not needed before the register
Hi Sjoerd,
> From: Frieder Schrempf
>
> Add support for loading u-boot FIT images over the USB SPD protocol in
> the SPL
>
> [Small fixes to build]
> Signed-off-by: Sjoerd Simons
Reviewed-by: Lukasz Majewski
> ---
>
> common/spl/spl_sdp.c | 11 --
>
Hi Sjoerd,
> Being able to upload u-boot over USB is rather useful, so ideally this
> functionality should be enabled by the default config for these
> boards. Currently however no USB support is built into the SPL nor is
> SDP enabled for i.MX6 Sabre Auto boards.
>
> The first two patches in
From: Igor Opaniuk
Extend lcdif DT node with proper display-timings for mxsfb driver.
Signed-off-by: Igor Opaniuk
---
arch/arm/dts/imx7-colibri-emmc.dts | 2 ++
arch/arm/dts/imx7-colibri.dtsi | 28
2 files changed, 30 insertions(+)
diff --git
From: Igor Opaniuk
Refactor video_hw_init() function, and introduce an independent function
for the common procedure of initialization.
Currently video_hw_init() is only in charge of parsing configuration from
env("videomode") and filling struct GraphicPanel, and new
mxs_probe_common() does hw
From: Igor Opaniuk
Follow alphabetical order of includes, which simplifies detecting duplicate
includes etc.
Signed-off-by: Igor Opaniuk
---
drivers/video/mxsfb.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index
From: Igor Opaniuk
Enable DM_VIDEO for Colibri iMX7 eMMC version.
Signed-off-by: Igor Opaniuk
---
configs/colibri_imx7_emmc_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/colibri_imx7_emmc_defconfig
b/configs/colibri_imx7_emmc_defconfig
index
From: Igor Opaniuk
Provide directly framebuffer address instead of pointer to
GraphicDevice struct, which will let to re-use this function in
DM_VIDEO configurations.
Signed-off-by: Igor Opaniuk
---
drivers/video/mxsfb.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff
From: Igor Opaniuk
Extend the driver to build with DM_VIDEO enabled. DTS files
must additionally include 'u-boot,dm-pre-reloc' property in
soc and child nodes to enable driver binding to mxsfb device.
Signed-off-by: Igor Opaniuk
---
arch/arm/mach-imx/cpu.c| 2 +-
From: Igor Opaniuk
This series of patches refactors and extends NXP mxsfb video driver to
be build with DM_VIDEO enabled. DTS files must additionally include
'u-boot,dm-pre-reloc' property in soc and child nodes to enable driver
binding to mxsfb device.
Also enables DM_VIDEO by default for
> On Jun 3, 2019, at 12:02 PM, Tom Rini wrote:
>
> On Mon, Jun 03, 2019 at 09:44:28AM -0500, Troy Benjegerdes wrote:
>>
>>
>>> On Jun 3, 2019, at 5:49 AM, Andreas Schwab wrote:
>>>
>>> On Mai 29 2019, Karsten Merker wrote:
>>>
Mainline U-Boot already uses the distro bootcmd
On Mon, Jun 03, 2019 at 12:17:43PM -0700, Palmer Dabbelt wrote:
> On Mon, 03 Jun 2019 10:02:57 PDT (-0700), tr...@konsulko.com wrote:
> >On Mon, Jun 03, 2019 at 09:44:28AM -0500, Troy Benjegerdes wrote:
> >>
> >>
> >>> On Jun 3, 2019, at 5:49 AM, Andreas Schwab wrote:
> >>> > On Mai 29 2019,
On Mon, 2019-06-03 at 16:17 -0300, Fabio Estevam wrote:
> Hi Sjoerd,
>
> On Mon, Jun 3, 2019 at 4:02 PM Sjoerd Simons
> wrote:
> > From: Frieder Schrempf
> >
> > Add support for loading u-boot FIT images over the USB SPD protocol
> > in
> > the SPL
> >
> > [Small fixes to build]
>
> Applied
On Mon, 03 Jun 2019 10:02:57 PDT (-0700), tr...@konsulko.com wrote:
On Mon, Jun 03, 2019 at 09:44:28AM -0500, Troy Benjegerdes wrote:
> On Jun 3, 2019, at 5:49 AM, Andreas Schwab wrote:
>
> On Mai 29 2019, Karsten Merker wrote:
>
>> Mainline U-Boot already uses the distro bootcmd
Hi Sjoerd,
On Mon, Jun 3, 2019 at 4:02 PM Sjoerd Simons
wrote:
>
> From: Frieder Schrempf
>
> Add support for loading u-boot FIT images over the USB SPD protocol in
> the SPL
>
> [Small fixes to build]
Applied this patch against U-Boot master and it still does not build
for me when using
The i.mx6 SPL binary cannot be bigger then 68K, while with the current
defconfig for sabreauto it's only about 56K as soon as USB support gets
added the size will overflows.
Signed-off-by: Sjoerd Simons
---
configs/mx6sabreauto_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git
To allow loading u-boot over USB enable SPD support in the SPL.
Signed-off-by: Sjoerd Simons
---
configs/mx6sabreauto_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index 91ea1ca9e4..6903048d85 100644
---
Sabre Auto boards currently hang with:
```
U-Boot 2019.07-rc3-00057-gc41940c406 (Jun 03 2019 - 14:42:41 +0200)
CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz)
CPU: Automotive temperature grade (-40C to 125C)Reset cause: WDOG
Model: Freescale i.MX6 Quad Plus SABRE Automotive Board
From: Frieder Schrempf
Add support for loading u-boot FIT images over the USB SPD protocol in
the SPL
[Small fixes to build]
Signed-off-by: Sjoerd Simons
---
common/spl/spl_sdp.c | 11 --
drivers/usb/gadget/f_sdp.c | 41 --
include/sdp.h
With the conversion to DM we should select the pinctrl driver.
Signed-off-by: Sjoerd Simons
---
configs/mx6sabreauto_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index bf163a2a6e..91ea1ca9e4 100644
---
Being able to upload u-boot over USB is rather useful, so ideally this
functionality should be enabled by the default config for these boards.
Currently however no USB support is built into the SPL nor is SDP
enabled for i.MX6 Sabre Auto boards.
The first two patches in this series adjust the
On 6/3/19 3:31 PM, Parthiban Nallathambi wrote:
> From: Niel Fourie
>
> Support for Phytech phyCORE AM335x R2 SOM (PCL060) on the Phytec
> phyBOARD-Wega AM335x.
>
> CPU : AM335X-GP rev 2.1
> Model: Phytec AM335x phyBOARD-WEGA
> DRAM: 256 MiB
> NAND: 256 MiB
> MMC: OMAP SD/MMC: 0
> eth0:
On Mon, Jun 03, 2019 at 09:44:28AM -0500, Troy Benjegerdes wrote:
>
>
> > On Jun 3, 2019, at 5:49 AM, Andreas Schwab wrote:
> >
> > On Mai 29 2019, Karsten Merker wrote:
> >
> >> Mainline U-Boot already uses the distro bootcmd environment for
> >> the qemu "virt" machine and it works well.
>
A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.
Signed-off-by: Alex Marginean
---
Changes in v2:
- new patch, v1 didn't have a test included
Changes in v3:
- DM_MDIO and PHYLIB are now implied in arc/Kconfig
- added
Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as
stand-alone devices. Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces.
Signed-off-by: Alex Marginean
---
Changes in v2:
- fixed
pon., 3 cze 2019 o 15:03 Adam Ford napisał(a):
>
> On Mon, Jun 3, 2019 at 3:12 AM Bartosz Golaszewski wrote:
> >
> > sob., 1 cze 2019 o 05:24 Adam Ford napisał(a):
> > >
> > > On Fri, May 31, 2019 at 8:32 AM Bartosz Golaszewski wrote:
> > > >
> > > > From: Bartosz Golaszewski
> > > >
> > > >
Hi Troy,
On Mon, Jun 3, 2019 at 10:53 PM Troy Benjegerdes
wrote:
>
>
>
> > On Jun 3, 2019, at 9:19 AM, Bin Meng wrote:
> >
> > +Anup
> >
> > Hi Troy,
> >
> > On Mon, Jun 3, 2019 at 9:19 PM Troy Benjegerdes
> > wrote:
> >>
> >>
> >>
> >>> On Jun 2, 2019, at 9:22 PM, Rick Chen wrote:
> >>>
>
> On Jun 3, 2019, at 9:19 AM, Bin Meng wrote:
>
> +Anup
>
> Hi Troy,
>
> On Mon, Jun 3, 2019 at 9:19 PM Troy Benjegerdes
> wrote:
>>
>>
>>
>>> On Jun 2, 2019, at 9:22 PM, Rick Chen wrote:
>>>
>>> Hi Troy
>>>
> From: Troy Benjegerdes [mailto:troy.benjeger...@sifive.com]
> Sent:
> On Jun 3, 2019, at 5:49 AM, Andreas Schwab wrote:
>
> On Mai 29 2019, Karsten Merker wrote:
>
>> Mainline U-Boot already uses the distro bootcmd environment for
>> the qemu "virt" machine and it works well.
>
> The distro_bootcmd doesn't work for the sifive platform yet because it
>
> On Jun 2, 2019, at 9:22 PM, Rick Chen wrote:
>
> Hi Troy
>
>>> From: Troy Benjegerdes [mailto:troy.benjeger...@sifive.com]
>>> Sent: Saturday, June 01, 2019 12:24 AM
>>> To: Auer, Lukas
>>> Cc: Rick Jian-Zhi Chen(陳建志); bmeng...@gmail.com; pal...@sifive.com
>>> Subject: Re: Hart lottery and
From: Roman Stratiienko
This allows to use any available compression format with Android boot image
Since not all available compression formats have a magic number we should
explicitly specify type of compression.
For this purpose using uImage format becomes very useful, as this format is
+Anup
Hi Troy,
On Mon, Jun 3, 2019 at 9:19 PM Troy Benjegerdes
wrote:
>
>
>
> > On Jun 2, 2019, at 9:22 PM, Rick Chen wrote:
> >
> > Hi Troy
> >
> >>> From: Troy Benjegerdes [mailto:troy.benjeger...@sifive.com]
> >>> Sent: Saturday, June 01, 2019 12:24 AM
> >>> To: Auer, Lukas
> >>> Cc: Rick
On Mon, Jun 03, 2019 at 04:18:29AM +, Chuanhua Han wrote:
>
>
> > -Original Message-
> > From: Tom Rini
> > Sent: 2019年5月31日 3:43
> > To: Chuanhua Han
> > Cc: ja...@openedev.com; w...@denx.de; Shengzhou Liu
> > ; Ruchika Gupta ; Pan
> > Jiafei ; u-boot@lists.denx.de; Jiafei Pan
> >
On Fri, May 31, 2019 at 02:49:34AM +, Chuanhua Han wrote:
>
>
> > -Original Message-
> > From: Tom Rini
> > Sent: 2019年5月31日 3:43
> > To: Chuanhua Han
> > Cc: ja...@openedev.com; w...@denx.de; Shengzhou Liu
> > ; Ruchika Gupta ; Pan
> > Jiafei ; u-boot@lists.denx.de; Jiafei Pan
> >
From: Niel Fourie
Support for Phytech phyCORE AM335x R2 SOM (PCL060) on the Phytec
phyBOARD-Wega AM335x.
CPU : AM335X-GP rev 2.1
Model: Phytec AM335x phyBOARD-WEGA
DRAM: 256 MiB
NAND: 256 MiB
MMC: OMAP SD/MMC: 0
eth0: ethernet@4a10
Working:
- Eth0
- i2C
- MMC/SD
- NAND
- UART
-
Enable support for Intel E1000 based PCIe ethernet cards that
can be used to test PCIe RC functionality on AM65x EVM.
Signed-off-by: Sekhar Nori
---
configs/am65x_evm_a53_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/am65x_evm_a53_defconfig
Add needed device-tree nodes to support PCIe 0
and SERDES on AM65x SoC. The nodes are kept
disabled by default.
Signed-off-by: Sekhar Nori
---
arch/arm/dts/k3-am65-main.dtsi | 108 +
arch/arm/dts/k3-am65.dtsi | 1 +
Add support for clk_is_match() which is required to
know if two clock pointers point to the same exact
physical clock.
Also add a unit test for the new API.
Reviewed-by: Lokesh Vutla
Signed-off-by: Sekhar Nori
---
drivers/clk/clk-uclass.c | 13 +
include/clk.h| 13
Enable support for PCIe and related configurations
on AM654 EVM platform.
Signed-off-by: Sekhar Nori
---
configs/am65x_evm_a53_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 41cf0100fa3a..7745e2038790
Add a new SERDES driver for TI's AM654x SoC which configures
the SERDES only for PCIe. Support fo USB3 can be added later.
SERDES in am654x has three input clocks (left input, external
reference clock and right input) and two output clocks (left
output and right output) in addition to a PLL mux
Add driver supporting PCIe root-complex available
on TI's AM65x SoC.
Signed-off-by: Sekhar Nori
---
drivers/pci/Kconfig | 6 +
drivers/pci/Makefile | 1 +
drivers/pci/pcie_dw_ti.c | 725 +++
3 files changed, 732 insertions(+)
create mode
Hi,
This patch series adds PCIe root complex support for AM654x SoC.
The device-tree files are based on bindings accepted in linux.
See files Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.txt
and Documentation/devicetree/bindings/pci/pci-keystone.txt in latest
mainline master.
I
Current dev_read_*() API lacks support to get address and size
of a "reg" property by name or index. Add support for the same.
Livetree support has been added but not tested on real hardware.
The existing unit tests testing reading address from device-tree
have been updated to test address as
Hi Rick,
On 03.06.19 11:27, Rick Chen wrote:
Hi Stefan and other seniors
I encounter some problems about cfi flash driver.
And hope you can give some comments to resolve it.
Followings are the flash verification status and descriptions :
When I verify cfi flash which it's address base is in
On Mon, Jun 3, 2019 at 3:12 AM Bartosz Golaszewski wrote:
>
> sob., 1 cze 2019 o 05:24 Adam Ford napisał(a):
> >
> > On Fri, May 31, 2019 at 8:32 AM Bartosz Golaszewski wrote:
> > >
> > > From: Bartosz Golaszewski
> > >
> > > Now that we removed all legacy boards selecting TI_EMAC we can
> > >
Hi Bin,
On 6/3/2019 3:52 PM, Bin Meng wrote:
Hi Alex,
On Mon, Jun 3, 2019 at 5:47 PM Alex Marginean wrote:
A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.
Signed-off-by: Alex Marginean
---
Changes in v2:
- new patch, v1
Hi Alex,
On Mon, Jun 3, 2019 at 8:49 PM Alex Marginean wrote:
>
> Hi Bin,
>
> On 6/2/2019 4:15 PM, Bin Meng wrote:
> > +Simon,
> >
> > Hi Alex,
> >
> > On Sat, Jun 1, 2019 at 12:26 AM Alex Marginean
> > wrote:
> >>
> >> Makes dm_pci_map_bar function available for integrated PCI devices that
>
Hi Alex,
On Mon, Jun 3, 2019 at 5:47 PM Alex Marginean wrote:
>
> A very simple test for DM_MDIO, mimicks a register write/read through the
> sandbox bus to a dummy PHY.
>
> Signed-off-by: Alex Marginean
> ---
>
> Changes in v2:
> - new patch, v1 didn't have a test included
>
>
On Mon, Jun 3, 2019 at 5:47 PM Alex Marginean wrote:
>
> Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as
> stand-alone devices. Useful in particular for systems that support
> DM_ETH and have a stand-alone MDIO hardware block shared by multiple
> Ethernet interfaces.
>
>
Hi Bin,
On 6/2/2019 4:15 PM, Bin Meng wrote:
+Simon,
Hi Alex,
On Sat, Jun 1, 2019 at 12:26 AM Alex Marginean wrote:
Makes dm_pci_map_bar function available for integrated PCI devices that
support Enhanced Allocation instead of original PCI BAR mechanism.
Signed-off-by: Alex Marginean
---
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu
Tested-by: Steffen Dirkwinkel
Reviewed-by: Peng Fan
---
Changes for v2:
- Added this patch.
Changes for v3:
- None.
Changes for v4:
- Dropped PPC code introduced recently.
Changes for v5:
-
Layerscape began to use two eSDHC controllers, for example,
LS1012A. They are same IP block with same reference clock.
This patch is to add clock support for the second eSDHC.
Signed-off-by: Yinbo Zhu
---
Change in v2:
Update the Copyright information
Change in v3:
Dropped i.MX code which couldn't be reused.
Signed-off-by: Yangbo Lu
Tested-by: Steffen Dirkwinkel
Acked-by: Peng Fan
---
Changes for v2:
- Added this patch.
Changes for v3:
- Rebased.
Changes for v4:
- Rebased.
- Added Tested-by/Acked-by.
Changes for v5:
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX
initially. The later QoriQ series PowerPC processors (which were
evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and
i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the
Moved CONFIG_FSL_ESDHC from header files to defconfig files.
Signed-off-by: Yangbo Lu
Tested-by: Steffen Dirkwinkel
Reviewed-by: Peng Fan
Reviewed-by: Lukasz Majewski
Acked-by: Jason Liu
---
Changes for v2:
- Rebased.
Changes for v3:
- Rebased.
Changes for v4:
- Added
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX
initially. The later QoriQ series PowerPC processors (which were
evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and
i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the
> -Original Message-
> From: Tom Rini
> Sent: 2019年5月31日 3:43
> To: Chuanhua Han
> Cc: ja...@openedev.com; w...@denx.de; Shengzhou Liu
> ; Ruchika Gupta ; Pan
> Jiafei ; u-boot@lists.denx.de; Jiafei Pan
> ; Yinbo Zhu
> Subject: Re: [EXT] Re: [U-Boot] [PATCH v2 1/5] spl: dm: disable
> -Original Message-
> From: Jagan Teki
> Sent: 2019年5月23日 12:56
> To: Prabhakar Kushwaha
> Cc: Chuanhua Han ; U-Boot-Denx
> ; Jiafei Pan ; Jagan Teki
> ; Yinbo Zhu ; Ruchika Gupta
>
> Subject: Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI
> driver to driver model
A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.
Signed-off-by: Alex Marginean
---
Changes in v2:
- new patch, v1 didn't have a test included
arch/sandbox/dts/test.dts | 4 ++
configs/sandbox_defconfig | 2 +
drivers/net/Kconfig
Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as
stand-alone devices. Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces.
Signed-off-by: Alex Marginean
---
Changes in v2:
- fixed
Hi Stefan and other seniors
I encounter some problems about cfi flash driver.
And hope you can give some comments to resolve it.
Followings are the flash verification status and descriptions :
When I verify cfi flash which it's address base is in cacheable region
(0x8800) and cache is
sob., 1 cze 2019 o 05:24 Adam Ford napisał(a):
>
> On Fri, May 31, 2019 at 8:32 AM Bartosz Golaszewski wrote:
> >
> > From: Bartosz Golaszewski
> >
> > Now that we removed all legacy boards selecting TI_EMAC we can
> > completely convert the driver code to using the driver model.
> > This patch
On 29.05.19 16:36, dgilm...@redhat.com wrote:
From: Dennis Gilmore
This allows SPL to load the main U-Boot image from MMC once DM_MMC is
enabled.
Signed-off-by: Dennis Gilmore
Reviewed-by: Stefan Roese
Thanks,
Stefan
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