On 28.08.19 08:37, Weijie Gao wrote:
The UART of MT7628 has fixed 40MHz input clock so there is no need to put
clock-frequency in every dts files. Just put it into the common dtsi file.
Signed-off-by: Weijie Gao
Reviewed-by: Stefan Roese
Thanks,
Stefan
__
On 28.08.19 08:37, Weijie Gao wrote:
All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which
support baudrate up to 921600.
The high-speed UART is compatible with ns16550 when baudrate <= 115200.
Add compatible string to dtsi file so u-boot can use it when serial_mtk
driver is b
Hi Mark,
On 27/08/2019 23:06, Mark Kettenis wrote:
> The G12B clock controller is almost identical to the G12A and
> so far the differences don't matter. Adding the G12B compatible
> makes USB work on the Odroid-N2.
Indeed I forgot this when syncing with linux DTB,
Applying and sending right now
On 28.08.19 08:37, Weijie Gao wrote:
The mt7621 spi controller supports continuous generic half-duplex spi
transaction. There is no need to cache xfer data at all.
To achieve this goal, the OPADDR register must be used as the first data
to be sent. And follows the eight generic DIDO registers. B
On 28.08.19 08:37, Weijie Gao wrote:
Currently this driver uses a different way to implement the spi xfer,
by modifying some fields of two registers, which is incompatible with the
MTK's original SDK linux driver. This will cause the flash data being
damaged by the SDK driver.
This patch lets th
Hi Jean,
>
> Hi Sherry,
>
> On 21/08/2019 16:36, Sherry Sun wrote:
> > The cdns3-usb-phy driver supports both host and peripheral mode of usb
> > driver which use cadence usb3 IP.
> >
> > Signed-off-by: Sherry Sun
> > ---
> > drivers/phy/Kconfig | 8 ++
> > drivers/phy/Makefile
On Fri, Aug 23, 2019 at 5:56 PM Marek Vasut wrote:
>
> On 8/23/19 11:52 AM, Ley Foon Tan wrote:
> > On Fri, Aug 23, 2019 at 5:23 PM Marek Vasut wrote:
> >>
> >> On 8/23/19 10:57 AM, Ley Foon Tan wrote:
> >>> On Wed, Aug 21, 2019 at 9:50 AM Ley Foon Tan
> >>> wrote:
>
> On Tue, Aug 20,
On 18/08/2019 15:42, Beniamino Galvani wrote:
> Hi,
>
> these two patches enable the USB host controller on Odroid-C2. The
> first patch adds a PHY driver; the second one enables the necessary
> configuration options and updates the device tree.
>
> Note that the DWC2 driver currently does not su
Hi,
On 06/08/2019 10:10, Daniel Drake wrote:
> As already documented in this README, several binaries must be
> glued together in order to boot the device.
>
> Extend the documentation to cover the prebuilt binaries
> (saving you the hassle of installing ancient cross-compilers),
> and also menti
Some clock driver do not have a clk_enable() call back, and we should not
treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
do not return fail if ret value is '-ENOSYS'
Signed-off-by: Kever Yang
---
drivers/usb/host/ehci-generic.c | 2 +-
1 file changed, 1 insertion(+),
There are some clk_enable() callback add to rockchip clock drivers but
with out any real operation driver code, it's waste of CPU cycles at
runtime and waste of code size. The callback are add because some
peripheral REQUIRE it, eg. ehci/ohci generic driver, and other driver
also need it if the op
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang
---
drivers/clk/rockchip/clk_rk3328.c | 12
1 file changed, 12 deletions(-)
diff --git a/drivers/clk/rockchip/clk_
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang
---
drivers/clk/rockchip/clk_rk3288.c | 23 ---
1 file changed, 23 deletions(-)
diff --git a/drivers/clk/ro
Some clock driver do not have a clk_enable() call back, and we should not
treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
do not return fail if ret value is '-ENOSYS'
Signed-off-by: Kever Yang
---
drivers/usb/host/ohci-generic.c | 2 +-
1 file changed, 1 insertion(+),
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang
---
drivers/clk/rockchip/clk_rk3368.c | 19 ---
1 file changed, 19 deletions(-)
diff --git a/drivers/clk/rockch
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang
---
drivers/clk/rockchip/clk_rk3399.c | 37 ---
1 file changed, 37 deletions(-)
diff --git a/driver
From: Eugen Hristev
Remove 2017 from being printed at boot video console.
This is outdated.
To avoid this situation, remove the year completely.
Signed-off-by: Eugen Hristev
---
board/atmel/common/video_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/atmel/c
Hi Kever
On 8/28/19 10:23 AM, Kever Yang wrote:
> Some clock driver do not have a clk_enable() call back, and we should not
> treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
> do not return fail if ret value is '-ENOSYS'
>
> Signed-off-by: Kever Yang
> ---
>
> drivers/u
Hi Kever
On 8/28/19 10:23 AM, Kever Yang wrote:
> Some clock driver do not have a clk_enable() call back, and we should not
> treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
> do not return fail if ret value is '-ENOSYS'
>
> Signed-off-by: Kever Yang
> ---
>
> drivers/u
Allow 64-bit DMA on AHCI. If not supported by the host controller, at
least print a message and fail.
Signed-off-by: Roman Kapl
---
drivers/ata/ahci.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 9a08575053..02007a
Any comments on this series?
just a friendly reminder :)
regards Frank
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
+Kishon who worked on this PHY under linux
Hi Sherry,
On 28/08/2019 10:05, Sherry Sun wrote:
Hi Jean,
Hi Sherry,
On 21/08/2019 16:36, Sherry Sun wrote:
The cdns3-usb-phy driver supports both host and peripheral mode of usb
driver which use cadence usb3 IP.
Signed-off-by: Sherry Sun
---
Allow 64-bit DMA on AHCI. If not supported by the host controller, at
least print a message and fail.
Signed-off-by: Roman Kapl
---
Please disregard the previous patch, I've send a wrong version that does not
even compile.
drivers/ata/ahci.c | 14 +++---
1 file changed, 11 insertions(+
Hi,
I have a (legacy) multi-image uImage with several embedded dtbs, but no
initrd. I.e. one created by something like "mkimage -T multi -d
zImage:dtb1:dtb2:dtb3". I thought I could boot that using the bootm
command like this
bootm $loadaddr:0 - $loadaddr:3 # choose dtb3
but that fails with
E
Hi Thomas,
On Wed, Aug 28, 2019 at 6:31 AM Thomas Fitzsimmons wrote:
>
> Hi Bin,
>
> Bin Meng writes:
>
> > Hi Thomas,
> >
> > On Sat, Jun 9, 2018 at 6:06 AM Thomas Fitzsimmons
> > wrote:
> >>
> >> Add support for loading U-Boot on the Broadcom 7445 SoC. This port
> >> assumes Broadcom's BOLT
From: Rick Chen
Add cache enable/disable ops to the DM cache uclass driver
Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng
---
drivers/cache/cache-uclass.c | 20
include/cache.h | 31 +++
2 files changed, 51 insertions(+
From: Rick Chen
Add a v5l2 cache controller driver that is usually found on
Andes RISC-V ae350 platform. It will parse and configure the
cache settings (data & instruction prefetch, data & tag latency)
from the device tree blob.
Also implement L2 cache flush and disable before jump to linux.
The
From: Rick Chen
Add a v5l2 cache controller driver that is usually found on
Andes RISC-V ae350 platform. It will parse the cache settings
from the dtb.
In this version tag and data ram control timing can be adjusted
by the requirement from the dtb.
Signed-off-by: Rick Chen
Cc: KC Lin
---
dri
From: Rick Chen
Add cache enable and disable ops for test coverage.
Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng
---
drivers/cache/sandbox_cache.c | 13 +
test/dm/cache.c | 2 ++
2 files changed, 15 insertions(+)
diff --git a/drivers/cache/sandbox_cac
From: Rick Chen
Flush and disable L2 cache in dcache_disable()
which will be called in cleanup_before_linux()
before jump to linux.
The sequence will be preferred as below:
L1 flush -> L1 disable -> L2 flush -> L2 disable
Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng
---
arch/ri
From: Rick Chen
When L2 node exists inside cpus node, uclass_get_device
can not parse L2 node successfully. So move it outside
from cpus node.
Also add tag-ram-ctl and data-ram-ctl attributes for
v5l2 cache controller driver. This can adjust timing
by requirement from dtb to improve performance.
From: Rick Chen
Select the v5l2 UCLASS_CACHE driver for ax25.
Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng
---
arch/riscv/cpu/ax25/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/ax25/Kconfig
index 6b4b92e..49be775 100644
From: Rick Chen
Find the UCLASS_CACHE driver to configure the cache controller's
settings.
Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng
---
board/AndesTech/ax25-ae350/ax25-ae350.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.
From: Rick Chen
Use CCTL command to do d-cache write back
and invalidate instead of fence.
Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng
---
arch/riscv/cpu/ax25/cache.c | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/arch/riscv/cpu/ax25
I wanted this to be compatible with mkenvimage, including the ability
to embed newlines in variables by escaping them. But I failed to check
that it works more than once.
Fixes: f3d8f7dd73a (Allow providing default environment from file)
Signed-off-by: Rasmus Villemoes
---
Makefile | 2 +-
1 fil
These patches add support for brcmnand on bmips.
The current brcmnand driver only supports controller >= 4.0,
which means that only BCM63268 works right now.
v2: Drop CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
Álvaro Fernández Rojas (6):
nand: brcm: add BCM6368 support
bmips: bcm6368: add support for
This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes
drivers/mtd/nand/raw/Kconfig | 6 +
drivers/mtd/nand/raw/brcmnand/Makefile | 1 +
drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c | 122 +++
BCM6368 uses old 2.1 HW nand controller, which isn't currently supported by
brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes
arch/mips/dts/brcm,bcm6368.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6368.dtsi b/arch/m
Signed-off-by: Álvaro Fernández Rojas
---
v2: Drop CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
arch/mips/dts/comtrend,vr-3032u.dts| 13 +
configs/comtrend_vr3032u_ram_defconfig | 5 +
include/configs/comtrend_vr3032u.h | 5 +
3 files changed, 23 insertions(+)
diff --git a/a
BCM6328 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes
arch/mips/dts/brcm,bcm6328.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mip
BCM63268 uses 4.0 HW nand controller, which is currently supported by
brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes
arch/mips/dts/brcm,bcm63268.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/
BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes
arch/mips/dts/brcm,bcm6362.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6362.dtsi b/arch/m
Hi Simon,
> > > > > > With the EOL of python2 soon I've been looking at the Fedora U-Boot
> > > > > > builds to see what it would take to move over to python3. There's a
> > > > > > couple of issues building the bundled pylibfdt, the first is the
> > > > > > Makefile hard codes python2, the second
Hi Jean,
>
> Hi Jean,
>
> >
> > Hi Marek, Sherry,
> >
> >
> > we keep the cdns3 node for usb gadget driver, then add a usb host
> > node for
> > xhci-imx8 driver in *-uboot.dtsi. so here is no need to change
> > the host driver
> > >>> compatible.
> > But the compatible
Hi Jean,
>
> +Kishon who worked on this PHY under linux
>
>
> Hi Sherry,
>
>
> On 28/08/2019 10:05, Sherry Sun wrote:
> > Hi Jean,
> >
> >> Hi Sherry,
> >>
> >> On 21/08/2019 16:36, Sherry Sun wrote:
> >>> The cdns3-usb-phy driver supports both host and peripheral mode of
> >>> usb driver whi
On 28.08.19 08:37, Weijie Gao wrote:
This patch adds pinctrl support for mt7628, with a file for common pinmux
functions and a file for mt7628 which has additional support for pinconf.
Signed-off-by: Weijie Gao
---
drivers/pinctrl/Kconfig | 1 +
drivers/pinctrl/Makefi
On 28.08.19 14:26, Stefan Roese wrote:
On 28.08.19 08:37, Weijie Gao wrote:
This patch adds pinctrl support for mt7628, with a file for common pinmux
functions and a file for mt7628 which has additional support for pinconf.
Signed-off-by: Weijie Gao
---
drivers/pinctrl/Kconfig
On 8/28/19 10:13 AM, Ley Foon Tan wrote:
[...]
>> If want to use address from DT, we need get address every time need to
>> use the address.
>> For non-DM, it is easier to use constant address. Let me know if you
>> still prefer to use address from DT.
Surely you can cach
Hi Sherry,
On 21/08/19 8:05 PM, Sherry Sun wrote:
> These patches introduce new Cadence driver to U-Boot.
> The first patch is to add the Cadence USB3 IP(CDNS3) core and driver for
> the usb gadget.
> The second patch introduce the xhci-imx8 usb host driver separately.
> The third patch introduce
Hello all,
I'd like to get U-Boot >= 2019.07 booting on a Wandboard Quad with HAB
support enabled, but appear to be running into either some regressions
(or matters of PEBKAC). For the scope of this discussion, I'm only
concerned with booting an "insecure" HAB-enabled U-Boot image (ideally
FIT),
Hello list,
this is the first version of this patch that boots properly the linux kernel
on my i.MX8QM Board. It's still based on v2019.07. Please skip v1 because its
not working.
Best Regards,
Oliver
Oliver Graute (1):
imx: support i.MX8QM ROM 7720 a1 board
arch/arm/dts/Makefile
On 26/08/19, Oliver Graute wrote:
> On 22/08/19, Oliver Graute wrote:
> > Hello list,
> >
> > I have a annoying problem with u-boot 2019.07. I try to boot a Linux
> > Image from a fat16 partition on a SD-Card. But I got the "Error reading
> > cluster" Message from fs/fat/fat.c
> >
> > => boot
> >
Add i.MX8QM ROM 7720a1 board support
Boot log as below:
U-Boot 2019.07-1-g6c912ea4d4 (Aug 28 2019 - 13:01:45 +0200)
CPU: NXP i.MX8QM RevB A53 at 1200 MHz
Model: Advantech iMX8QM Qseven series
Board: ROM-7720-A1 4GB
Build: SCFW 65afe5f6
Boot: SD2
DRAM: 3.9 GiB
MMC: FSL_SDHC: 0, FSL_SDHC
Introduce a new parameter size that accepts elf section size to remoteproc
ops callback device_to_virt(). This can enforce more checks on the
elf section that is being loaded.
Signed-off-by: Lokesh Vutla
---
drivers/remoteproc/rproc-elf-loader.c | 3 ++-
drivers/remoteproc/sandbox_testproc.c | 4
This series addds support loading and starting for the following remote
processors:
- ARM Cortex-R5F in lockstep and split mode
- C66x DSP
- C7x DSP
Enable these remoteprocessor in AM654-evm and J721E evm.
Kedar Chitnis (1):
armv8: K3: j721e: Updated ddr address regions in MMU table
Lokesh Vut
Add a function to count the available children of a device.
Update the corresponding dm tests.
Signed-off-by: Lokesh Vutla
---
drivers/core/device.c | 11 +++
include/dm/device.h | 9 +
test/dm/bus.c | 41 +++--
3 files changed, 35 i
The current rproc-elf-loader supports loading of only 32 bit elf files.
Introduce support for loading of 64 bit elf files in rproc-elf-loader.
Signed-off-by: Lokesh Vutla
---
drivers/remoteproc/rproc-elf-loader.c | 109 ++
include/remoteproc.h | 12 +++
Introduce a common remoteproc elf loader function that automatically
detects the 64 bit elf file or 32 bit elf file and loads the sections
accordingly.
Signed-off-by: Lokesh Vutla
---
drivers/remoteproc/rproc-elf-loader.c | 15 +++
include/remoteproc.h | 14 +
From: Suman Anna
Add a new file include/environment/ti/k3_rproc.h that defines
common environment variables useful for booting various remote
processors from U-Boot. This file is expected to be included in
the board config files with the EXTRA_ENV_RPROC_SETTINGS added
to CONFIG_EXTRA_ENV_SETTINGS
rproc_elf32_load_image() rely on user to send a valid address for elf loading.
Instead do a sanity check on the address passed by user. This will help
all rproc elf users to not call sanity_check explicitly before calling
elf_loading.
Now that rproc_elf32_sanity_check() is used only in rproc-elf-l
The J721E SoCs have two TMS320C66x DSP Core Subsystems (C66x CorePacs)
in the MAIN voltage domain, each with a C66x Fixed/Floating-Point DSP
Core, and 32 KB of L1P & L1D configurable SRAMs/Cache and an additional
288 KB of L2 configurable SRAM/Cache. These subsystems do not have
an MMU but contain
Power domain for the remote cores needs to be handled in a right
sequence as mandated by the spec. Introduce tisci helper apis
that can control power-domains of remote cores. TISCI clients
can use this api and control the remote cores power domain instead
of hooking it to power-domain layer.
Signe
The J721E SoCs have 3 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster (MCU_R5FSS0) is present within
the MCU domain, and the remaining two clusters are present in the
MAIN domain (MAIN_R5FSS0 & MAIN_R5FSS1). Each of these can be
configured at boot time to be either r
From: Suman Anna
The Texas Instruments K3 family of SoCs have one of more dual-core
Arm Cortex R5F processor subsystems/clusters (R5FSS). Add the device
tree bindings document for these R5F subsystem devices. These R5F
processors do not have an MMU, and so require fixed memory carveout
regions ma
The J721E SoCs have 3 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster (MCU_R5FSS0) is present within
the MCU domain, and the remaining two clusters are present in the
MAIN domain (MAIN_R5FSS0 & MAIN_R5FSS1). Each of these can be
configured at boot time to be either r
Enable R5F and DSP remoteproc drivers for j721e running on a72.
Signed-off-by: Lokesh Vutla
---
configs/j721e_evm_a72_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index 6e355f5247..6e0c3f05fb 100644
--- a/confi
From: Suman Anna
The AM65x SoCs has a single dual-core Arm Cortex-R5F processor
subsystem/cluster (MCU_R5FSS0) within the MCU domain. This cluster
can be configured at boot time to be either run in a LockStep mode
or in an Asymmetric Multi Processing (AMP) fashion in Split-mode.
This subsystem ha
Introduce rproc_elf_get_boot_addr() that returns the entry point of
the elf file. This api auto detects the 64/32 bit elf file and returns
the boot addr accordingly.
Signed-off-by: Lokesh Vutla
---
drivers/remoteproc/rproc-elf-loader.c | 24
include/remoteproc.h
SoCs with K3 architecture have an integrated Arm Cortex-R5F subsystem
that is comprised of dual-core Arm Cortex-R5F processor cores. This R5
subsytem can be configured at boot time to be either run in a LockStep
mode or in an Asymmetric Multi Processing (AMP) fashion in Split-mode.
This subsystem h
From: Suman Anna
The A53 U-boot can support early booting of the MCU R5F remote processor(s)
from U-boot prompt to achieve various system usecases before booting the
Linux kernel. Update the default BOOTCOMMAND to provide an automatic and
easier way to start the MCU R5F cores through added enviro
From: Suman Anna
The A72 U-boot can support early booting of any of the R5F or C66x
or C71x remote processors from U-boot prompt to achieve various system
usecases before booting the Linux kernel. Update the default BOOTCOMMAND
to provide an automatic and easier way to start various remote proces
Certain SoCs with K3 architecture have integrated a C66 Corepac DSP
subsystem and an advanced C71 DSPs. Introduce a remoteproc driver
that that does take care of loading an elf to any of the specified
DSPs and start it.
Signed-off-by: Lokesh Vutla
Signed-off-by: Suman Anna
---
drivers/remotepro
From: Suman Anna
Some Texas Instruments K3 family of SoCs have one of more Digital Signal
Processor (DSP) subsystems that are comprised of either a TMS320C66x
CorePac and/or a next-generation TMS320C71x CorePac processor subsystem.
Add the device tree bindings document for the C66x DSP devices on
The J721E SoCs have a single TMS320C71x DSP Subsystem in the MAIN
voltage domain containing the next-generation C711 CPU core. The
subsystem has 32 KB of L1D configurable SRAM/Cache and 512 KB of
L2 configurable SRAM/Cache. This subsystem has a CMMU but is not
used currently. The inter-processor co
From: Suman Anna
Enable the R5F remoteproc driver for the AM65x GP EVM so that the
MCU domain R5F cores can be booted from A53 U-boot.
Signed-off-by: Suman Anna
Signed-off-by: Lokesh Vutla
---
configs/am65x_evm_a53_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/am65x_
From: Kedar Chitnis
The A72 U-Boot code loads and boots a number of remote processors
including the C71x DSP, both the C66_0 and C66_1 DSPs, and the various
Main R5FSS Cores. In order to view the code loaded by the U-Boot by
remote cores, U-Boot should configure the memory region with right
memor
From: Suman Anna
Add support to boot the MCU domain R5F Core0 remoteproc at U-boot prompt
on the AM65x EVM boards by using the 'boot_rprocs' and other env variables
defined in the common environment file k3_rproc.h, and updating the
'DEFAULT_RPROCS' macro.
The default configuration is to use the
From: Suman Anna
Add support to boot some remoteprocs at U-boot prompt on the J721E EVM
boards by using the 'boot_rprocs' and other env variables defined in the
common environment file k3_rproc.h, and updating the 'DEFAULT_RPROCS'
macro.
The list of R5F cores to be started before loading and boo
From: Suman Anna
The A53 U-Boot code can load and boot the MCU domain R5F cores (either a
single core in LockStep mode or 2 cores in Split mode) to achieve various
early system functionalities. Change the memory attributes for the DDR
regions used by the remote processors so that the cores can se
Marek Vasut schrieb am Mi., 28. Aug. 2019, 14:44:
> On 8/28/19 10:13 AM, Ley Foon Tan wrote:
> [...]
>
> >> If want to use address from DT, we need get address every time need
> to
> >> use the address.
> >> For non-DM, it is easier to use constant address. Let me know if you
> >>
Hi Jon,
[Adding Breno on Cc, who is familiar with HAB support].
On Tue, Aug 27, 2019 at 3:03 PM Jon Szymaniak
wrote:
>
> Hello all,
>
> I'd like to get U-Boot >= 2019.07 booting on a Wandboard Quad with HAB
> support enabled, but appear to be running into either some regressions
> (or matters of
Am 28.08.19 um 13:44 schrieb Álvaro Fernández Rojas:
> This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v2: no changes
>
> drivers/mtd/nand/raw/Kconfig | 6 +
> drivers/mtd/nand/raw/brcmnand/Makefile
On Wed, Aug 28, 2019 at 6:52 PM Andes wrote:
>
> From: Rick Chen
>
> Add a v5l2 cache controller driver that is usually found on
> Andes RISC-V ae350 platform. It will parse the cache settings
> from the dtb.
>
> In this version tag and data ram control timing can be adjusted
> by the requirement
On 28.08.19 08:37, Weijie Gao wrote:
This patch updates reset controller node for mt7628
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 36
1 file changed, 24 insertions(+), 12 deletions(-)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/
://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx (2019-08-27
07:11:37 -0400)
are available in the Git repository at:
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic.git
tags/u-boot-amlogic-20190828
for you to fetch changes up to d0e8c4ad513c0df492cc90bdc59f272687e90b32:
clk: meson-g12b: add
Am 28.08.19 um 08:37 schrieb Weijie Gao:
> This patch adds clock gating driver for MediaTek MIPS platform
>
> Signed-off-by: Weijie Gao
> ---
> drivers/clk/Kconfig | 8
> drivers/clk/Makefile | 1 +
> drivers/clk/clk-mtmips-cg.c | 63 +++
On Wed, Aug 28, 2019 at 8:44 PM Marek Vasut wrote:
>
> On 8/28/19 10:13 AM, Ley Foon Tan wrote:
> [...]
>
> >> If want to use address from DT, we need get address every time need to
> >> use the address.
> >> For non-DM, it is easier to use constant address. Let me know if you
> >>
On 28.08.19 08:38, Weijie Gao wrote:
This patch removes hardcoded gpio settings as they have been replaced by
pinctrl in dts, and also replaces regmap-based phy reset with a more
generic reset controller.
Signed-off-by: Weijie Gao
---
drivers/net/mt7628-eth.c | 45 +++-
Hi Eddie,
> Subject: [PATCH v3 3/4] configs: AST2500 EVB: Enable SD controller
>
> Enable the MMC subsystem and the Aspeed SD controller. Also enable the use
> of the device tree for probing the controller.
Would you add a MAINTAINERS file for this board?
Thanks,
Peng.
>
> Signed-off-by: Eddi
Am 28.08.19 um 08:38 schrieb Weijie Gao:
> This patch adds pinctrl driver, clock gate driver and reset controller
> support for defconfig files of mtmips boards.
>
> Signed-off-by: Weijie Gao
> ---
> configs/gardena-smart-gateway-mt7688_defconfig | 6 ++
> configs/linkit-smart-7688_defconf
On 28.08.19 08:38, Weijie Gao wrote:
The mt7628 has an embedded ethernet switch (5 phy ports + 1 cpu port).
Although in IOT mode only port0 is usable, the phy0 is still connected
to the switch, not the ethernet gmac directly.
This patch removes these codes as we should not check only the status
On 8/28/19 3:28 PM, Ley Foon Tan wrote:
[...]
>>>Tested this on Agilex, look okay. But, pending test on other device
>>> families, like Gen5 or A10. Not sure any side effect with this change.
>>> 2. Secure (for PSCI) and non-secure functions share same functions,
>>> these functions can't use
On 28.08.19 15:35, Daniel Schwierzeck wrote:
Am 28.08.19 um 08:38 schrieb Weijie Gao:
This patch adds pinctrl driver, clock gate driver and reset controller
support for defconfig files of mtmips boards.
Signed-off-by: Weijie Gao
---
configs/gardena-smart-gateway-mt7688_defconfig | 6 ++
On 28.08.19 08:38, Weijie Gao wrote:
When received a packet with an invalid length recorded in rx descriptor,
we should free this rx descriptor to allow us to continue to receive
following packets.
Without doing so, u-boot will stuck in a dead loop trying to process this
invalid rx descriptor.
T
Hi Peter,
On Wed, 28 Aug 2019 at 05:46, Peter Robinson wrote:
>
> Hi Simon,
>
> > > > > > > With the EOL of python2 soon I've been looking at the Fedora
> > > > > > > U-Boot
> > > > > > > builds to see what it would take to move over to python3. There's
> > > > > > > a
> > > > > > > couple of i
On 28.08.19 08:38, Weijie Gao wrote:
This patch add support for mt7628-eth to isolate LAN/WAN ports mainly to
Nitpicking:
s/add/adds
prevent LAN devices from getting IP address from WAN.
Signed-off-by: Weijie Gao
---
drivers/net/mt7628-eth.c | 32
1 file
On Wed, Aug 28, 2019 at 07:44:11AM -0600, Simon Glass wrote:
> Hi Peter,
>
> On Wed, 28 Aug 2019 at 05:46, Peter Robinson wrote:
> >
> > Hi Simon,
> >
> > > > > > > > With the EOL of python2 soon I've been looking at the Fedora
> > > > > > > > U-Boot
> > > > > > > > builds to see what it would t
On 28.08.19 08:38, Weijie Gao wrote:
This patch adds default p0led status for all boards.
Signed-off-by: Weijie Gao
Reviewed-by: Stefan Roese
Thanks,
Stefan
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On 28.08.19 08:38, Weijie Gao wrote:
This patch adds mmc support for MediaTek MT7620/MT7628 SoCs.
Signed-off-by: Weijie Gao
---
drivers/mmc/Kconfig | 2 +-
drivers/mmc/mtk-sd.c | 23 ---
2 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/Kconfi
On 28.08.19 08:38, Weijie Gao wrote:
This adds default pinctrl (dual SPI chip select) for gardena smart gateway
Signed-off-by: Weijie Gao
Please see my comment about the pinctrl-single driver usage in Linux. And
my patch to add support to the mt7628.dtsi file as well. We should stay
in sync w
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