Re: [PATCH v5 100/101] x86: apl: Add FSP support

Hi Bin, On Mon, 2 Dec 2019 at 07:22, Bin Meng wrote: > > Hi Simon, > > On Mon, Nov 25, 2019 at 12:12 PM Simon Glass wrote: > > > > The memory and silicon init parts of the FSP need support code to work. > > Add this for Apollo Lake. > > > > Signed-off-by: Simon Glass > > --- > > > > Changes in

Re: [PATCH v5 099/101] x86: apl: Add FSP structures

Hi Bin, On Mon, 2 Dec 2019 at 00:38, Bin Meng wrote: > > Hi Simon, > > On Mon, Nov 25, 2019 at 12:12 PM Simon Glass wrote: > > > > These are mostly specific to a particular SoC. Add the definitions for > > Apollo Lake. > > > > Signed-off-by: Simon Glass > > --- > > > > Changes in v5: None > > C

Re: [PATCH v5 098/101] x86: apl: Add Kconfig and Makefile

Hi Bin, On Mon, 2 Dec 2019 at 00:34, Bin Meng wrote: > > Hi Simon, > > On Mon, Nov 25, 2019 at 12:12 PM Simon Glass wrote: > > > > Add basic plumbing to allow Apollo Lake support to be used. > > > > Signed-off-by: Simon Glass > > --- > > > > Changes in v5: > > - Enable SMP > > > > Changes in v4

Re: [PATCH v5 088/101] x86: apl: Add systemagent driver

Hi BIn, On Sun, 1 Dec 2019 at 23:31, Bin Meng wrote: > > Hi Simon, > > On Mon, Nov 25, 2019 at 12:12 PM Simon Glass wrote: > > > > This driver handles communication with the systemagent which needs to be > > told when U-Boot has completed its init. > > > > Signed-off-by: Simon Glass > > > > ---

Re: [PATCH] Makefile: Ensure tools directory exists in output prior to use

On Wed, 4 Dec 2019 at 16:54, Tom Rini wrote: > > With the change to make tools/version.h a file we need to make sure that > the output directory exists first otherwise we will get a build failure. > > Reported-by: Peter Robinson > Tested-by: Peter Robinson > Fixes: 4d90f6cd9813 ("tools: Avoid cr

Re: [U-Boot] [PATCH 1/9] phy: atheros: introduce debug read and write functions

On Fri, Dec 06, 2019 at 01:53:57AM +0100, Michael Walle wrote: > Am 2019-12-06 00:58, schrieb Tom Rini: > > That said, looking over the u-boot-spl.map, it looks like nfs stuff > > doesn't get discarded for some reason, I'm going to look in to that. > > CONFIG_CMD_NFS will pull that. There are also

Re: [U-Boot] [PATCH 1/9] phy: atheros: introduce debug read and write functions

On Fri, Dec 06, 2019 at 01:39:29AM +0100, Michael Walle wrote: > Hi Tom, > > Am 2019-12-06 00:58, schrieb Tom Rini: > > On Fri, Dec 06, 2019 at 12:27:39AM +0100, Michael Walle wrote: > > > Hi Joe, Hi Tom, > > > > > > Am 2019-12-05 16:55, schrieb Joe Hershberger: > > > > Hi Michael, > > > > > > >

Re: [U-Boot] [PATCH 1/9] phy: atheros: introduce debug read and write functions

Am 2019-12-06 00:58, schrieb Tom Rini: That said, looking over the u-boot-spl.map, it looks like nfs stuff doesn't get discarded for some reason, I'm going to look in to that. CONFIG_CMD_NFS will pull that. There are also other network related cmds whose code is pulled into the SPL through net/

Re: [U-Boot] [PATCH 1/9] phy: atheros: introduce debug read and write functions

Hi Tom, Am 2019-12-06 00:58, schrieb Tom Rini: On Fri, Dec 06, 2019 at 12:27:39AM +0100, Michael Walle wrote: Hi Joe, Hi Tom, Am 2019-12-05 16:55, schrieb Joe Hershberger: > Hi Michael, > > On Fri, Oct 25, 2019 at 7:28 PM Michael Walle wrote: > > > > Provide functions to read and write the At

Pull request: u-boot-rockchip-20191206

Hi Tom, Please pull the rockchip update: - rockchip pwm driver update to support all the SoCs - RK3308 GMAC and pinctrl support - More UART interface support on PX30 and pmugrf reg fix - Fixup on misc for eth_addr/serial# - Other updates on variant SoCs Travis: https://travis-ci.org/keveryang/u-b

[PATCH] net: nfs: Only link in NFS code outside of SPL builds

While we have networking use cases within SPL we do not support loading files via NFS at this point in time. Disable calling nfs_start() so that the NFS related code can be garbage collected at link time. Cc: Joe Hershberger Signed-off-by: Tom Rini --- net/net.c | 4 ++-- 1 file changed, 2 ins

[gitlab-ci-runner PATCH 2/2] Dockerfile: Add required utilities for EFI Secure Boot tests

Based on the series to add support for the EFI Secure Boot tests to Travis, update the Docker container to have the same utilities. Cc: AKASHI Takahiro Signed-off-by: Tom Rini --- Dockerfile | 10 ++ 1 file changed, 10 insertions(+) diff --git a/Dockerfile b/Dockerfile index 9803ff47f8

[gitlab-ci-runner PATCH 1/2] Dockerfile: Update to the bionic-20191029 tag

Move up to the latest tag to get the usual related security fixes that brings in. Signed-off-by: Tom Rini --- Dockerfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Dockerfile b/Dockerfile index 43e739601741..9803ff47f814 100644 --- a/Dockerfile +++ b/Dockerfile @@ -2,7 +

Re: [U-Boot] [PATCH 1/9] phy: atheros: introduce debug read and write functions

On Fri, Dec 06, 2019 at 12:27:39AM +0100, Michael Walle wrote: > Hi Joe, Hi Tom, > > Am 2019-12-05 16:55, schrieb Joe Hershberger: > > Hi Michael, > > > > On Fri, Oct 25, 2019 at 7:28 PM Michael Walle wrote: > > > > > > Provide functions to read and write the Atheros debug registers. > > > > >

[PATCH] cmd/Kconfig: Add more dependencies to OSE bootm support

Per Enea OSE documentation, it supports some classes of ARM, PowerPC and X86. Limit the option to those platforms. Signed-off-by: Tom Rini --- cmd/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/cmd/Kconfig b/cmd/Kconfig index a2b9e19bbe6d..9f791e90dc90 100644 --- a/cmd/Kconfig +++

Re: [U-Boot] [PATCH 1/9] phy: atheros: introduce debug read and write functions

Hi Joe, Hi Tom, Am 2019-12-05 16:55, schrieb Joe Hershberger: Hi Michael, On Fri, Oct 25, 2019 at 7:28 PM Michael Walle wrote: Provide functions to read and write the Atheros debug registers. Signed-off-by: Michael Walle This series is adding too much size to several of the boards' SPL i

[PATCH 4/4] x86: Move coreboot over to use the coreboot UART

Use this UART to improve the compatibility of U-Boot when used as a coreboot payload. Signed-off-by: Simon Glass --- arch/x86/dts/coreboot.dts | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts index a88da6eafd..38ddaaf

[PATCH 3/4] x86: serial: Add a coreboot serial driver

Coreboot can provide information about the serial device in use on a platform. Add a driver that uses this information to produce a working UART. Signed-off-by: Simon Glass --- drivers/serial/Kconfig | 11 drivers/serial/Makefile | 1 + drivers/serial/serial_coreboo

[PATCH 2/4] x86: Update coreboot serial table struct

Since mid 2016, coreboot has additional fields in the serial struct that it passes down to U-Boot. Add these so we are in sync. Signed-off-by: Simon Glass --- arch/x86/include/asm/coreboot_tables.h | 19 +++ 1 file changed, 19 insertions(+) diff --git a/arch/x86/include/asm/cor

[PATCH 1/4] serial: n16550: Support run-time configuration

At present this driver uses an assortment of CONFIG options to control how it accesses the hardware. This is painful for platforms that are supposed to be controlled by a device tree or a previous-stage bootloader. Add a new CONFIG option to enable fully dynamic configuration. This controls regist

Re: [U-Boot] [PATCH 1/9] phy: atheros: introduce debug read and write functions

Am 2019-11-30 02:11, schrieb Joe Hershberger: On Fri, Oct 25, 2019 at 7:28 PM Michael Walle wrote: Provide functions to read and write the Atheros debug registers. Signed-off-by: Michael Walle Acked-by: Joe Hershberger Sorry this series superseeded by https://patchwork.ozlabs.org/proje

Reconfiguring PCIe ranges

Hello, I need to reconfigure PCIe settings to connect a GPU. From config header files, the variables I changed are below. I did exact same changes to linux .dts file. But when I power on the board, u-boot is freezing during gpu driver initialization (after reading BAR registers). I also tried so

Re: [U-Boot] [PATCH 1/9] phy: atheros: introduce debug read and write functions

Am 2019-11-30 02:11, schrieb Joe Hershberger: On Fri, Oct 25, 2019 at 7:28 PM Michael Walle wrote: Provide functions to read and write the Atheros debug registers. Signed-off-by: Michael Walle Acked-by: Joe Hershberger Sorry this was superseeded by https://patchwork.ozlabs.org/project/

[PATCH 4/4] buildman: Add options to get the arch and toolchain info

Sometimes it is useful for external tools to use buildman to provide the toolchain information. Add an -a option which shows the value to use for the ARCH environment variable, and -A which does the same for CROSS_COMPILE Signed-off-by: Simon Glass --- tools/buildman/README | 3 +++ tool

[PATCH 3/4] buildman: Figure out boards before commits

At present buildman looks at toolchains, then commits and then boards. Move the board processing up above the commit processing, since it relates to the toolchain code. This will make it easier to check the toolchains needed for a board without processing commits first. Signed-off-by: Simon Glass

[PATCH 1/4] genboardcfg: Support a quiet mode

We don't really need buildman to print this every time it runs. Add a flag to run quietly, that buildman can use. Signed-off-by: Simon Glass --- tools/genboardscfg.py | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py ind

[PATCH 2/4] buildman: Ask genboardscfg to be quiet

Now that this tool has a 'quiet' flag, use it. Signed-off-by: Simon Glass --- tools/buildman/control.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/buildman/control.py b/tools/buildman/control.py index c55a65d0c3..3b41d7b26a 100644 --- a/tools/buildman/control.py +

[PATCH v2 12/12] phy: atheros: consolidate {ar8031|ar8035}_config()

The two functions are now exactly the same, remove one of them. Signed-off-by: Michael Walle --- drivers/net/phy/atheros.c | 30 +++--- 1 file changed, 3 insertions(+), 27 deletions(-) diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index 208b06d3c7..2

[PATCH v2 11/12] phy: atheros: ar8035: remove static clock config

We can configure the clock output in the device tree. Disable the hardcoded one in here. This is highly board-specific and should have never been enabled in the PHY driver. If bisecting shows that this commit breaks your board it probably depends on the clock output of your Atheros AR8035 PHY. Ple

[PATCH v2 10/12] phy: atheros: add device tree bindings and config

Add support for configuring the CLK_25M pin as well as the RGMII I/O voltage by the device tree. By default the AT803x PHYs outputs the 25MHz clock of the XTAL input. But this output can also be changed by software to other frequencies. This commit introduces a generic way to configure this output

[PATCH v2 09/12] phy: atheros: move delay config to common function

Signed-off-by: Michael Walle --- drivers/net/phy/atheros.c | 38 ++ 1 file changed, 22 insertions(+), 16 deletions(-) diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index 660dcd9491..22035c2496 100644 --- a/drivers/net/phy/atheros.c +++ b/d

[PATCH v2 06/12] phy: atheros: fix AR8021 PHY ID mask

The upper bits are all the OUI. Signed-off-by: Michael Walle --- drivers/net/phy/atheros.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index 3cc162828c..01953a1390 100644 --- a/drivers/net/phy/atheros.c +++ b/drivers/n

[PATCH v2 00/12] phy: atheros: dt bindings and cleanup

[RESEND because I've forgot to add the mailinglist. Sorry!] This patch series superseeds the following two: >From Vladimir Oltean https://patchwork.ozlabs.org/cover/1031360/ >From me: https://patchwork.ozlabs.org/cover/1184507/ Although the first is marked as accepted into u-boot-net I guess

[PATCH v2 05/12] phy: atheros: Clarify the intention of ar8021_config

From: Vladimir Oltean Debug register 5 contains TX_CLK DELAY at bit 8 and reserved values at the other bit positions, just like the other PHYs in the family do. Therefore, it is not necessary to hardcode the reserved values, but instead simply follow the read-modify-write procedure from the commo

[PATCH v2 03/12] phy: atheros: Clarify the configuration of the CLK_25M output pin

From: Vladimir Oltean Also take the opportunity to use the phy_read_mmd and phy_write_mmd convenience functions. Signed-off-by: Vladimir Oltean Acked-by: Joe Hershberger --- drivers/net/phy/atheros.c | 19 ++- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/driv

[PATCH v2 07/12] phy: atheros: use defines for PHY IDs

Signed-off-by: Michael Walle --- drivers/net/phy/atheros.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index 01953a1390..5ff5875d3d 100644 --- a/drivers/net/phy/atheros.c +++ b/drivers/net/phy/atheros.c @@ -2

[PATCH v2 08/12] phy: atheros: introduce debug read and write functions

Provide functions to read and write the Atheros debug registers. Signed-off-by: Michael Walle --- drivers/net/phy/atheros.c | 57 --- 1 file changed, 41 insertions(+), 16 deletions(-) diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index 5f

[PATCH v2 01/12] phy: atheros: Make RGMII Tx delays actually configurable for AR8035

From: Vladimir Oltean Delete the extraneous write to debug reg 5 that enables Tx delay When the driver was originally introduced in commit "6027384a phylib: Add Atheros AR8035 GETH PHY support", the Tx delay was being unconditionally enabled. Then during "2ec4d10b phy: atheros: add support for

[PATCH v2 04/12] phy: atheros: Explicitly disable RGMII delays

From: Vladimir Oltean To eliminate any doubts about the out-of-reset value of the PHY, that the driver previously relied on. If bisecting shows that this commit breaks your board you probably have a wrong PHY interface mode. You probably want the PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MO

[PATCH v2 02/12] phy: atheros: Use common functions for RGMII internal delays

From: Vladimir Oltean Signed-off-by: Vladimir Oltean Acked-by: Joe Hershberger --- drivers/net/phy/atheros.c | 69 +++ 1 file changed, 41 insertions(+), 28 deletions(-) diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index 537c1a9125..c0c

Re: Sourcing a signed boot script

Hi Diego, > Hi, > > I would like to ask if it is possible to source a script after > verifying its signature. > > Currently I've been able to source a script from a signed FIT image, > before doing "bootm", with: > source : > But this way the signature is not checked yet, so the script cannot >

Re: [U-Boot] [PATCH] cmd: cp: add missing map_sysmem

On Mon, Dec 02, 2019 at 05:33:22PM +0100, Philippe Reynes wrote: > The command cp fails on sandbox because the address is used > directly. To fix this issue, we call the function map_sysmem > to translate the address. > > Signed-off-by: Philippe Reynes Applied to u-boot/master, thanks! -- Tom

Re: [U-Boot] [PATCH] iminfo: add missing map_sysmem

On Mon, Dec 02, 2019 at 03:45:50PM +0100, Philippe Reynes wrote: > The command iminfo fails on sandbox because the address > is used directly. To fix this issue, we call the function > map_sysmem to translate the address. > > Signed-off-by: Philippe Reynes Applied to u-boot/master, thanks! --

Re: [U-Boot] [RESEND PATCH v2] spl: Introduce SPL_DM_GPIO Kconfig define

On Mon, Dec 02, 2019 at 10:24:16AM +0100, Lukasz Majewski wrote: > This define indicates if DM_GPIO shall be supported in SPL. This allows > proper operation of DM converted GPIO drivers in SPL, which use > boards. > > Signed-off-by: Lukasz Majewski Applied to u-boot/master, thanks! -- Tom

Re: [U-Boot] [PATCH] drivers: pci: ignore disabled devices

On Sun, Dec 01, 2019 at 05:45:18PM +0100, Michael Walle wrote: > PCI devices may be disabled in the device tree. Devices which are probed > by the device tree handle the "status" property and are skipped if > disabled. Devices which are probed by the PCI enumeration don't check > that property. Fi

Re: [U-Boot] [PATCH] drivers: optee: rpmb: fix returning CID to TEE

On Tue, Nov 26, 2019 at 05:19:34PM +0100, Jorge Ramirez-Ortiz wrote: > The mmc CID value is one of the input parameters used to provision the > RPMB key. The trusted execution environment expects this value to be > specified in big endian format. > > Before this fix, on little endian systems, the

Re: [U-Boot] [PATCH] test/py: test_fs: add tests for creating/deleting many files

On Tue, Nov 26, 2019 at 05:28:49PM +0900, AKASHI Takahiro wrote: > # This is actually a resent patch of > # [1] https://lists.denx.de/pipermail/u-boot/2019-May/369170.html > > Two test cases are added under test_fs_ext: > test case 10: for root directory > test case 11: for non-root direc

Re: [U-Boot] [PATCH] fs: fat: handle deleted directory entries correctly

On Tue, Nov 26, 2019 at 05:29:31PM +0900, AKASHI Takahiro wrote: > Unlink test for FAT file system seems to fail at test_unlink2. > (When I added this test, I haven't seen any errors though.) > for example, > ===8<=== > fs_obj_unlink = ['fat', '/home/akashi/tmp/uboot_sandbox_test/128MB.fat32.img']

Re: [U-Boot] [PATCH] spl: fix entry_point equal to load_addr

On Mon, Nov 25, 2019 at 05:18:20PM +0100, Giulio Benetti wrote: > At the moment entry_point is set to image_get_load(header) that sets it > to "load address" instead of "entry point", assuming entry_point is > equal to load_addr, but it's not true. Then load_addr is set to > "entry_point - header_

Re: [U-Boot] [PATCH] ARM: da850-evm: Disable SYS_MMCSD_RAW_MODE_USE_SECTOR

On Wed, Nov 13, 2019 at 07:42:00AM -0600, Adam Ford wrote: > The da850-evm doesn't have the boot pins configured in a way > to make MMC/SD booting an option, and MMC/SD support is not > enabled in SPL. Therefore, there is no need to support raw mode > mmc/sd support in SPL. > > This patch disabl

Re: [U-Boot] [PATCH 2/2] Fix typo in macros, "FIRMEWARE" -> "FIRMWARE"

On Sun, Nov 10, 2019 at 08:23:15AM -0800, Thomas Hebb wrote: > Signed-off-by: Thomas Hebb Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature

Re: [U-Boot] [PATCH] ARM: omapl138_lcdk: Shrink code size by building with Thumb

On Sun, Nov 10, 2019 at 06:33:40AM -0600, Adam Ford wrote: > SPL has limited available resources, and the performance between > ARM and Thumb isn't that significant. > > This patch builds using Thumb instruction set to reduce the code > size by nearly 6K. > > Original: >text data

Re: [U-Boot] [PATCH] cmd: pxe: Increase maximum path length

On Tue, Dec 3, 2019 at 6:35 AM Ben Wolsieffer wrote: > > On NixOS, cross compiled kernels have long suffixes that cause them to > exceed the current maximum path length. The PXE/TFTP max path length is > used for extlinux.conf support as well, which is where this problem > usually manifest's itsel

Re: [PATCH v4 1/6] fat: write: fix broken write to fragmented files

On Thu, Dec 05, 2019 at 06:58:15PM +0100, Matthias Brugger wrote: > > > On 05/12/2019 17:52, Lukasz Majewski wrote: > > Hi Tom, Matthias, > > > >> The code for handing file overwrite incorrectly assumed that the file > >> on disk is always contiguous. This resulted in corrupting disk > >> struct

Re: [PATCH 2/2] video: make BPP and ANSI configs optional

On Thu, 5 Dec 2019 18:15:49 +0100 Anatolij Gustschin ag...@denx.de wrote: > Many boards do not use all selected framebuffer depth > configurations, for such boards there is some unused > code in video and console uclass routines. Make depth > specific code optional to avoid dead code and slightly

Re: [PATCH v4 1/6] fat: write: fix broken write to fragmented files

On 05/12/2019 17:52, Lukasz Majewski wrote: > Hi Tom, Matthias, > >> The code for handing file overwrite incorrectly assumed that the file >> on disk is always contiguous. This resulted in corrupting disk >> structure every time when write to existing fragmented file happened. >> Fix this by add

Re: [U-Boot] [PATCH v2 1/1] net: avoid address-of-packed-member error

On Thu, Dec 5, 2019 at 1:19 AM Heinrich Schuchardt wrote: > > On 11/6/19 12:07 AM, Joe Hershberger wrote: > > On Tue, Nov 5, 2019 at 5:49 AM Heinrich Schuchardt > > wrote: > >> > >> sandbox_defconfig does not compile using GCC 9.2.1: > >> > >> net/net.c: In function ‘net_process_received_packet’

[PATCH v2 1/3] rpi: fix dram bank initialization

From: Matthias Brugger To update the dram bank information from device-tree we use fdtdec_decode_ram_size() which expectes the the size-cells and address-cells to be defined in the memory node. For normal system RAM these values are defined in the root node. When the values differ from the defaul

[PATCH v2 2/3] rpi: Enable DRAM bank initialization on arm64

From: Matthias Brugger Up to now we only update the DRAM banks when we are define CONFIG_BCM2711. But our one binary approach uses a config that supports BCM2837 and BCM2711. As a result we only see one gibibyte of RAM on Raspberry Pi 4, even if it has more RAM. Fix this by calling dram_init_bank

[PATCH v2 3/3] ARM: defconfig: Fix 32bit config for RPi4

From: Matthias Brugger The rpi_4_32b_defconfig states that only one DRAM bank is present. This leads to a wrong configuration of the available DRAM. Fix this by setting the DRAM bank config accordingly. Fixes: 193279d784 ("RPI: Add defconfigs for rpi4 (32/64)") Signed-off-by: Matthias Brugger

Re: [PATCH 0/2] travis-ci: provide 'addr' in file2env()

On 12/4/19 11:42 PM, Heinrich Schuchardt wrote: Function fetch_tftp_file() in test/py/tests/test_efi_loader.py expects that the dictionary describing a file contains an entry 'addr' specifying the loading address. Otherwise it defaults to the start of RAM. On qemu_arm64_defconfig and qemu_arm_def

[PATCH 2/2] video: make BPP and ANSI configs optional

Many boards do not use all selected framebuffer depth configurations, for such boards there is some unused code in video and console uclass routines. Make depth specific code optional to avoid dead code and slightly reduce binary size. Also make ANSI code optional for the same reason. When i.e. usi

[PATCH 1/2] video: add guards around 16bpp/32bbp code

Many boards use only single depth configuration, for such boards there is some unused code in video and console uclass routines. Add guards to avoid dead code. Signed-off-by: Anatolij Gustschin --- drivers/video/vidconsole-uclass.c | 6 ++ drivers/video/video-uclass.c | 4 2 files

Sourcing a signed boot script

Hi, I would like to ask if it is possible to source a script after verifying its signature. Currently I've been able to source a script from a signed FIT image, before doing "bootm", with: source : But this way the signature is not checked yet, so the script cannot be trusted. According to the d

Re: [PATCH 2/2] rpi: Enable DRAM bank initialization on arm64

On 04/12/2019 22:28, Heinrich Schuchardt wrote: > On 12/4/19 5:52 PM, matthias@kernel.org wrote: >> From: Matthias Brugger >> >> Up to now we only update the DRAM banks when we are define >> CONFIG_BCM2711. But our one binary approach uses a config that supports >> BCM2837 and BCM2711. As a

Re: [PATCH v4 1/6] fat: write: fix broken write to fragmented files

Hi Tom, Matthias, > The code for handing file overwrite incorrectly assumed that the file > on disk is always contiguous. This resulted in corrupting disk > structure every time when write to existing fragmented file happened. > Fix this by adding proper check for cluster discontinuity and adjust

Re: [PATCH v2] sun8i: h3: Support H3 variant of Orange Pi Zero Plus 2

On Tue, Nov 19, 2019 at 2:47 PM Diego Rondini wrote: > > Orangepi Zero Plus 2 is an open-source single-board computer, available > in two Allwinner SOC variants, H3 and H5. We add support for H3 variant > here, as the H5 is already supported. > > H3 Orangepi Zero Plus 2 has: > - Quad-core Cortex-A

Re: [U-Boot] [PATCH 1/9] phy: atheros: introduce debug read and write functions

Hi Michael, On Fri, Oct 25, 2019 at 7:28 PM Michael Walle wrote: > > Provide functions to read and write the Atheros debug registers. > > Signed-off-by: Michael Walle This series is adding too much size to several of the boards' SPL it seems. https://travis-ci.org/jhershbe/u-boot/builds/620804

Re: [U-Boot] [PATCH v2 16/16] travis: add packages for UEFI secure boot test

On Tue, Nov 26, 2019 at 09:51:20AM +0900, AKASHI Takahiro wrote: > Pytest for UEFI secure boot will use several host commands. > In paricular, Test setup relies on efitools, whose version must be v1.5.2 > or later. So fetch a new version of deb package directly. > Please note it has a dependency o

Re: [PATCH 2/3] arm: dts: Add mac node for rk3308 at dtsi level

On 2019/11/26 上午9:39, David Wu wrote: The rk3308 only support RMII mode, and if it is output clock mode, better to use ref_clk pin with drive strength 12ma. Signed-off-by: David Wu Reviewed-by: Kever Yang Thanks, - Kever --- arch/arm/dts/rk3308.dtsi | 22 ++ 1 file

Re: [PATCH 3/3] dts: rk3308: Enable ethernet function supported for Firefly ROC_RK3308_CC

On 2019/11/26 上午9:39, David Wu wrote: The Firefly ROC_RK3308_CC use ref_clock of input mode, and rmii pins of m1 group. Signed-off-by: David Wu Reviewed-by: Kever Yang Thanks, - Kever --- arch/arm/dts/rk3308-roc-cc.dts | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/a

Re: [PATCH v2 1/3] rockchip: mkimage: support packing optional second level boot-loader

On 2019/12/5 下午6:58, Jeffy Chen wrote: Support packing optional second level boot-loader: $ ./tools/mkimage -n rk3399 -T rksd -d \ rk3399_ddr_800MHz_v1.24.bin:rk3399_miniloader_v1.19.bin out -v Adding Image rk3399_ddr_800MHz_v1.24.bin Size 116492(pad to 116736) Adding Image rk3399_miniloade

Re: [PATCH v2] pinctrl: rockchip: Add pinctrl support for rk3308

On 2019/12/3 下午7:26, David Wu wrote: An iomux register contains 8 pins, each of which is represented by 2 bits, but the register offset is 0x8. For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX offset is 0x8, the offset 0x4 is reserved. So add a type IOMUX_8WIDTH_2BIT to calcu

Re: [PATCH v2] arm: rockchip: rk3308: Initialize the iomux configuration

On 2019/12/3 下午7:02, David Wu wrote: When we want to use plus pinctrl feature, we need to enable them at spl. Signed-off-by: David Wu --- Change in v2: - Fix GPIO3B2_SEL_SRC_CTRL_SEL_PLUS arch/arm/mach-rockchip/rk3308/rk3308.c | 37 ++ Reviewed-by: Kever Yang T

Re: [PATCH v2] pwm: rk_pwm: Make PWM driver to support all Rockchip Socs

On 2019/12/3 下午5:49, David Wu wrote: This PWM driver can be used to support pwm functions for on all Rockchip Socs. The previous chips than RK3288 did not support polarity, and register layout was different from the RK3288 PWM. The RK3288 keep the current functions. RK3308 and the chips afte

Re: [PATCH] rockchip: allow loading larger kernels

On 2019/12/3 下午1:40, Ben Wolsieffer wrote: Recent versions of the Linux kernel with many options enabled have grown large enough to overwrite the beginning of the initrd. For example, the kernel I use on my Rock64 and RockPro64 is 34.1 MiB, while only 31.5 MiB are available between kernel_addr_

Re: [PATCH] rockchip: rk3328: rock64: enable CONFIG_MISC_INIT_R

On 2019/12/3 下午1:24, Ben Wolsieffer wrote: This enables reading of the cpuid and a static MAC address. Signed-off-by: Ben Wolsieffer Reviewed-by: Kever Yang Thanks, - Kever --- configs/rock64-rk3328_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/rock64-rk3328_

Re: [PATCH 1/2] rockchip: mkimage: support packing optional second level boot-loader

On 2019/12/5 下午3:48, Jeffy Chen wrote: Support packing optional second level boot-loader: $ ./tools/mkimage -n rk3399 -T rksd -d \ rk3399_ddr_800MHz_v1.24.bin:rk3399_miniloader_v1.19.bin out -v Adding Image rk3399_ddr_800MHz_v1.24.bin Size 116492(pad to 116736) Adding Image rk3399_miniloade

Re: [U-Boot] [PATCH v2] Prevented possible null dereference.

On Mon, Aug 26, 2019 at 05:54:59AM -0700, Niv Shetrit wrote: > Signed-off-by: Niv Shetrit Sorry for taking so long to get back to this. A few problems. And re-ordering the diff to make explanation clearer: > --- > common/cli_hush.c | 73 --- > 1 fi

Re: Load Debian/Fedora via EFI

On Tue, Dec 03, 2019 at 08:51:09PM +0100, Heinrich Schuchardt wrote: > On 12/2/19 3:21 PM, Michal Simek wrote: > > On 29. 11. 19 19:23, Heinrich Schuchardt wrote: > >> On 11/29/19 11:16 AM, Michal Simek wrote: > >>> Hi, > >>> > >>> I tried to boot latest debian and fedora rootfs via distro boot and

Re: [PATCH v2] arm64: zynqmp: Add support for u-boot.itb generation with ATF

On Thu, Dec 05, 2019 at 09:46:57AM +0100, Michal Simek wrote: > Follow i.MX, Sunxi, RISC-V and Rockchip to generate u-boot.itb which > includes U-Boot proper, ATF and DTBs in FIT format. ZynqMP supports FIT for > quite a long time but with using out of tree solution. The patch is filling > this gap

Re: [U-Boot] [PATCH v2 3/8] cmd: bootimg: Add bootimg command

Hi Aleksandr, On Thu, Dec 5, 2019 at 4:17 AM Aleksandr Bulyshchenko wrote: > > Hello Sam, > > I'd like to add my 5 cents regarding separating dtimg start|size into 3 > subcommands >> >> dtimg start index [varname] >> dtimg start id [varname] >> dtimg start rev [varname] > > While I don't s

Re: [PATCH] usb: cdns3: ep0: Fix build warnings related to cache ops

On 12/5/19 8:59 AM, Vignesh Raghavendra wrote: > Since, commit 62f9b6544728 ("common: Move older CPU functions to their own > header") > cache ops functions are declared in a separate header. Include the same > to avoid build warnings. Applied, thanks.

[PATCH v2 0/7] Add a random number generator uclass

Add a random number generator(rng) uclass to facilitate adding drivers for rng devices. I plan to add an implementation of the EFI_RNG_PROTOCOL, which would get the random number from the rng uclass -- the protocol would be used by the efi stub for getting a random number for the kaslr feature. Th

[PATCH 1/1] drivers: net: add Broadcom bnxt driver for supported platforms

From: Suresh Channappa Add bnxt L2 driver support. This driver is used by several Broadcom iProc platforms. Signed-off-by: Suresh Channappa Signed-off-by: Vladimir Olovyannikov --- drivers/net/Kconfig |1 + drivers/net/Makefile|1 + drivers/net/bnxt/Kconfig|8 +

Re: Load Debian/Fedora via EFI

On 12/5/19 11:21 AM, Michal Simek wrote: I have separate partitions: /boot of type 83 (Linux, ext2) and marked as bootable and with boot.scr on it. /boot/efi of type ef (EFI, vfat) and not marked as bootable The sequence on the block device does not matter. When booting via iSCSI with iPXE I p

Re: [U-Boot] [PATCH v2 3/8] cmd: bootimg: Add bootimg command

Hello Sam, I'd like to add my 5 cents regarding separating dtimg start|size into 3 subcommands > dtimg start index [varname] > dtimg start id [varname] > dtimg start rev [varname] > > While I don't see real usecases for combining index with id or rev (if someone applies metainformation to d

[PATCH v2 3/3] rockchip: mkimage: fix wrong range of rc4 encoding for boot image

The rc4 encoding should cover spl header as well, and the file_size contains spl header too. Signed-off-by: Jeffy Chen --- Changes in v2: None tools/rkimage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/rkimage.c b/tools/rkimage.c index ae50de55c9..1c5540b1c3 1006

rk3328-firefly ddr4 tpl init

Good Evening, I am trying to get TPL/SPL working on the rk3328-firefly ddr4 4gb board. I've pulled the ddr4 dtsi from the rockchip u-boot repository [0]. Unfortunately I cannot get the ddr4 to detect correctly. With the u-boot tpl, I get the following: U-Boot TPL 2020.01-rc3-00072-g1a1bea82b2-di

Re: [PATCH v1 3/5] colibri_imx6: add update_uboot wrapper

Hi Lukasz, On Thu, Dec 5, 2019 at 12:46 AM Lukasz Majewski wrote: > > Hi Igor, > > > From: Igor Opaniuk > > > > Add universal update_uboot wrapper that helps to update > > U-Boot image on internal storage. > > > > > tftpboot ${loadaddr} ${board_name}/u-boot.img > > > run update_uboot > > > tftpb

[PATCH v2 1/3] rockchip: mkimage: support packing optional second level boot-loader

Support packing optional second level boot-loader: $ ./tools/mkimage -n rk3399 -T rksd -d \ rk3399_ddr_800MHz_v1.24.bin:rk3399_miniloader_v1.19.bin out -v Adding Image rk3399_ddr_800MHz_v1.24.bin Size 116492(pad to 116736) Adding Image rk3399_miniloader_v1.19.bin Size 88060(pad to 88064) Image T

[PATCH v2 0/3] mkimage/rockchip: support packing optional second level boot-loader

When enabling back-to-bootrom, the bootrom would continue to load the second level boot-loader. And currently we are packing it by appending the generated image manually (with a predefined max size): ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \ firefly-rk3288/spl/u-boot-spl-dtb.bin o

[PATCH v2 2/3] doc: rockchip: document packing second level loader with mkimage

Add documentation about packing optional second level boot-loader with mkimage tool. Signed-off-by: Jeffy Chen --- Changes in v2: None doc/README.rockchip | 11 +++ 1 file changed, 11 insertions(+) diff --git a/doc/README.rockchip b/doc/README.rockchip index 67c14006a3..39dc9c5e9f 100

Re: [U-Boot] [PATCH v2 3/8] cmd: bootimg: Add bootimg command

On Thu, Dec 05, 2019 at 04:17:38AM +0200, Aleksandr Bulyshchenko wrote: >Hello Sam, >I'd like to add my 5 cents regarding separating dtimg start|size into 3 >subcommands > > dtimg start index [varname] > dtimg start id [varname] > dtimg start rev [varname] > >While I don'

Re: [PATCH v2 3/7] stm32mp1: rng: Add a driver for random number generator(rng) device

On 12/5/19 9:42 AM, Sughosh Ganu wrote: > Add a driver for the rng device found on stm32mp1 platforms. The > driver provides a routine for reading the random number seed from the > hardware device. > > Signed-off-by: Sughosh Ganu > --- > > Changes since V1: > * Handle review comment from Patrice C

[PATCH 4/4] rockchip: rk3288-evb: update config to support OPTEE

Upstream kernel and rockchip kernel has default enable PSCI which needs OPTEE in trust word, enable OPTEE support for evb by default and SPL_FIT option to pack OPTEE with U-Boot proper. Signed-off-by: Kever Yang --- configs/evb-rk3288_defconfig | 5 + 1 file changed, 5 insertions(+) diff -

[PATCH 1/4] rockchip: fit_spl_optee: get text and optee base from build

Instead of hardcode the base address, we can get them from the build output, eg. get the SYS_TEXT_BASE from .config and get optee base from DRAM_BASE. We can use this script for SoCs with DRAM base not from 0x6000(rk3229 and many other 32bit Rockchip SoCs), eg. rk3288 DRAM base is 0. Signed-of

Re: Load Debian/Fedora via EFI

út 3. 12. 2019 v 20:56 odesílatel Heinrich Schuchardt napsal: > > On 12/2/19 3:21 PM, Michal Simek wrote: > > On 29. 11. 19 19:23, Heinrich Schuchardt wrote: > >> On 11/29/19 11:16 AM, Michal Simek wrote: > >>> Hi, > >>> > >>> I tried to boot latest debian and fedora rootfs via distro boot and > >

[PATCH 3/3] spi: cadence-qspi: Add compatible for TI AM654

TI's AM654 SoC has a Cadence OSPI IP. Add a new compatible string for the same. Signed-off-by: Vignesh Raghavendra --- drivers/spi/cadence_qspi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 6374d3976a4a..f8b69406d4b9 100644 --

[PATCH 2/3] spi: cadence-qspi: Add support for Cadence Octal SPI controller

Cadence OSPI is similar to QSPI IP except that it supports Octal IO (8 IO lines) flashes. Add support for Cadence OSPI IP with existing driver using new compatible Signed-off-by: Vignesh Raghavendra --- drivers/spi/cadence_qspi.c | 1 + drivers/spi/cadence_qspi_apb.c | 8 ++-- 2 files ch

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