[PATCH] net: gem: Disable PCS autonegotiation in case of fixed-link

Disable PCS autonegotiation if fixed-link node is present in device tree. This way systems with multiple GEM instances with a combination of SGMII-fixed and SGMII-PHY will work. Reported-by: Goran Marinkovic Signed-off-by: Michal Simek Signed-off-by: Ashok Reddy Soma --- drivers/net/zynq_gem.

[RESEND PATCH] configs: mt7629: support usb host and udisk

Enable modules to support download image from usb Signed-off-by: Chunfeng Yun --- configs/mt7629_rfb_defconfig | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index 3efff8fee8..42d5dc552c 100644 ---

[RESEND PATCH] usb: dwc3: fix NULL pointer issue

The phy_bulk pointer *usb_phys is used before allocated, fix it by using a phy_bulk variable instead in xhci_dwc3_platdata struct Signed-off-by: Chunfeng Yun --- drivers/usb/host/xhci-dwc3.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/usb/host/xhci-dwc3.c b/

Re: [PATCH v3 7/9] rockchip: dts: rk3328: Sync device tree files from Linux

Hi Kurt On Tue, May 12, 2020 at 3:00 AM Kurt Miller wrote: > > On Mon, 2020-04-27 at 14:52 +0800, Chen-Yu Tsai wrote: > > From: Chen-Yu Tsai > > > > This syncs rk3328 device tree files from the Linux kernel next-20200324. > > The last commit to touch these files is: > > > > b2411befed60 ("ar

Re: [ANN] U-Boot v2020.07-rc2 released

Hello Tom, Am 13.05.2020 um 16:56 schrieb Tom Rini: On Wed, May 13, 2020 at 04:52:26PM +0200, Marek Vasut wrote: On 5/13/20 4:49 PM, Tom Rini wrote: On Wed, May 13, 2020 at 08:13:45AM +0200, Heiko Schocher wrote: Hello Heinrich, Am 13.05.2020 um 07:53 schrieb Heinrich Schuchardt: On 5/13/20

[PATCH] mmc: fsl_esdhc: workaround for hardware 3.3v IO reliability issue

When eSDHC operates at 3.3v, damage can accumulate in an internal level shifter at a higher than expected rate. The faster the interface runs, the more damage accumulates. This issue now is found on LX2160A eSDHC1 for only SD card. The hardware workaround is recommended to use an on-board level sh

[PATCH] mmc: fsl_esdhc: read register once for card inserted status

No need to poll register for card inserted status. Signed-off-by: Yangbo Lu --- drivers/mmc/fsl_esdhc.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index e64ea76..7e8993f 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/d

[PATCH] Makefile: remove m68k GCC 3.4 workaround

This code dates back to 2006, commit 483a0cf804df ("Fixes for gcc 3.4 based m68k toolchain,"). GCC 3.4 is so old. We do not support it. Signed-off-by: Masahiro Yamada --- Makefile | 7 --- 1 file changed, 7 deletions(-) diff --git a/Makefile b/Makefile index a9d58ca7a0..97fd492bc0 100644

Re: [PATCH v1 01/10] mips: octeon: Initial minimal support for the Marvell Octeon SoC

Am 02.05.20 um 10:59 schrieb Stefan Roese: > From: Aaron Williams > > This patch adds very basic support for the Octeon III SoCs. Only > CFI parallel NOR flash and UART is supported for now. > > Please note that the basic Octeon port does not include the DDR3/4 > initialization yet. This will

Re: [PATCH 1/1] tools: ftdgrep: use /* fallthrough */ as needed

On Wed, May 13, 2020 at 02:41:51PM -0400, Tom Rini wrote: > On Thu, May 14, 2020 at 02:27:20AM +0900, Masahiro Yamada wrote: > > On Thu, May 14, 2020 at 1:13 AM Tom Rini wrote: > > > > > > On Thu, May 14, 2020 at 01:05:37AM +0900, Masahiro Yamada wrote: > > > > Hi Tom, > > > > > > > > On Wed, May

[RFC 3/6] dtoc: extend dtoc to use struct driver_info when linking nodes

In the current implementation, when dtoc parses a dtb to generate a struct platdata it converts the information related to linked nodes as pointers to struct platdata of destination nodes. By doing this, it makes difficult to get pointer to udevices created based on these information. This patch e

[RFC 5/6] dtoc: update dtb_platdata to support cd-gpios

Currently dtoc does not support the property cd-gpios used to declare the gpios for card detect in mmc. This patch adds support to cd-gpios property. Signed-off-by: Walter Lozano --- tools/dtoc/dtb_platdata.py | 13 - tools/dtoc/test_dtoc.py| 2 +- 2 files changed, 9 insertions

[RFC 6/6] dtoc add test for cd-gpios

Add a test for dtoc taking into account the cd-gpios property. Signed-off-by: Walter Lozano --- tools/dtoc/dtoc_test_phandle_cd_gpios.dts | 42 + tools/dtoc/test_dtoc.py | 72 +++ 2 files changed, 114 insertions(+) create mode 100644 tools/dtoc/

[RFC 4/6] dtoc: update tests to match new platdata

After using a new approach to link nodes when OF_PLATDATA is enabled the test cases need to be update. This patch updates the tests based on this new implementation. Signed-off-by: Walter Lozano --- tools/dtoc/test_dtoc.py | 123 ++-- 1 file changed, 81 inser

[RFC 2/6] core: extend struct driver_info to point to device

Currently when creating an U_BOOT_DEVICE entry a struct driver_info is declared, which contains the data needed to instantiate the device. However, the actual device is created at runtime and there is no proper way to get the device based on its struct driver_info. This patch extends struct driver

[RFC 0/6] improve OF_PLATDATA support

When using OF_PLATDATA dtbs are converted to C structs in order to save space as we can remove both dtbs and libraries from TPL/SPL binaries. This patchset tries to improve its support by overcoming some limitations in the current implementation First, the support for scan and check for valid dri

[RFC 1/6] dtoc: add support to scan drivers

Currently dtoc scans dtbs to convert them to struct platdata and to generate U_BOOT_DEVICE entries. These entries need to be filled with the driver name, but at this moment the information used is the compatible name present in the dtb. This causes that only nodes with a compatible name that matche

Re: [PATCH] rockchip: rk3328: rock64 - fix gen3 SPL hang

On Wed, 2020-05-13 at 22:58 +0300, Matwey V. Kornilov wrote: > Thanks. Have you already checked it on gen2? I think I have gen2 board to > test. Yes, I have both gen3 and gen2 boards. gen2 continues to work with this patch as well. > > ср, 13 мая 2020 г. в 22:55, Kurt Miller : > > > > > > Use

Re: [PATCH] rockchip: rk3328: rock64 - fix gen3 SPL hang

Thanks. Have you already checked it on gen2? I think I have gen2 board to test. ср, 13 мая 2020 г. в 22:55, Kurt Miller : > > Use the same approach as ROC-RK3328-CC which enables SPL GPIO, > pinctl and regulator support. This allows the gen3 board to > boot through SPL and does not break gen2 in t

[PATCH] rockchip: rk3328: rock64 - fix gen3 SPL hang

Use the same approach as ROC-RK3328-CC which enables SPL GPIO, pinctl and regulator support. This allows the gen3 board to boot through SPL and does not break gen2 in the process. Signed-off-by: Kurt Miller --- arch/arm/dts/rk3328-rock64-u-boot.dtsi | 21 + configs/rock64-rk

Re: [PATCH 0/2] mtd: spi-nand: Update Toshiba support

On Mon, May 11, 2020 at 1:36 AM Robert Marko wrote: > > This patch series updates the Toshiba SPI-NAND driver support to match > the Linux tree. > This imports 2 patches that add support for the new J series, as well > as adding x4 and QE enable to previously added TC58CVG2S0HRAIJ. > > Yoshio Furu

[PATCH 4/4] defconfig: veyron: no need for CONFIG_SPL_PINCTRL_FULL

Veyrons do not need full pinctrl support for SPL. The full pinctrl support does nothing when enabled with OF_PLATDATA, thus was already unused. This frees about 4kB of SPL size. Signed-off-by: Urja Rannikko --- configs/chromebit_mickey_defconfig | 3 +-- configs/chromebook_jerry_defconfig | 3

[PATCH 2/4] rockchip: veyron: move board_early_init_f to _r (after reloc)

Previously veyron_init() was called in board_init() context, which is called after relocation. Moving it to veyron.c used board_early_init_f which is called way earlier, and causes veyron_init to hang. Using board_early_init_r instead fixes this. Fixes: b678f2790c ("rockchip: rk3288: Move veyron_i

[PATCH 3/4] rockchip: spl-boot-order: do not attempt to access fdt if OF_PLATDATA

gd->fdt_blob is null if using OF_PLATDATA in SPL, which causes a hang after f0921f5098 ("fdt: Sync up to the latest libfdt"). We use the same test that is used in spl_common_init on whether to call fdtdec_setup to unconditionally avoid linking in the fdt-using code when not necessary and thus reduc

[PATCH 1/4] rockchip: spl: veyron speedy boots from SPI

Apparently speedy was forgotten from this list of veyron devices. Fixes: 49105fb7ed ("rockchip: add common spl board file") Signed-off-by: Urja Rannikko --- arch/arm/mach-rockchip/spl.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/

[PATCH 0/4] Making veyrons boot, 2020 edition

Hi, This is a series to make veyrons (tested on a veyron speedy), boot atleast to the u-boot prompt, the first 3 patches are necessary and the 4th one kinda just managed to catch this patch train ;) PS. Thanks to swiftgeek on IRC for some bisecting & testing, thus getting me curious enough to inv

Re: [PATCH 1/1] tools: ftdgrep: use /* fallthrough */ as needed

On Thu, May 14, 2020 at 02:27:20AM +0900, Masahiro Yamada wrote: > On Thu, May 14, 2020 at 1:13 AM Tom Rini wrote: > > > > On Thu, May 14, 2020 at 01:05:37AM +0900, Masahiro Yamada wrote: > > > Hi Tom, > > > > > > On Wed, May 13, 2020 at 11:42 PM Tom Rini wrote: > > > > > > > > On Tue, May 12, 20

Re: [PATCH 1/1] tools: ftdgrep: use /* fallthrough */ as needed

On Thu, May 14, 2020 at 1:13 AM Tom Rini wrote: > > On Thu, May 14, 2020 at 01:05:37AM +0900, Masahiro Yamada wrote: > > Hi Tom, > > > > On Wed, May 13, 2020 at 11:42 PM Tom Rini wrote: > > > > > > On Tue, May 12, 2020 at 11:04:38PM -0400, Tom Rini wrote: > > > > On Mon, May 11, 2020 at 09:08:03P

Re: [PATCH 2/2] rpi: use the newly-added RPI_EFI_NR_SPIN_PAGES

On Wed, May 13, 2020 at 7:13 AM Matthias Brugger wrote: > > On 26/02/2020 22:39, kev...@freebsd.org wrote: > > From: Kyle Evans > > > > Some systems may use a slightly larger stub to do PSCI for booting the RPi > > family. The number of pages has been made configurable so that operating > > syst

RE: [PATCH 8/9] board: stm32mp1: update vddcore in SPL

Hi, > From: Patrick DELAUNAY > Sent: mardi 21 avril 2020 17:11 > > For board using STPMIC1, the vddcore is provided by BUCK1 of STMPIC1 and > need to be updated for 800MHz support and only after the clock tree > initialization. > > The VDDCORE voltage value in provide by clock driver, saved in

Re: [PATCH] usb: max3420: add the gadget driver

On 5/12/20 3:54 AM, Jassi Brar wrote: > Hi Marek, Hi Lukasz, Hi, > On Sat, Apr 11, 2020 at 10:42 PM Jassi Brar wrote: >> >> On Sat, Apr 11, 2020 at 9:31 PM Marek Vasut wrote: >>> >>> On 4/12/20 2:04 AM, Heinrich Schuchardt wrote: Am April 11, 2020 11:47:06 PM UTC schrieb Jassi Brar :

Re: [PATCH 1/1] tools: ftdgrep: use /* fallthrough */ as needed

On Thu, May 14, 2020 at 01:05:37AM +0900, Masahiro Yamada wrote: > Hi Tom, > > On Wed, May 13, 2020 at 11:42 PM Tom Rini wrote: > > > > On Tue, May 12, 2020 at 11:04:38PM -0400, Tom Rini wrote: > > > On Mon, May 11, 2020 at 09:08:03PM +0200, Heinrich Schuchardt wrote: > > > > On 5/11/20 8:40 PM,

Re: [PATCH 1/1] tools: ftdgrep: use /* fallthrough */ as needed

Hi Tom, On Wed, May 13, 2020 at 11:42 PM Tom Rini wrote: > > On Tue, May 12, 2020 at 11:04:38PM -0400, Tom Rini wrote: > > On Mon, May 11, 2020 at 09:08:03PM +0200, Heinrich Schuchardt wrote: > > > On 5/11/20 8:40 PM, Tom Rini wrote: > > > > On Sun, May 10, 2020 at 10:12:07PM +0900, Masahiro Yama

[PATCH] imx: Update MTD partitions layout for display5 (i.MX6Q) board

This change updates the MTD partition layout on SPI-NOR memory for display5 board. Signed-off-by: Lukasz Majewski --- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- include/configs/display5.h | 7 --- 3 files changed, 6 insertions(+), 5 deletio

[U-Boot] Please pull ARC fixes for v2020.07-rc3

Hi Tom, The following changes since commit 10bca13ea6d9d4b85f80f02c8795227f63240f59: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb (2020-05-12 16:20:10 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-arc.git tags/arc-fixes-for-2020.0

[PATCH v3 1/1] cmd: gpt: add eMMC and GPT support

From: Corneliu Doban Add eMMC and GPT support. - GPT partition list and command to create the GPT added to u-boot environment - eMMC boot commands added to u-boot environment - new gpt commands (enumarate and setenv) that are used by broadcom update scripts and boot commands - eMMC specific u

Re: [PATCH v1 08/10] sysreset: Add Octeon sysreset driver

Am 02.05.20 um 10:59 schrieb Stefan Roese: > This patch adds a UCLASS_SYSRESET sysreset driver for the Octeon SoC > family. > > Signed-off-by: Stefan Roese > --- > > drivers/sysreset/Kconfig | 7 > drivers/sysreset/Makefile | 1 + > drivers/sysreset/sysreset_octeon.

Re: [ANN] U-Boot v2020.07-rc2 released

On Wed, May 13, 2020 at 04:52:26PM +0200, Marek Vasut wrote: > On 5/13/20 4:49 PM, Tom Rini wrote: > > On Wed, May 13, 2020 at 08:13:45AM +0200, Heiko Schocher wrote: > >> Hello Heinrich, > >> > >> Am 13.05.2020 um 07:53 schrieb Heinrich Schuchardt: > >>> On 5/13/20 5:54 AM, Heiko Schocher wrote: >

Re: [ANN] U-Boot v2020.07-rc2 released

On 5/13/20 4:49 PM, Tom Rini wrote: > On Wed, May 13, 2020 at 08:13:45AM +0200, Heiko Schocher wrote: >> Hello Heinrich, >> >> Am 13.05.2020 um 07:53 schrieb Heinrich Schuchardt: >>> On 5/13/20 5:54 AM, Heiko Schocher wrote: Hello Tom, Am 12.05.2020 um 15:28 schrieb Heiko Schocher: >

Re: [ANN] U-Boot v2020.07-rc2 released

On Wed, May 13, 2020 at 08:13:45AM +0200, Heiko Schocher wrote: > Hello Heinrich, > > Am 13.05.2020 um 07:53 schrieb Heinrich Schuchardt: > > On 5/13/20 5:54 AM, Heiko Schocher wrote: > > > Hello Tom, > > > > > > Am 12.05.2020 um 15:28 schrieb Heiko Schocher: > > > > Hello Tom, > > > > > > > > A

Re: [PATCH v1 10/10] mips: octeon: Add minimal Octeon 3 EBB7304 EVK support

Am 02.05.20 um 10:59 schrieb Stefan Roese: > This patch adds very basic minimal support for the Marvell Octeon 3 > CN73xx based EBB7304 EVK. Please note that the basic Octeon port does > not support DDR3/4 initialization yet. To still use U-Boot on with this > port, the L2 cache (4MiB) is used a

Re: [PATCH 1/1] tools: ftdgrep: use /* fallthrough */ as needed

On Tue, May 12, 2020 at 11:04:38PM -0400, Tom Rini wrote: > On Mon, May 11, 2020 at 09:08:03PM +0200, Heinrich Schuchardt wrote: > > On 5/11/20 8:40 PM, Tom Rini wrote: > > > On Sun, May 10, 2020 at 10:12:07PM +0900, Masahiro Yamada wrote: > > >> On Sun, May 10, 2020 at 12:12 AM Heinrich Schuchardt

[PATCH 12/13] cbfs: Allow reading a file from a CBFS given its base addr

Currently we support reading a file from CBFS given the address of the end of the ROM. Sometimes we only know the start of the CBFS. Add a function to find a file given that. Signed-off-by: Simon Glass --- fs/cbfs/cbfs.c | 13 + include/cbfs.h | 11 +++ 2 files changed, 24 i

[PATCH 10/13] cbfs: Return the error code from file_cbfs_init()

We may as well return the error code and use it directly in the command code. CBFS still uses its own error enum which we may be able to remove, but leave it for now. Signed-off-by: Simon Glass --- cmd/cbfs.c | 3 +-- fs/cbfs/cbfs.c | 23 +++ include/cbfs.h | 6 +++---

[PATCH 08/13] cbfs: Use void * for the position pointers

It doesn't make sense to use u8 * as the pointer type for accessing the CBFS since we do not access it as bytes, but via structures. Change it to void *, which allows us to avoid a cast. Signed-off-by: Simon Glass --- fs/cbfs/cbfs.c | 17 - 1 file changed, 8 insertions(+), 9 del

[PATCH 11/13] cbfs: Change file_cbfs_find_uncached() to return an error

This function currently returns a node pointer so there is no way to know the error code. Also it uses data in BSS which seems unnecessary since the caller might prefer to use a local variable. Update the function and split its body out into a separate function so we can use it later. Signed-off-

[PATCH 13/13] cbfs: Don't require the CBFS size with cbfs_init_mem()

The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass --- arch/x86/lib/fsp2/fsp_init.c | 3 +-- fs/cbfs/cbfs.c | 9 + include/cbfs.h | 3 +-- 3 files cha

[PATCH 09/13] cbfs: Record the start address in cbfs_priv

The start address of the CBFS is used when scanning for files. It makes sense to put this in our cbfs_priv struct and calculate it when we read the header. Update the code accordingly. Signed-off-by: Simon Glass --- fs/cbfs/cbfs.c | 44 +++- 1 file chang

[PATCH 04/13] cbfs: Adjust return value of file_cbfs_next_file()

At present his uses a true return to indicate it found a file. Adjust it to use 0 for this, so it is consistent with other functions. Update its callers accordingling and add a check for malloc() failure in file_cbfs_fill_cache(). Signed-off-by: Simon Glass --- fs/cbfs/cbfs.c | 43

[PATCH 06/13] cbfs: Adjust cbfs_load_header_ptr() to use cbfs_priv

This function is strange at the moment in that it takes a header pointer but then accesses the cbfs_s global. Currently clients have their own priv pointer, so update the function to take that as a parameter instead. Signed-off-by: Simon Glass --- fs/cbfs/cbfs.c | 9 ++--- 1 file changed, 6

[PATCH 07/13] cbfs: Unify the two header loaders

These two functions have mostly the same code. Pull this out into a common function. Also make this function zero the private data so that callers don't have to do it. Finally, update cbfs_load_header_ptr() to take the base of the ROM as its parameter, which makes more sense than passing the addre

[PATCH 05/13] cbfs: Adjust file_cbfs_load_header() to use cbfs_priv

This function is strange at the moment in that it takes a header pointer but then accesses the cbfs_s global. Currently clients have their own priv pointer, so update the function to take that as a parameter instead. Signed-off-by: Simon Glass --- fs/cbfs/cbfs.c | 9 + 1 file changed, 5

[PATCH 03/13] cbfs: Use bool type for whether initialised

At present this uses an int type. U-Boot now supports bool so use this instead. Also use English spelling for initialised which we are here. Signed-off-by: Simon Glass --- fs/cbfs/cbfs.c | 28 ++-- include/cbfs.h | 2 +- 2 files changed, 15 insertions(+), 15 deletions(-

[PATCH 01/13] cbfs: Rename the result variable

At present the result variable in the cbfs_priv is called 'result' as is the local variable in a few functions. Change the latter to 'ret' which is more common in U-Boot and avoids confusion. Signed-off-by: Simon Glass --- fs/cbfs/cbfs.c | 20 ++-- 1 file changed, 10 insertions(

[PATCH 02/13] cbfs: Use ulong consistently

U-Boot uses ulong for addresses but there are a few places in this driver that don't use it. Convert this driver over to follow this convention fully. Signed-off-by: Simon Glass --- fs/cbfs/cbfs.c | 9 - include/cbfs.h | 4 ++-- 2 files changed, 6 insertions(+), 7 deletions(-) diff --g

[PATCH 00/13] x86: cbfs: Various clean-ups to CBFS implementation

This code is very old and has not had much of a clean-up since it was written. This series aims to tidy it up to use error codes, avoid using BSS when not necessary and to add a few more features. Simon Glass (13): cbfs: Rename the result variable cbfs: Use ulong consistently cbfs: Use bool

[PATCH v2 1/1] imx: rom api: fix image offset computation

When not booting from FlexSPI, the offset computation is: offset = image_offset + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8000; When booting from SD card or eMMC user partition, image_offset is 0x8000. It is useless to add and remove 0x8000. When booting from other device, image_offset

RE: [PATCH] BDINFO: ARC: print info about relocations

Hi Eugeniy, > -Original Message- > From: Eugeniy Paltsev > Sent: Saturday, April 25, 2020 12:11 AM > To: Alexey Brodkin > Cc: u-boot@lists.denx.de; uboot-snps-...@synopsys.com; Eugeniy Paltsev > > Subject: [PATCH] BDINFO: ARC: print info about relocations > > Print relocation informat

Re: [RESEND PATCH v2 04/11] net: dwc_eth_qos: Make clk_rx and clk_tx optional

On 5/13/20 3:17 PM, Patrick DELAUNAY wrote: > Hi David, > >> From: David Wu >> Sent: mardi 12 mai 2020 11:56 >> >> For others using, clk_rx and clk_tx may not be necessary, and their clock >> names >> are different. >> >> Signed-off-by: David Wu >> --- >> >> Changes in v2: >> - Don't change the

RE: [RESEND PATCH v2 04/11] net: dwc_eth_qos: Make clk_rx and clk_tx optional

Hi David, > From: David Wu > Sent: mardi 12 mai 2020 11:56 > > For others using, clk_rx and clk_tx may not be necessary, and their clock > names > are different. > > Signed-off-by: David Wu > --- > > Changes in v2: > - Don't change the Rx and Tx clock names. (Patrice, Stephen) > > drivers/

Re: [PATCH v1 05/10] mips: Rename CONFIG_CPU_CAVIUM_OCTEON to CONFIG_CPU_MIPS64_OCTEON

Am 02.05.20 um 10:59 schrieb Stefan Roese: > With the introduction of the MIPS Octeon support, lets use the newly > added Kconfig symbol CONFIG_CPU_MIPS64_OCTEON instead of the old Linux > CONFIG_CPU_CAVIUM_OCTEON one (which was never set). Remove these > references completely with this patch.

Re: [PATCH v1 04/10] mips: traps: Set WG bit in EBase register on Octeon

Am 02.05.20 um 10:59 schrieb Stefan Roese: > WG (bit 11) needs to be set on Octeon to enable writing bits 63:30 of > the exception base register. > > Signed-off-by: Stefan Roese > --- > > arch/mips/lib/traps.c | 4 > 1 file changed, 4 insertions(+) > > diff --git a/arch/mips/lib/traps.

Re: [PATCH v1 03/10] mips: cache: Don't use cache operations with CONFIG_MIPS_CACHE_COHERENT

Am 02.05.20 um 10:59 schrieb Stefan Roese: > The Octeon platform is cache coherent and cache flushes and invalidates > are not needed. This patch makes use of the newly introduced Kconfig > option CONFIG_MIPS_CACHE_COHERENT to effectively disable all the cache > operations. I don't like this ex

Re: [PATCH] lib: rsa: avoid overriding the object name when already specified

On Wed, May 13, 2020 at 5:26 AM Bastian Krause wrote: > > From: Jan Luebbe > > If "object=" is specified in "keydir" when using the pkcs11 engine do > not append another "object=". This makes it possible to > use object names other than the key name hint. These two string > identifiers are not ne

Antwort: [PATCH v2 04/35] irq: Add a method to convert an interrupt to ACPI

Hi Simon, -"Simon Glass" schrieb: - >Betreff: [PATCH v2 04/35] irq: Add a method to convert an interrupt >to ACPI > >When generating ACPI tables we need to convert IRQs in U-Boot to the >ACPI >structures required by ACPI. This is a SoC-specific conversion and >cannot >be handled by generi

Re: [RESEND PATCH v2 01/11] net: dwc_eth_qos: Use dev_ functions calls to get FDT data

On 5/13/20 2:58 PM, Patrick DELAUNAY wrote: > Dear David, > >> From: David Wu >> Sent: mardi 12 mai 2020 11:56 >> >> It seems dev_ functions are more general than fdt_ functions. >> >> Signed-off-by: David Wu It seems Joe still didn't come back, I have patches open for two+ months now. What do

Re: [PATCH v1 02/10] mips: cache: Allow using CONFIG_MIPS_L2_CACHE without CONFIG_MIPS_CM

Am 02.05.20 um 10:59 schrieb Stefan Roese: > This patch enables the usage of CONFIG_MIPS_L2_CACHE without > CONFIG_MIPS_CM, which is what is needed for the newly added Octeon > platform. > > Signed-off-by: Stefan Roese > --- > > arch/mips/lib/cache.c | 13 - > 1 file changed, 12

RE: [RESEND PATCH v2 01/11] net: dwc_eth_qos: Use dev_ functions calls to get FDT data

Dear David, > From: David Wu > Sent: mardi 12 mai 2020 11:56 > > It seems dev_ functions are more general than fdt_ functions. > > Signed-off-by: David Wu > --- > > Changes in v2: > - None > > drivers/net/dwc_eth_qos.c | 7 +++ > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff

Re: [PATCH v3 0/2] usb: xhci: Load Raspberry Pi 4 VL805's firmware

On Tue, 2020-05-05 at 18:26 +0200, Nicolas Saenz Julienne wrote: > Newer revisions of the RPi4 need their xHCI chip, VL805, firmware to be > loaded explicitly. Earlier versions didn't need that as they where using > an EEPROM for that purpose. This series takes care of setting up the > relevant inf

Using a 'cpu' command to print CPU information

Hi All, I am trying to use 'cpu' command, so I modified config file and compiled u-boot with a 'cpu' command enabled. But when I try to use it properly it's completely silent. It appeared that this behaviour is caused by list at 'dev_head' always being empty in the corresponding uclass. But d

RE: [RESEND PATCH v2 02/11] net: dwc_eth_qos: Add option "snps,reset-gpio" phy-rst gpio for stm32

Hi David > From: David Wu > Sent: mardi 12 mai 2020 11:56 > > It can be seen that most of the Socs using STM mac, "snps,reset-gpio" > gpio is used, adding this option makes reset function more general. > > Signed-off-by: David Wu > --- > > Changes in v2: > - Remove the code is not related (Pa

Re: [PATCH v1 01/10] mips: octeon: Initial minimal support for the Marvell Octeon SoC

sorry for the delay ;) Am 02.05.20 um 10:59 schrieb Stefan Roese: > From: Aaron Williams > > This patch adds very basic support for the Octeon III SoCs. Only > CFI parallel NOR flash and UART is supported for now. > > Please note that the basic Octeon port does not include the DDR3/4 > initiali

USB gadget ethernet status ?

I decided to check out USB gadget ethernet in u-boot and selected USB_ETHER/USB_ETH_RNDIS and tried to build it but that fails due to missing __constant_cpu_to_leXX() definitions. These are nowhere to find in u-boot so I wonder what shape above code is? Jocke

Re: [PATCH 2/2] [RFC] clk: stm32mp1: Handle SoC speed grade configs

On 5/13/20 2:23 PM, Patrick DELAUNAY wrote: > Hi Marek, > >> From: Marek Vasut >> Sent: mercredi 13 mai 2020 12:53 >> >> On 5/13/20 11:12 AM, Patrick DELAUNAY wrote: >>> Dear Marek, >>> From: Marek Vasut Sent: mardi 12 mai 2020 19:07 There are two speed grades of the STM32MP1

Re: [PATCH] ARM: dts: stm32: Synchronize DDR setttings on DH SoMs

On 5/13/20 2:26 PM, Patrick DELAUNAY wrote: > Hi Marek, > >> From: Marek Vasut >> Sent: mardi 12 mai 2020 18:58 >> >> On 4/29/20 3:08 PM, Marek Vasut wrote: >>> Add custom DDR DRAM settings for the DHCOR and DHCOM SoMs and put >> them >>> into use by the board file instead of the default ones. Th

RE: [PATCH] ARM: dts: stm32: Synchronize DDR setttings on DH SoMs

Hi Marek, > From: Marek Vasut > Sent: mardi 12 mai 2020 18:58 > > On 4/29/20 3:08 PM, Marek Vasut wrote: > > Add custom DDR DRAM settings for the DHCOR and DHCOM SoMs and put > them > > into use by the board file instead of the default ones. These new DRAM > > settings are a better fit for the S

[PATCH 0/4] mach-sunxi: sunxi SPI-NAND-SPL

This patch-series enables u-boot to be booted from SPI-NAND memory on sunxi SoCs. Development was done and tested on a sun8i V3s. To accomplish this, the changes where split in 4 different patches. The following list describes the patches, their title, their message ID and contain their commit-me

RE: [PATCH 2/2] [RFC] clk: stm32mp1: Handle SoC speed grade configs

Hi Marek, > From: Marek Vasut > Sent: mercredi 13 mai 2020 12:53 > > On 5/13/20 11:12 AM, Patrick DELAUNAY wrote: > > Dear Marek, > > > >> From: Marek Vasut > >> Sent: mardi 12 mai 2020 19:07 > >> > >> There are two speed grades of the STM32MP1, the A/C and D/F, the > >> former can run up to 65

Antwort: [PATCH v2 03/35] acpi: Add a way to check device status

Hi Simon, -"Simon Glass" schrieb: - >Betreff: [PATCH v2 03/35] acpi: Add a way to check device status > >At present U-Boot does not support the different ACPI status values, >but >it is best to put this logic in a central place. Add a function to >get the >device status. > >Signed-off-by:

Re: [PATCH 2/2] rpi: use the newly-added RPI_EFI_NR_SPIN_PAGES

On 26/02/2020 22:39, kev...@freebsd.org wrote: > From: Kyle Evans > > Some systems may use a slightly larger stub to do PSCI for booting the RPi > family. The number of pages has been made configurable so that operating > systems building U-Boot for use in these kinds of environments can rese

Re: [PATCH 1/2] rpi: Kconfig option for initial page reservation

On 26/02/2020 22:37, kev...@freebsd.org wrote: > From: Kyle Evans > > While the nearly-universal default for the Raspberry Pi family is to use > spin tables and the spin table implementation provided by the Raspberry Pi > Foundation, FreeBSD and others may use a PSCI implementation instead. >

RE: [PATCH] stm32mp1: Fix warning display when 1.5A power supply is used

Hi Patrice > From: Patrice CHOTARD > Sent: jeudi 30 avril 2020 18:41 > > On DK1/2 board, when a 1.5A power supply is detected, a warning message is > displayed. In this message, "1.5mA" is displayed instead of "1.5A". > > Signed-off-by: Patrice Chotard > --- > > board/st/stm32mp1/stm32mp1.c

Re: [PATCH 2/2] configs: rpi_arm64: enable SDHCI SDMA support

On 12/05/2020 12:02, matthias@kernel.org wrote: > From: Matthias Brugger > > RPi4 supports SDMA on it's SDHCI controller. Enable to option for > the combine RPi3/4 config. > > Signed-off-by: Matthias Brugger > > --- Queued for rpi-next > > configs/rpi_arm64_defconfig | 1 + > 1 file

Re: [PATCH 1/2] mmc: sdhci: Use debug for not supported SDMA info message

On 12/05/2020 12:02, matthias@kernel.org wrote: > From: Matthias Brugger > > If CONFIG_MMC_SDHCI_SDMA is enabled but the HW could not support it, > we no longer error out. Instead we do not enable it in the host. > Change the output from printf to debug as this isn't an error but only > ad

Re: [PATCH v2] rpi_4_defconfig: add missing CONFIG_ARCH_FIXUP_FDT_MEMORY

On Wed, May 13, 2020 at 12:38:58PM +0200, Matthias Brugger wrote: > > > On 13/05/2020 10:07, Corentin Labbe wrote: > > As discussed at > > https://lore.kernel.org/linux-arm-kernel/b726290c-1038-3771-5187-6ac370bc9...@arm.com/T/ > > the defconfig for rpi4 miss CONFIG_ARCH_FIXUP_FDT_MEMORY. > > Wi

Re: [PATCH 2/2] [RFC] clk: stm32mp1: Handle SoC speed grade configs

On 5/13/20 11:12 AM, Patrick DELAUNAY wrote: > Dear Marek, > >> From: Marek Vasut >> Sent: mardi 12 mai 2020 19:07 >> >> There are two speed grades of the STM32MP1, the A/C and D/F, the former can >> run up to 650 MHz, the later at up to 800 MHz. Allow specifying PLL config >> for >> both in the

Re: [PATCH v4 12/16] usb: dwc3: add make compatible for rockchip platform

On 5/13/20 2:47 AM, Frank Wang wrote: > Hi Marek, > > On 2020/5/12 15:26, Marek Vasut wrote: >> On 5/12/20 3:08 AM, Frank Wang wrote: >>> Hi Marek, >>> >>> On 2020/5/11 17:48, Marek Vasut wrote: On 5/11/20 9:57 AM, Frank Wang wrote: [...] > @@ -394,6 +407,12 @@ static int dwc3_g

[PATCH] lib: rsa: avoid overriding the object name when already specified

From: Jan Luebbe If "object=" is specified in "keydir" when using the pkcs11 engine do not append another "object=". This makes it possible to use object names other than the key name hint. These two string identifiers are not necessarily equal. Signed-off-by: Jan Luebbe Signed-off-by: Bastian

Re: [PATCH v3 15/17] mtd: spi-nor-core: Perform a Soft Reset on boot

On 13/05/20 03:26PM, Jagan Teki wrote: > On Wed, May 13, 2020 at 2:24 PM Pratyush Yadav wrote: > > > > On 13/05/20 12:17PM, Jagan Teki wrote: > > > On Mon, Mar 30, 2020 at 9:16 PM Pratyush Yadav wrote: > > > > > > > > When the flash is handed to us in a stateful mode like 8D-8D-8D, it is > > > >

Re: [PATCH v2] rpi_4_defconfig: add missing CONFIG_ARCH_FIXUP_FDT_MEMORY

On 13/05/2020 10:07, Corentin Labbe wrote: > As discussed at > https://lore.kernel.org/linux-arm-kernel/b726290c-1038-3771-5187-6ac370bc9...@arm.com/T/ > the defconfig for rpi4 miss CONFIG_ARCH_FIXUP_FDT_MEMORY. > Without it, booting with an initrd fail. > > Signed-off-by: Corentin Labbe > --

RE: [PATCH] net: dwc_eth_qos: Pad descriptors to cacheline size

Hi Stephen and Marek > From: Stephen Warren > Sent: mercredi 29 avril 2020 23:51 > To: Marek Vasut > Cc: u-boot@lists.denx.de; Joe Hershberger ; Patrice > CHOTARD ; Patrick DELAUNAY > ; Ramon Fried ; Stephen > Warren ; Tom Warren > Subject: Re: [PATCH] net: dwc_eth_qos: Pad descriptors to cache

Re: [PATCH v3 15/17] mtd: spi-nor-core: Perform a Soft Reset on boot

On Wed, May 13, 2020 at 2:24 PM Pratyush Yadav wrote: > > On 13/05/20 12:17PM, Jagan Teki wrote: > > On Mon, Mar 30, 2020 at 9:16 PM Pratyush Yadav wrote: > > > > > > When the flash is handed to us in a stateful mode like 8D-8D-8D, it is > > > difficult to detect the mode the flash is in. One opt

Re: Antwort: Re: [PATCH v2 00/35] dm: Add programmatic generation of ACPI tables (part B)

On Tue, May 12, 2020 at 05:22:38PM -0600, Simon Glass wrote: > Hi Andy, > > On Tue, 12 May 2020 at 06:32, Andy Shevchenko > wrote: > > > > On Tue, May 12, 2020 at 01:55:49PM +0200, Wolfgang Wallner wrote: > > > > > > Since you were involved a lot in the discussion in the part A series, > > > > wo

RE: [PATCH] ARM: dts: stm32: Synchronize DDR setttings on DH SoMs

Dear Marek, > From: Marek Vasut > Sent: mercredi 29 avril 2020 15:09 > > Add custom DDR DRAM settings for the DHCOR and DHCOM SoMs and put > them into use by the board file instead of the default ones. These new DRAM > settings are a better fit for the SoMs. > > Signed-off-by: Marek Vasut > Cc

Re: [PATCH v3 9/9] configs: Enable support for the XHCI controller on RPI4 board (ARM 64-bit)

On 12.05.2020 20:47, Sylwester Nawrocki wrote: > This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI > and USB commands. To get it working one has to call the following commands: > "pci enum; usb start;", thus such commands have been added to the default > "preboot" environment

Re: [PATCH] regulator: fix: enable gpio when requested

> Date: Tue, 28 Apr 2020 20:26:09 +0200 > From: Lukasz Majewski Ping? > Hi Mark, > > > > Date: Tue, 28 Apr 2020 06:24:10 +0200 > > > From: Lukasz Majewski > > > > Hi Lukasz, > > > > > Hi Mark, > > > > > > > The fix in commit b7adcdd073c0 has the side-effect that the > > > > regulator wi

RE: [PATCH 2/2] [RFC] clk: stm32mp1: Handle SoC speed grade configs

Dear Marek, > From: Marek Vasut > Sent: mardi 12 mai 2020 19:07 > > There are two speed grades of the STM32MP1, the A/C and D/F, the former can > run up to 650 MHz, the later at up to 800 MHz. Allow specifying PLL config for > both in the DT, so that it is possible to cater for boards which can

Re: [PATCH v9 04/18] lib: Makefile: build crc7.c when CONFIG_MMC_SPI

On 13.05.20 08:26, Pragnesh Patel wrote: > When build U-Boot SPL, meet an issue of undefined reference to > 'crc7' for drivers/mmc/mmc_spi.c, so let's compile crc7.c when > CONFIG_MMC_SPI selected. > > Signed-off-by: Pragnesh Patel Reviewed-by: Heinrich Schuchardt > --- > lib/Makefile | 2 +- >

RE: [PATCH 1/2] [RFC] ARM: stm32: Make bsec available in SPL

Dear Marek, > From: Marek Vasut > Sent: mardi 12 mai 2020 19:07 > > Make the bsec driver available both in SPL and in U-Boot proper to make it > possible to read out the SoC type (A/C/D/F) and thus to determine the MPU PLL > configuration (650/800 MHz). > > Signed-off-by: Marek Vasut > Cc: Pa

Re: [PATCH 2/2] configs: khadas-vim3: enable HDMI output

On 11/05/2020 15:17, Neil Armstrong via groups.io wrote: > Enable options to permit HDMI output on Khadas VIM3 & VIM3L boards. > > Signed-off-by: Neil Armstrong > --- > configs/khadas-vim3_defconfig | 9 + > configs/khadas-vim3l_defconfig | 4 > 2 files changed, 13 insertions(+) >

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