Summary
===
under the current implementation of secure boot merged in v2020.07,
UEFI subsystem verifies a signature using certificates that are coming
from signature dtabase, i.e. "db."
In real world, an image is signed by a signer, but its certificate
can also be signed by another CA and, if
This function will be called from x509_check_for_self_signed() and
pkcs7_verify_one(), which will be imported from linux in a later patch.
While it does exist in linux code and has a similar functionality of
rsa_verify(), it calls further linux-specific interfaces inside.
That could lead to more f
This function was nullified when the file, pkcs7_verify.c, was imported
because it calls further linux-specific interfaces inside, hence that
could lead to more files being imported from linux.
We need this function in pkcs7_verify_one() and so simply re-implement it
here instead of re-using the c
When the file, x509_public_key.c, was imported from linux code in
commit b4adf627d5b7 ("lib: crypto: add x509 parser"),
x509_check_for_self_signed() was commented out for simplicity.
Now it need be enabled in order to make pkcs7_verify_one(), which will be
imported in a later patch, functional
In this commit, efi_signature_verify(with_sigdb) will be re-implemented
using pcks7_verify_one() in order to support certificates chain, where
the signer's certificate will be signed by an intermediate CA (certificate
authority) and the latter's certificate will also be signed by another CA
and so
The file, pkcs7_verify.c, will now be imported from linux code
(crypto/asymmetric_keys/pkcs7_verify.c)
and modified to fit into U-Boot environment.
In particular, pkcs7_verify_one() function will be used in a later patch
to rework signature verification logic aiming to support intermediate
certifi
The function, pkcs7_verify_one(), will be utilized to rework signature
verification logic aiming to support intermediate certificates in
"chain of trust."
To do that, its function interface is expanded, adding an extra argument
which is expected to return the last certificate in trusted chain.
The
In this test case, an image may have a signature with additional
intermediate certificates. A chain of trust will be followed and all
the certificates in the middle of chain must be verified before loading.
Signed-off-by: AKASHI Takahiro
---
test/py/tests/test_efi_secboot/conftest.py| 134 ++
Hi Daniel,
On 16.07.20 20:54, Daniel Schwierzeck wrote:
This patch adds very basic minimal support for the Marvell Octeon 3
CN73xx based EBB7304 EVK. Please note that the basic Octeon port does
not support DDR3/4 initialization yet. To still use U-Boot on with this
port, the L2 cache (4MiB) is u
From: Rick Chen
Use fdtdec_get_addr_size_auto_noparent to read the "reg" property
instead of fdtdec_get_addr. This will increase the compatibility
of dtb parsing.
Signed-off-by: Rick Chen
---
board/AndesTech/ax25-ae350/ax25-ae350.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
Hi Jaehoon,
Below is the full log of the performance and function tests for eMMC HS400
mode. Since I used date to record time, there must be some error more or less.
I tested the r/w performance with 4G data size at 175MHz bus speed. The results
were,
Read: 273MB/s = 4096MB / 15s
Write: 74MB/s =
On Fri, Jul 17, 2020 at 04:24:44PM +0800, Open Source Project uboot wrote:
> From: Rick Chen
>
> Use fdtdec_get_addr_size_auto_noparent to read the "reg" property
> instead of fdtdec_get_addr. This will increase the compatibility
> of dtb parsing.
>
> Signed-off-by: Rick Chen
> ---
> board/And
This patch-set is to support eMMC HS200 and HS400 speed modes for
eSDHC, and enable them on LX2160ARDB board.
CI build link
https://travis-ci.org/github/yangbolu1991/u-boot-test/builds/709088861
Changes for v2:
- Added two patches to fix stability issue.
Yangbo Lu (11):
mmc: add a reinit() API
For DM_MMC, the controller re-initialization is needed to
clear old configuration for mmc rescan.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- None.
---
drivers/mmc/mmc-uclass.c | 15 +++
drivers/mmc/mmc.c| 8 ++--
include/mmc.h| 10 ++
3 fi
Add a reinit() callback for mmc rescan.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- None.
---
drivers/mmc/fsl_esdhc.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index a4b923a..d1f2e4a 100644
--- a/drivers/mmc/fsl_esdh
Support tuning process for eMMC HS200 for eSDHC.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- None.
---
drivers/mmc/fsl_esdhc.c | 106 ++--
include/fsl_esdhc.h | 17 ++--
2 files changed, 116 insertions(+), 7 deletions(-)
diff --git
Add a hs400_tuning flag to identify the tuning for HS400 mode.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- None.
---
drivers/mmc/mmc.c | 2 ++
include/mmc.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index a53f93a..a18e75d 100644
--
Clean TBCTL[TB_EN] manually during init since it is not able to
be reset by reset all operation.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- None.
---
drivers/mmc/fsl_esdhc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index
There was a fix-up for eMMC HS400 stability issue in Linux.
Patch link:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
commit/?id=58d0bf843b49fa99588ac9f85178bd8dfd651b53
Description:
Currently only LX2160A eSDHC supports eMMC HS400. According to
a large number of tests, eMMC
Add properties related to eMMC HS400 mode.
mmc-hs400-1_8v;
bus-width = <8>;
Signed-off-by: Yangbo Lu
---
Changes for v2:
- None.
---
arch/arm/dts/fsl-lx2160a-rdb.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts
The process for eMMC HS400 mode for eSDHC is,
1. Perform the Tuning Process at the HS400 target operating frequency.
Latched the clock division value.
2. if read transaction, then set the SDTIMNGCTL[FLW_CTL_BG].
3. Switch to High Speed mode and then set the card clock frequency to
a value no
Fix mmc->clock with actual clock which is divided by the
controller, and record it with priv->clock which was removed
accidentally.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- Added this patch.
---
drivers/mmc/fsl_esdhc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/
Add a mmc_hs400_prepare_ddr() interface for controllers
which needs preparation before switching to DDR mode for
HS400 mode.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- None.
---
drivers/mmc/mmc-uclass.c | 15 +++
drivers/mmc/mmc.c| 2 ++
include/mmc.h
Enable eMMC HS400 mode support on LX2160ARDB.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- None.
---
configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 +
configs/lx2160ardb_tfa_defconfig | 1 +
configs/lx2160ardb_tfa_stmm_defconfig| 1 +
3 files changed, 3 insertions
On Fri, Jul 17, 2020 at 4:35 PM Andes wrote:
>
> From: Rick Chen
>
> Use fdtdec_get_addr_size_auto_noparent to read the "reg" property
> instead of fdtdec_get_addr. This will increase the compatibility
> of dtb parsing.
>
> Signed-off-by: Rick Chen
> ---
> board/AndesTech/ax25-ae350/ax25-ae350.
On 17.07.20 07:15, Bin Meng wrote:
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
While trying to use the U-Boot xHCI driver on the MIPS Octeon platform,
which is big endian, I noticed that the driver is missing a few endian
conversion calls. This patch adds these missing endian conversion
On 17.07.20 07:24, Bin Meng wrote:
Hi Stefan,
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
xhci_writeq() makes the CPU->LE swapping only when addressing registers
in the xHCI controller address range and not in the local memory (RAM).
Is the above behavior exposed by the MIPS platform
On 17.07.20 07:33, Bin Meng wrote:
Hi Stefan,
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
These values are already swapped to CPU endianess, so swapping them
Can you please add more details as to when these values are swapped? I
assume this is inside usb_select_config() which is call
Hi Stefan,
On Fri, Jul 17, 2020 at 6:04 PM Stefan Roese wrote:
>
> On 17.07.20 07:24, Bin Meng wrote:
> > Hi Stefan,
> >
> > On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
> >>
> >> xhci_writeq() makes the CPU->LE swapping only when addressing registers
> >> in the xHCI controller address ra
Hi Bin,
On 17.07.20 12:09, Bin Meng wrote:
Hi Stefan,
On Fri, Jul 17, 2020 at 6:04 PM Stefan Roese wrote:
On 17.07.20 07:24, Bin Meng wrote:
Hi Stefan,
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
xhci_writeq() makes the CPU->LE swapping only when addressing registers
in the xHCI
Hi Stefan,
On Fri, Jul 17, 2020 at 6:08 PM Stefan Roese wrote:
>
> On 17.07.20 07:33, Bin Meng wrote:
> > Hi Stefan,
> >
> > On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
> >>
> >> These values are already swapped to CPU endianess, so swapping them
> >
> > Can you please add more details as
On Fri, Jul 17, 2020 at 05:38:19PM +0800, Bin Meng wrote:
> On Fri, Jul 17, 2020 at 4:35 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > Use fdtdec_get_addr_size_auto_noparent to read the "reg" property
> > instead of fdtdec_get_addr. This will increase the compatibility
> > of dtb parsing.
> >
>
Hi Stefan,
On Fri, Jul 17, 2020 at 6:11 PM Stefan Roese wrote:
>
> Hi Bin,
>
> On 17.07.20 12:09, Bin Meng wrote:
> > Hi Stefan,
> >
> > On Fri, Jul 17, 2020 at 6:04 PM Stefan Roese wrote:
> >>
> >> On 17.07.20 07:24, Bin Meng wrote:
> >>> Hi Stefan,
> >>>
> >>> On Thu, Jul 2, 2020 at 4:47 PM St
Hi Tom,
This PR includes the following changes for v2020.10 release:
- New timer API to allow delays with a 32-bit microsecond timer
- Add dynamic ACPI structs (DSDT/SSDT) generations to the DM core
- x86: Enable ACPI table generation by default
- x86: Enable the copy framebuffer on Coral
- x86:
Hi Bin,
On 17.07.20 07:57, Bin Meng wrote:
Hi Stefan,
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
Some platforms, like MIPS Octeon, use mapped addresses (virtual address
!= physical address). On these platforms we need to make sure, that the
local virtual addresses are converted to ph
add board support for the moritz III from ic-automation
Changes for v4:
- re-sort list alphabetically
- c style comments
Changes for v3:
- Resend via git send-email
Changes for v2:
- Coding Style cleanup
Signed-off-by: Nico Becker
---
arch/arm/dts/Makefile
Hi Stefan,
On Fri, Jul 17, 2020 at 6:17 PM Stefan Roese wrote:
>
> Hi Bin,
>
> On 17.07.20 07:57, Bin Meng wrote:
> > Hi Stefan,
> >
> > On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
> >>
> >> Some platforms, like MIPS Octeon, use mapped addresses (virtual address
> >> != physical address).
On 17.07.20 09:16, AKASHI Takahiro wrote:
> In this commit, efi_signature_verify(with_sigdb) will be re-implemented
> using pcks7_verify_one() in order to support certificates chain, where
> the signer's certificate will be signed by an intermediate CA (certificate
> authority) and the latter's cer
Hi Bin,
On 17.07.20 12:23, Bin Meng wrote:
Hi Stefan,
On Fri, Jul 17, 2020 at 6:17 PM Stefan Roese wrote:
Hi Bin,
On 17.07.20 07:57, Bin Meng wrote:
Hi Stefan,
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
Some platforms, like MIPS Octeon, use mapped addresses (virtual address
!=
On 17.07.20 09:16, AKASHI Takahiro wrote:
> In this test case, an image may have a signature with additional
> intermediate certificates. A chain of trust will be followed and all
> the certificates in the middle of chain must be verified before loading.
>
> Signed-off-by: AKASHI Takahiro
Thanks
Hi Stefan,
On Fri, Jul 17, 2020 at 6:28 PM Stefan Roese wrote:
>
> Hi Bin,
>
> On 17.07.20 12:23, Bin Meng wrote:
> > Hi Stefan,
> >
> > On Fri, Jul 17, 2020 at 6:17 PM Stefan Roese wrote:
> >>
> >> Hi Bin,
> >>
> >> On 17.07.20 07:57, Bin Meng wrote:
> >>> Hi Stefan,
> >>>
> >>> On Thu, Jul 2,
On 17.07.20 06:55, Ilias Apalodimas wrote:
> Instead of adding the definition for the specific MM SVC used in
> StandAloneMM we added the one used in the standard SMC calls.
> So change the value from -4 to -5 to match the correct one defined in
> EDK2 and rename them to avoid future confusion
>
>
Hi Bin,
On 17.07.20 12:29, Bin Meng wrote:
Hi Stefan,
On Fri, Jul 17, 2020 at 6:28 PM Stefan Roese wrote:
Hi Bin,
On 17.07.20 12:23, Bin Meng wrote:
Hi Stefan,
On Fri, Jul 17, 2020 at 6:17 PM Stefan Roese wrote:
Hi Bin,
On 17.07.20 07:57, Bin Meng wrote:
Hi Stefan,
On Thu, Jul 2, 20
Hi Stefan,
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
>
> While trying to use the U-Boot xHCI driver on the MIPS Octeon platform,
> which is big endian, I noticed that the driver is missing a few endian
> conversion calls. This patch adds these missing endian conversion
> calls.
>
> Signe
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
>
> These values are already swapped to CPU endianess, so swapping them
> again is a bug. Let's remove the swap here instead.
>
> Signed-off-by: Stefan Roese
> Cc: Bin Meng
> Cc: Marek Vasut
> ---
>
> drivers/usb/host/usb-uclass.c | 8
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
>
> xhci_writeq() makes the CPU->LE swapping only when addressing registers
> in the xHCI controller address range and not in the local memory (RAM).
> We need to use cpu_to_le64() here to ensure that the conversion is done
> correctly.
>
> Signed
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
>
> Some platforms, like MIPS Octeon, use mapped addresses (virtual address
> != physical address). On these platforms we need to make sure, that the
> local virtual addresses are converted to physical (DMA) addresses for
> the xHCI controller. Th
From: Patrick Oppenlander
This meant that the order of operations had to change. If we replace the
data property first then fail to add the data-size-unciphered property
the data will be ciphered again when retrying.
Signed-off-by: Patrick Oppenlander
---
tools/image-host.c | 19 ++
From: Patrick Oppenlander
Previously mkimage would process any node matching the regex cipher.*
and apply the ciphers to the image data in the order they appeared in
the FDT. This meant that data could be inadvertently ciphered multiple
times.
Switch to processing a single cipher node which exac
From: Patrick Oppenlander
Previously, mkimage -F could be run multiple times causing already
ciphered image data to be ciphered again.
Signed-off-by: Patrick Oppenlander
---
tools/image-host.c | 47 +++---
1 file changed, 32 insertions(+), 15 deletions(-
Hi Bin,
On 17.07.20 13:18, Bin Meng wrote:
Hi Stefan,
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
While trying to use the U-Boot xHCI driver on the MIPS Octeon platform,
which is big endian, I noticed that the driver is missing a few endian
conversion calls. This patch adds these miss
From: Yann Gautier
Move the variable psci_method in .data section when EFI is not
activated and the psci driver safely access it before relocation.
Without this patch the variable is located in .bss section
and the psci probe requested before relocation corrupts the device
tree (probe is request
Enable the support of button (driver and command) on sandbox64.
Reviewed-by: Simon Glass
Signed-off-by: Philippe Reynes
---
Changelog:
v2:
- no change
configs/sandbox64_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
ind
Add a simple driver which allows use of buttons attached to GPIOs.
Reviewed-by: Simon Glass
Signed-off-by: Philippe Reynes
---
Changelog:
v2:
- remove useless default in Kconfig
- re-order include
- fix condition in button_gpio_remove
drivers/button/Kconfig | 9
drivers/button/Mak
Enable the support of button (driver and command) on sandbox.
Reviewed-by: Simon Glass
Signed-off-by: Philippe Reynes
---
Changelog:
v2:
- no change
configs/sandbox_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 5b756
Add a new uclass for button that implements two functions:
- button_get_by_label
- button_get_status
Reviewed-by: Simon Glass
Signed-off-by: Philippe Reynes
---
Changelog:
v2:
- re-order include
- use uclass_id_foreach_dev
- add comments to enum button_state_t
drivers/Kconfig|
Adds tests for the button commands.
Reviewed-by: Simon Glass
Signed-off-by: Philippe Reynes
---
Changelog:
v2:
- no change (button uclass test is added in another commit
arch/sandbox/dts/test.dts| 14 ++
test/py/tests/test_button.py | 19 +++
2 files changed, 33
Adds two buttons on sandbox so button framework may be tested.
Reviewed-by: Simon Glass
Signed-off-by: Philippe Reynes
---
Changelog:
v2:
- no change
arch/sandbox/dts/sandbox.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/d
Add a test to confirm that we can read button state
using the button-gpio driver.
Signed-off-by: Philippe Reynes
---
Changelog:
v2:
- new commit in the serie
test/dm/Makefile | 1 +
test/dm/button.c | 74
2 files changed, 75 insertions(+
Adds a command 'button' that provides the list of buttons
supported by the board, and the state of a button.
Reviewed-by: Simon Glass
Signed-off-by: Philippe Reynes
---
Changelog:
v2
- no change
cmd/Kconfig | 11
cmd/Makefile | 1 +
cmd/button.c | 86
Hi Heinrich
> Running 'ut dm' on the sandbox without -D or -d results in segmentation
> faults due to NULL pointer dereferences.
>
> Check that device pointers are non-NULL before using them.
>
> Use ut_assertnonnull() for pointers instead of ut_assert().
Tested-by: Philippe Reynes
> Signed-o
On Fri, Jun 12, 2020 at 03:41:18PM +0300, Tero Kristo wrote:
> Dump lmb status from the bdinfo command. This is useful for seeing the
> reserved memory regions from the u-boot cmdline.
>
> Signed-off-by: Tero Kristo
> ---
> cmd/bdinfo.c | 8 +++-
> include/lmb.h | 1 +
> lib/lmb.c |
On Wed, Jun 24, 2020 at 04:34:03PM +0800, Ley Foon Tan wrote:
> From: Chin Liang See
>
> This fixes CVE-2016-9841. Changes integrated from [1], with changes
> make for Uboot code base.
>
> An old inffast.c optimization turns out to not be optimal anymore
> with modern compilers, and furthermore
This commit fixes a serious issue occurring when several network
commands are run on a raspberry pi 4 board: for instance a "dhcp"
command and then one or several "tftp" commands. In this case,
packet recv callbacks were called several times on the same packets,
and send function was failing most o
The commit 57805f2270c4 ("net: bcmgenet: Don't set ID_MODE_DIS when
not using RGMII") needed to be extended for the case of using the
rgmii-rxid. The latest version of the Rasbperry Pi4 dtb files for the
5.4 now specify the rgmii-rxid.
Signed-off-by: Jason Wessel
---
drivers/net/bcmgenet.c | 3
On 17/07/2020 16:29, Tom Rini wrote:
On Fri, Jun 12, 2020 at 03:41:18PM +0300, Tero Kristo wrote:
Dump lmb status from the bdinfo command. This is useful for seeing the
reserved memory regions from the u-boot cmdline.
Signed-off-by: Tero Kristo
---
cmd/bdinfo.c | 8 +++-
include/lmb.
Hi Stefan,
On Fri, Jul 17, 2020 at 7:34 PM Stefan Roese wrote:
>
> Hi Bin,
>
> On 17.07.20 13:18, Bin Meng wrote:
> > Hi Stefan,
> >
> > On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
> >>
> >> While trying to use the U-Boot xHCI driver on the MIPS Octeon platform,
> >> which is big endian,
While trying to use the U-Boot xHCI driver on the MIPS Octeon platform,
which is big endian, I noticed that the driver is missing a few endian
conversion calls. This patch adds these missing endian conversion
calls.
Signed-off-by: Stefan Roese
Reviewed-by: Bin Meng
Cc: Bin Meng
Cc: Marek Vasut
Hi Stefan,
On Fri, Jul 17, 2020 at 10:04 PM Stefan Roese wrote:
>
> While trying to use the U-Boot xHCI driver on the MIPS Octeon platform,
> which is big endian, I noticed that the driver is missing a few endian
> conversion calls. This patch adds these missing endian conversion
> calls.
>
> Sig
At present MTRRs are mirrored to the secondary CPUs only once, as those
CPUs are started up. But U-Boot may add more MTRRs later, e.g. if it
decides that a video console must be set up.
This series enhances the x86 multi-processor support to allow MTRRs to
be updated at any time. It also updates t
This does not need to be global across all functions in this file. Pass a
parameter instead.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
Reviewed-by: Bin Meng
---
(no changes since v3)
Changes in v3:
- Update bsp_do_flight_plan() to say 'on the BSP'
arch/x86/cpu/mp_init.c | 22
Update this code to use livetree calls instead of flat-tree.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
Reviewed-by: Bin Meng
---
(no changes since v1)
arch/x86/cpu/mp_init.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86
The functions used by the flight plan are declared in the header file but
are not used in any other file.
Move the flight plan steps down to just above where it is used so that we
can make these function static.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
Reviewed-by: Bin Meng
---
At present the 'flight plan' for CPUs is passed into mp_init. But it is
always the same. Move it into the mp_init file so everything is in one
place. Also drop the SMI function since it does nothing. If we implement
SMIs, more refactoring will be needed anyway.
Signed-off-by: Simon Glass
Reviewed
This function is misnamed since it does not actually init the BSP. Also
it is convenient to adjust it to return a little more information.
Rename and update the function, to allow it to return the BSP CPU device
and number, as well as the total number of CPUs.
Signed-off-by: Simon Glass
Reviewed
These parameters are named differently from elsewhere in this file. Switch
them to avoid confusion.
Also add comments to this function.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v2)
Changes in v2:
- Add comments to explain what start
At present each CPU is given a number when it starts itself up. While this
saves a tiny amount of time by doing the device-tree read in parallel, it
is confusing that the numbering happens on the fly.
Move this code into mp_init() and do it at the start.
Signed-off-by: Simon Glass
Reviewed-by: W
Fix a typo in the command help.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
Reviewed-by: Bin Meng
---
(no changes since v1)
cmd/x86/mtrr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index 084d7315f4..5d25c5802a 100644
---
Drop some #ifdefs that are not needed or can be converted to compile-time
checks.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
Reviewed-by: Bin Meng
---
(no changes since v1)
arch/x86/cpu/cpu.c | 53 -
arch/x86/cpu/i386/cpu.c | 2 --
At present the APs (non-boot CPUs) are inited once and then parked ready
for the OS to use them. However in some cases we want to send new requests
through, such as to change MTRRs and keep them consistent across CPUs.
Change the last state of the flight plan to go into a wait loop, accepting
inst
Set this flag so we can track when it is safe to use CPUs other than the
main one.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
Reviewed-by: Bin Meng
---
(no changes since v3)
Changes in v3:
- Rename flag to GD_FLG_SMP_READY
arch/x86/cpu/mp_init.c | 1 +
1 file changed, 1 insert
Add a way to run a function on a selection of CPUs. This supports either
a single CPU, all CPUs, just the main CPU or just the 'APs', in Intel
terminology.
It works by writing into a mailbox and then waiting for the CPUs to notice
it, take action and indicate they are done.
When SMP is not yet en
Allow keeping track of whether all CPUs have been enabled yet. This allows
us to know whether other CPUs need to be considered when updating
CPU-specific settings such as MTRRs on x86.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v3)
Changes in v3:
- Rename fl
SMP should be set up in U-Boot where possible, not SPL. Disable it in SPL.
For 64-bit U-Boot we should find a way to allow SMP operations in U-Boot,
but this is somewhat more complicated. For now that is disabled too.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Use the multi-CPU calls to set the MTRR values. This still supports only
the boot CPU for now.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
Reviewed-by: Bin Meng
---
(no changes since v2)
Changes in v2:
- Drop the renamed mtrr_set_valid_() instead of mtrr_set_valid()
cmd/x86/mtr
It is convenient to iterate through the CPUs performing work on each one
and processing the result. Add a few iterator functions which handle this.
These can be used by any client code. It can call mp_run_on_cpus() on
each CPU that is returned, handling them one at a time.
Signed-off-by: Simon Gla
When the boot CPU MTRRs are updated, perform the same update on all other
CPUs so they are kept in sync.
This avoids kernel warnings about mismatched MTRRs.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v2)
Changes in v2:
- Rename function to mtrr_write_all()
At present do_mtrr() does the 'list' subcommand at the top and the rest
below. Update it to do them all in the same place so we can (in a later
patch) add parsing of the CPU number for all subcommands.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
Reviewed-by: Bin Meng
---
(no chang
On Fri, Jul 17, 2020 at 06:15:17PM +0800, Bin Meng wrote:
> Hi Tom,
>
> This PR includes the following changes for v2020.10 release:
>
> - New timer API to allow delays with a 32-bit microsecond timer
> - Add dynamic ACPI structs (DSDT/SSDT) generations to the DM core
> - x86: Enable ACPI table
Add a -c option to mtrr to allow any CPU to be updated with this command.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
Reviewed-by: Bin Meng
---
(no changes since v3)
Changes in v3:
- Mention that the CPU number is in hex
cmd/x86/mtrr.c | 18 --
1 file changed, 1
With the new MP features the CPUs are no-longer parked when the OS is run.
Fix this by calling a special function to park them, just before the OS is
started.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v5)
Changes in v5:
- Drop timing in mp_park_aps()
Chang
Update this command so it can list the MTRRs on a selected CPU. If
'-c all' is used, then all CPUs are listed.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v6:
- Rebase to x86/master
cmd/x86/mtrr.c | 22 +-
1 file changed, 21 insertions(+), 1 del
Add a description of how this module works and also some missing function
comments.
Reviewed-by: Wolfgang Wallner
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
(no changes since v3)
Changes in v3:
- Remove stray asterisk from comments
- Drop mention of cpu_map which was handled in a pr
This currently excludes the temporary memory used to start up the APs.
Add it.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v2)
Changes in v2:
- Add new patch to add AP_DEFAULT_BASE to coral's memory map
doc/board/google/chromebook_cor
On Thu, Jul 16, 2020 at 10:01:19PM +0200, Stefano Babic wrote:
> Hi Tom,
>
> please pull from u-boot-imx, thanks !
>
> The following changes since commit 497c7598c4e713eb9ad88fd7963e57b21b8b35e1:
>
> Merge branch 'master' of
> https://gitlab.denx.de/u-boot/custodians/u-boot-spi (2020-07-11 17
Some boards don't care about the ordering of ACPI code fragments. Change
the warning to a debug message.
Signed-off-by: Simon Glass
---
drivers/core/acpi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/core/acpi.c b/drivers/core/acpi.c
index cdbc2c5cf5..7fe93992b5
To enable support for the 'mtrr' command, add a way to perform MTRR
operations on selected CPUs.
This works by setting up a little 'operation' structure and sending it
around the CPUs for action.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes si
Update the mtrr command to use mp_run_on_cpus() to obtain its information.
Since the selected CPU is the boot CPU this does not change the result,
but it sets the stage for supporting other CPUs.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
Reviewed-by: Bin Meng
---
(no changes sin
On Fri, Jul 17, 2020 at 10:49 PM Simon Glass wrote:
>
> Some boards don't care about the ordering of ACPI code fragments. Change
> the warning to a debug message.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/core/acpi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by:
Dump SCMI DT bindings documentation from Linux kernel source
tree v5.8-rc1.
Signed-off-by: Etienne Carriere
---
doc/device-tree-bindings/arm/arm,scmi.txt | 197 ++
1 file changed, 197 insertions(+)
create mode 100644 doc/device-tree-bindings/arm/arm,scmi.txt
diff --git a/d
1 - 100 of 162 matches
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