[PATCH v2] distro_bootcmd: call EFI bootmgr even without having /EFI/boot

Currently, the EFI bootmgr is only called if there is a EFI binary inside the path for removable media is found, i.e. /EFI/boot/. This doesn't make sense. It is the duty of the bootmgr to find out the path and name of the EFI binary to boot. It should be called even if there is no /EFI/boot directo

[PATCH] armv8: lx2162aqds: disable non existing pcie controllers

disable non existing pcie controllers on lx2162aqds Signed-off-by: Wasim Khan --- Depends on https://patchwork.ozlabs.org/project/uboot/list/?series=199900 arch/arm/dts/fsl-lx2162a-qds.dts | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm/dts/

Re: [PATCH] spi: mvebu_a3700_spi: add support for cs-gpios

On 28.09.20 20:16, George Hilliard wrote: The device tree has a way to specify GPIO lines as chip selects. From the binding docs: So if for example the controller has 2 CS lines, and the cs-gpios property looks like this: cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>;

Re: [PATCH] drivers: serial: probe all uart devices

On 28.09.20 19:43, Vabhav Sharma wrote: From: Vabhav Sharma U-Boot DM model probe only single device at a time which is enabled and configured using device tree or platform data method. PL011 UART IP is SBSA compliant and firmware does the serial port set-up, initialization and let the kernel

[PATCH] armv8: dts: fsl-lx2162a: add dspi node into qds dts

From: Zhao Qiang Add dspi node into lx2162aqds device tree Signed-off-by: Zhao Qiang --- depends on: https://patchwork.ozlabs.org/project/uboot/patch/1599473527-21511-3-git-send-email-meenakshi.aggar...@nxp.com/ arch/arm/dts/fsl-lx2162a-qds.dts | 99

Re: [PATCH 1/3] sunxi: dts: OrangePi Zero: Add SPI aliases to make bus usable with u-boot.

(Resend from @kernel.org address) On Tue, Sep 29, 2020 at 5:02 AM Michal Suchanek wrote: > > The u-boot code relies on aliases to assign bus number. > > Signed-off-by: Michal Suchanek > --- > arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts | 2 ++ Anything U-boot specific should be done in the *-u

Re: [PATCH] net: ftgmac100: Add support for board specific PHY interface address

Hi Tom/Joe, Is this going to be applied to u-boot/next or u-boot-net? Best Regards, Thiru On 8/17/2020 5:08 PM, Thirupathaiah Annapureddy wrote: > ftgmac100 driver is using hard-coded PHY interface address of zero. > Each board can have different PHY interface address (phy_addr). > This commit m

[PATCH 1/1] sandbox: avoid duplicate backslash input

When using SDL for input the SDL key codes are first converted to Linux key codes and then to matrix entries of the cross wired keyboard. We must not map any key code to two different places on the keyboard. So comment out one backslash position. Update the rest of the file from Linux 5.7. Signe

Re: [PATCH v2 1/1] riscv: restore global data pointer in trap handler

Hi Heinrich > On 28.09.20 09:45, Rick Chen wrote: > >> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de] > >> Sent: Sunday, September 27, 2020 4:24 PM > >> To: Rick Jian-Zhi Chen(陳建志) > >> Cc: Simon Glass; Sean Anderson; Bin Meng; u-boot@lists.denx.de; Alexander > >> Graf; Abner Chang; Heinri

Re: [BUG] sandbox: './u-boot -l ' fails

On 9/29/20 1:59 AM, Heinrich Schuchardt wrote: > On 9/29/20 12:19 AM, Simon Glass wrote: >> Hi Heinrich, >> >> On Mon, 28 Sep 2020 at 15:23, Heinrich Schuchardt wrote: >>> >>> On 9/28/20 3:42 PM, Simon Glass wrote: Hi Heinrich, On Mon, 28 Sep 2020 at 07:30, Heinrich Schuchardt >>>

[PATCH 1/1] sandbox: make SDL window resizable

Without resizing the SDL window showed by ./u-boot -D -l is not legible on a high resolution screen. Start with a maximized window and allow resizing. Signed-off-by: Heinrich Schuchardt --- arch/sandbox/cpu/sdl.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/

[PATCH 1/1] video: typo Normlly

%s/Normlly/Normally/ Signed-off-by: Heinrich Schuchardt --- drivers/video/console_truetype.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c index 22b2ea7191..8205413d2a 100644 --- a/drivers/video/console_tru

Re: [BUG] sandbox: './u-boot -l ' fails

On 9/29/20 12:19 AM, Simon Glass wrote: > Hi Heinrich, > > On Mon, 28 Sep 2020 at 15:23, Heinrich Schuchardt wrote: >> >> On 9/28/20 3:42 PM, Simon Glass wrote: >>> Hi Heinrich, >>> >>> On Mon, 28 Sep 2020 at 07:30, Heinrich Schuchardt >>> wrote: On 28.09.20 15:22, Simon Glass wrote: >

[PATCH 1/1] common: redefine getc()

The sandbox is built with the SDL2 library with invokes the X11 library which in turn calls getc(). But getc() in glibc is defined as int getc(FILE *) This does not match our definition. int getc(void) The sandbox crashes when called with parameter -l. Rename our library symbol to be c

[PATCH 1/1] sandbox: add missing SDL key scan codes

Add missing SDL key scan codes, e.g. * shift, ctrl, meta, alt * brace/bracket Signed-off-by: Heinrich Schuchardt --- arch/sandbox/cpu/sdl.c | 156 +++-- 1 file changed, 89 insertions(+), 67 deletions(-) diff --git a/arch/sandbox/cpu/sdl.c b/arch/sandbox/cpu/

Re: [BUG] sandbox: './u-boot -l ' fails

Hi Heinrich, On Mon, 28 Sep 2020 at 15:23, Heinrich Schuchardt wrote: > > On 9/28/20 3:42 PM, Simon Glass wrote: > > Hi Heinrich, > > > > On Mon, 28 Sep 2020 at 07:30, Heinrich Schuchardt > > wrote: > >> > >> On 28.09.20 15:22, Simon Glass wrote: > >>> Hi Heinrich, > >>> > >>> On Mon, 28 Sep 20

Re: What is the status of IMX8MM USB support?

On Thu, Sep 24, 2020 at 10:49 PM Peng Fan wrote: > > Hi Tim, > > > Subject: What is the status of IMX8MM USB support? > > > > Greetings, > > > > I have not seen any activity to enable USB support for the IMX8MM. Is > > anyone working on this? Last I knew the holdup had to do with a > > power-domai

Re: [BUG] sandbox: './u-boot -l ' fails

On 9/28/20 3:42 PM, Simon Glass wrote: > Hi Heinrich, > > On Mon, 28 Sep 2020 at 07:30, Heinrich Schuchardt wrote: >> >> On 28.09.20 15:22, Simon Glass wrote: >>> Hi Heinrich, >>> >>> On Mon, 28 Sep 2020 at 05:31, Heinrich Schuchardt >>> wrote: On 28.09.20 06:46, Heinrich Schuchardt wr

[PATCH 1/3] sunxi: dts: OrangePi Zero: Add SPI aliases to make bus usable with u-boot.

The u-boot code relies on aliases to assign bus number. Signed-off-by: Michal Suchanek --- arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts index f19ed98

[PATCH 3/3] sunxi: Enable SPI support on Orange Pi Zero

Enable support for SPI flash and the sf command. Signed-off-by: Michal Suchanek --- configs/orangepi_zero_defconfig | 8 1 file changed, 8 insertions(+) diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig index 998c95d151..1087baece1 100644 --- a/configs/oran

[PATCH 2/3] sunxi: dts: OrangePi Zero: Enable SPI flash.

This flash is optional but new boards do have it, and on boards that don't the pins are routed to the flash pads anyway. Signed-off-by: Michal Suchanek --- arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/sun8i-h2-p

[PATCH] drivers: serial: probe all uart devices

From: Vabhav Sharma U-Boot DM model probe only single device at a time which is enabled and configured using device tree or platform data method. PL011 UART IP is SBSA compliant and firmware does the serial port set-up, initialization and let the kernel use UART port for sending and receiving ch

[PATCH] spi: mvebu_a3700_spi: add support for cs-gpios

The device tree has a way to specify GPIO lines as chip selects. From the binding docs: So if for example the controller has 2 CS lines, and the cs-gpios property looks like this: cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>; Then it should be configured so that num_chi

Re: [PATCH 1/2] efi: Add dependency on M-mode for RISC-V

On 9/28/20 2:24 PM, Heinrich Schuchardt wrote: > On 28.09.20 19:15, Sean Anderson wrote: >> On 9/28/20 12:27 PM, Heinrich Schuchardt wrote: >>> On 28.09.20 18:08, Sean Anderson wrote: >From section 2.3.7 of the UEFI specification: > RISC-V UEFI will only be executed in machine mode.

Re: [PATCH 1/2] efi: Add dependency on M-mode for RISC-V

On 28.09.20 19:15, Sean Anderson wrote: > On 9/28/20 12:27 PM, Heinrich Schuchardt wrote: >> On 28.09.20 18:08, Sean Anderson wrote: >>> >From section 2.3.7 of the UEFI specification: >>> RISC-V UEFI will only be executed in machine mode. The machine mode has the highest privilege and thi

Re: [PATCH V2] net: smc911x: Automatically Update ethaddr with MAC

On Tue, Aug 18, 2020 at 8:19 AM Adam Ford wrote: > > The ethernet controller can read the MAC from EEPROM and display it, > but if ethaddr is not set, the ethernet is still unavailable. > > This patch checks will automatically set the MAC address if it has > not already been set. > > Signed-off-by

Re: [patch 0/8] RFC: Pinebook pro EDP support

On 28/09/2020 09:41, Arnaud Patard (Rtp) wrote: > Here, it's set to 1920x1080, and I have CONFIG_DISPLAY_ROCKCHIP_HDMI > disabled, since there's no HDMI output on the PBP. Can you try with the > screen size set to the one of your panel and disable the HDMI output ? > I suspect it won't change anyth

Re: [PATCH 1/2] efi: Add dependency on M-mode for RISC-V

On 9/28/20 12:27 PM, Heinrich Schuchardt wrote: > On 28.09.20 18:08, Sean Anderson wrote: >> >From section 2.3.7 of the UEFI specification: >> >>> RISC-V UEFI will only be executed in machine mode. The machine mode has >>> the highest privilege and this mode is the only mandatory privilege level >>

Re: [PATCH 2/2] efi: Fix typo in documentation

On 28.09.20 18:08, Sean Anderson wrote: > There is an extra space. > > Signed-off-by: Sean Anderson > --- > > lib/efi_selftest/efi_selftest_set_virtual_address_map.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/lib/efi_selftest/efi_selftest_set_virtual_address_map.c >

Re: [PATCH 1/2] efi: Add dependency on M-mode for RISC-V

On 28.09.20 18:08, Sean Anderson wrote: >>From section 2.3.7 of the UEFI specification: > >> RISC-V UEFI will only be executed in machine mode. The machine mode has >> the highest privilege and this mode is the only mandatory privilege level >> for RISC-V platforms; all other privilege levels are o

[PATCH 2/2] efi: Fix typo in documentation

There is an extra space. Signed-off-by: Sean Anderson --- lib/efi_selftest/efi_selftest_set_virtual_address_map.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/efi_selftest/efi_selftest_set_virtual_address_map.c b/lib/efi_selftest/efi_selftest_set_virtual_address_map.

[PATCH 1/2] efi: Add dependency on M-mode for RISC-V

>From section 2.3.7 of the UEFI specification: > RISC-V UEFI will only be executed in machine mode. The machine mode has > the highest privilege and this mode is the only mandatory privilege level > for RISC-V platforms; all other privilege levels are optional depending > on the platform requireme

Re: [PATCH 2/2] watchdog: add watchdog behavior configuration

On Sun, Sep 27, 2020 at 06:06:38PM +0200, Michael Walle wrote: > Am 2020-09-26 14:44, schrieb Tom Rini: > [..] > > > If we want to have a hardware based watchdog in the UEFI context, we > > > need a U-Boot internal API by which we can enable and disable a > > > hardware > > > watchdog with an arbit

Re: [PATCH] MAINTAINERS: add Microchip PIT64B timer

On 23.09.2020 13:17, Claudiu Beznea wrote: > Add Microchip PIT64B timer. > > Signed-off-by: Claudiu Beznea > --- > > Hi Eugen, > > I chosed to have it under AT91 hood to not create an entry only for this > driver as there are mostly architecture/subsystem related entries in > MAINTAINERS file.

Re: [PATCH] timer: mchp-pit64b: add support for pit64b

On 22.09.2020 13:49, Claudiu Beznea - M18063 wrote: > Hi Eugen, > > On 22.09.2020 11:32, Eugen Hristev - M18282 wrote: >> On 07.09.2020 18:36, Claudiu Beznea wrote: >>> Add support for Microchip PIT64B timer. The timer is 64 bit length and >>> is used as a free running counter (in continuous mode

[PATCH v6 9/9] riscv: Update SiFive device tree for new CLINT driver

We currently do this in a u-boot specific dts, but hopefully we can get these bindings added in Linux in the future. Signed-off-by: Sean Anderson Reviewed-by: Pragnesh Patel Reviewed-by: Bin Meng --- This patch builds but has NOT been tested. (no changes since v2) Changes in v2: - Fix SiFive

[PATCH v6 8/9] riscv: Update Kendryte device tree for new CLINT driver

The interrupt controller property is removed from the clint binding because the clint is not an interrupt-controller. That is, no other devices have an interrupt which is controlled by the clint. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- (no changes since v4) Changes in v4: - Remo

[PATCH v6 7/9] riscv: clk: Add CLINT clock to kendryte clock driver

Another "virtual" clock (in the sense that it isn't configurable). This could possibly be done as a clock in the device tree, but I think this is a bit cleaner. Signed-off-by: Sean Anderson --- checkpatch still complains about this one, but I don't see any reason to break it up even further. It d

[PATCH v6 5/9] riscv: Clean up initialization in Andes PLIC

This merges the PLIC initialization code from two functions into one. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- This patch builds but has NOT been tested. (no changes since v1) arch/riscv/lib/andes_plic.c | 58 - 1 file changed, 25 insertions(+

[PATCH v6 6/9] riscv: Rework Sifive CLINT as UCLASS_TIMER driver

This converts the clint driver from the riscv-specific interface to be a DM-based UCLASS_TIMER driver. In addition, the SiFive DDR driver previously implicitly depended on the CLINT to select REGMAP. Unlike Andes's PLMT/PLIC (which AFAIK never have anything pass it a dtb), the SiFive CLINT is part

[PATCH v6 1/9] riscv: Rework riscv timer driver to only support S-mode

The riscv-timer driver currently serves as a shim for several riscv timer drivers. This is not too desirable because it bypasses the usual timer selection via the driver model. There is no easy way to specify an alternate timing driver, or have the tick rate depend on the cpu's configured frequency

[PATCH v6 2/9] timer: Add helper for drivers using timebase fallback

This function is designed to be used when a timer used to be initialized by the cpu (e.g. RISC-V timers), but now is initialized by dm_timer_init. In such a case, the timer may prefer to use the clocks and clock-frequency properties, but should be able to fall back on using the cpu's timebase-frequ

[PATCH v6 4/9] riscv: Rework Andes PLMT as a UCLASS_TIMER driver

This converts the PLMT driver from the riscv-specific timer interface to be a DM-based UCLASS_TIMER driver. The clock-frequency/clocks properties are preferred over timebase-frequency for two reasons. First, properties which affect a device should be located near its binding in the device tree. Us

[PATCH v6 3/9] timer: Add a test for timer_timebase_fallback

To test this function, sandbox CPU must set cpu_platdata.timebase_freq on bind. It also needs to expose a method to set the current cpu. I also make some most members of cpu_sandbox_ops static. On the timer side, the device tree property sandbox,timebase-frequency-fallback controls whether sandbox

[PATCH v6 0/9] riscv: Clean up timer drivers

This series cleans up the timer drivers in RISC-V and converts them to DM. This series needs to be tested! I have only tested it on QEMU and the K210. Notably, this means that the HiFive and anything Andes is completely untested. This series depends on [1]. Without that patch, build will fail for

Re: pull request of u-boot-fsl-qoriq for v2020.10

On Fri, Sep 25, 2020 at 04:48:54PM +, Priyanka Jain wrote: > Dear Tom, > > > > Please find my pull-request for u-boot-fsl-qoriq/master > https://travis-ci.org/github/p-priyanka-jain/u-boot/builds/729991334 > > Summary > Bug fixes related to PCIe, pfe, xfi, > gpio, reset,vid,env, usb on lay

Re: [PULL u-boot] Please pull u-boot-amlogic-20200928

-boot/custodians/u-boot-amlogic.git > tags/u-boot-amlogic-20200928 > > for you to fetch changes up to 02d249f99ecb7e398067d91760287c61d35fd34b: > > rng: meson: make core clock optional (2020-09-28 09:38:11 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature

Re: Pull request for UEFI sub-system for efi-2020-10-rc6

On Mon, Sep 28, 2020 at 12:30:46PM +0200, Heinrich Schuchardt wrote: > Hello Tom, > > The following changes since commit 1da91d9bcd6e5ef046c1df0d373d0df87b1e8a72: > > Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell > (2020-09-24 08:34:54 -0400) > > are available in the Git repos

Re: [BUG] sandbox: './u-boot -l ' fails

Hi Heinrich, On Mon, 28 Sep 2020 at 07:30, Heinrich Schuchardt wrote: > > On 28.09.20 15:22, Simon Glass wrote: > > Hi Heinrich, > > > > On Mon, 28 Sep 2020 at 05:31, Heinrich Schuchardt > > wrote: > >> > >> On 28.09.20 06:46, Heinrich Schuchardt wrote: > >>> Am 28. September 2020 06:24:38 MESZ

Re: [BUG] sandbox: './u-boot -l ' fails

On 28.09.20 15:22, Simon Glass wrote: > Hi Heinrich, > > On Mon, 28 Sep 2020 at 05:31, Heinrich Schuchardt wrote: >> >> On 28.09.20 06:46, Heinrich Schuchardt wrote: >>> Am 28. September 2020 06:24:38 MESZ schrieb Simon Glass : Hi Heinrich, On Sat, 19 Sep 2020 at 13:48, Heinrich Sch

Re: [BUG] sandbox: './u-boot -l ' fails

Hi Heinrich, On Mon, 28 Sep 2020 at 05:31, Heinrich Schuchardt wrote: > > On 28.09.20 06:46, Heinrich Schuchardt wrote: > > Am 28. September 2020 06:24:38 MESZ schrieb Simon Glass : > >> Hi Heinrich, > >> > >> On Sat, 19 Sep 2020 at 13:48, Heinrich Schuchardt > >> wrote: > >>> > >>> Hello Simon,

[PATCH] configs: lx2162a: Enable OPTEE support

From: Ruchika Gupta Enable support to compile OPTEE driver, access AVB TA and RPMB API's access via RPC from OPTEE for lx2162 Signed-off-by: Ruchika Gupta Signed-off-by: Gaurav Jain --- Depends-on:

Re: [BUG] sandbox: './u-boot -l ' fails

On 28.09.20 06:46, Heinrich Schuchardt wrote: > Am 28. September 2020 06:24:38 MESZ schrieb Simon Glass : >> Hi Heinrich, >> >> On Sat, 19 Sep 2020 at 13:48, Heinrich Schuchardt >> wrote: >>> >>> Hello Simon, >>> >>> when I try to run ./u-boot -l the sandbox stalls. Shouldn't it run >> out >>> of

[PATCH 3/3] configs: migrate CONFIG_BMP_16/24/32BPP to defconfigs

Done with: ./tools/moveconfig.py BMP_16BPP BMP_24BPP BMP_32BPP Signed-off-by: Patrick Delaunay --- configs/apalis_imx6_defconfig | 1 + configs/aristainetos2_defconfig| 1 + configs/aristainetos2b_defconfig | 1 + configs/aristainetos2bcsl_defco

[PATCH 2/3] configs: migrate CONFIG_VIDEO_BMP_RLE8 to defconfigs

Done with: ./tools/moveconfig.py VIDEO_BMP_RLE8 Signed-off-by: Patrick Delaunay --- README | 6 -- configs/apalis_imx6_defconfig | 1 + configs/aristainetos2_defconfig | 1 + configs/aristainetos2b_defconfig| 1 + configs/aristainet

Re: [PATCH] mtd: spi-nor: Add support for Cypress s25hl-t/s25hs-t

On 9/25/2020 7:11 PM, Pratyush Yadav wrote: > On 25/09/20 03:13PM, Pratyush Yadav wrote: >>> + if (instr->addr < erasesize) { >>> + instr_4k.addr = 0; >>> + ret = spi_nor_erase(mtd, &instr_4k); >>> + } >>> + if (!ret && instr->addr + instr->len >= mtd->size - erasesize)

Re: [PATCH] mtd: spi-nor: Add support for Cypress s25hl-t/s25hs-t

Hi Pratyush, On 9/25/2020 6:43 PM, Pratyush Yadav wrote: > Hi, > > On 24/09/20 04:43PM, tkuw584...@gmail.com wrote: >> From: Takahiro Kuwano >> >> The S25HL-T/S25HS-T family is the Cypress Semper Flash with Quad SPI. >> The datasheet can be found in https://community.cypress.com/docs/DOC-15165 >

[PATCH v2 12/12] pci: ls_pcie_g4: Add size check for config resource

resource "config" is required to have minimum 4KB space to access all config space of PCI Express EP. Signed-off-by: Wasim Khan --- Changes in V2: - Updated commit description - Fix CheckPatch issue - Change size check to 4KB to access PCIe config space Changes in V3: - No Change drivers/pci/p

[PATCH v2 10/12] arm: dts: ls1028a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan --- Changes in V2: - Updated commit description Changes in V3: - No Change arch/arm/dts/fsl-ls1028a.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/fsl-ls

[PATCH v2 09/12] arm: dts: ls1043a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan --- Changes in V2: - Updated commit description Changes in V3: - No Change arch/arm/dts/fsl-ls1043a.dtsi | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/fsl

[PATCH v2 07/12] arm: dts: ls1088a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan --- Changes in V2: - Updated commit description Changes in V3: - No Change arch/arm/dts/fsl-ls1088a.dtsi | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/fsl-

[PATCH v2 08/12] arm: dts: ls1012a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan --- Changes in V2: - Updated commit description Changes in V3: - No Change arch/arm/dts/fsl-ls1012a.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/fsl-ls1012

[PATCH v2 11/12] pci: layerscape: Add size check for config resource

resource "config" is required to have minimum 8KB space as per hardware documentation. Signed-off-by: Hou Zhiqiang Signed-off-by: Wasim Khan --- Changes in V2: - Updated commit description - Fix CheckPatch issue Changes in V3: - Fix compilation issue with ls102xa platforms drivers/pci/pcie_la

[PATCH v2 05/12] arm: dts: ls1046a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan --- Changes in V2: - Updated commit description Changes in V3: - No Change arch/arm/dts/fsl-ls1046a.dtsi | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts

[PATCH v2 06/12] arm: dts: ls2080a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan --- Changes in V2: - Updated commit description Changes in V3: - No Change arch/arm/dts/fsl-ls2080a.dtsi | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/

[PATCH v2 03/12] pci: ls_pcie_g4: Print pcie controller number starting from 1

Print pcie controller number starting from 1 Signed-off-by: Wasim Khan --- Changes in V2: - No Change Changes in V3: - No Change drivers/pci/pcie_layerscape_gen4.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pcie_layerscape_gen4.c b/drivers/pci/

[PATCH v2 02/12] pci: layerscape: Print pcie controller number starting from 1

Print pcie controller number starting from 1 Signed-off-by: Wasim Khan --- Changes in V2: - No Change Changes in V3: - No Change drivers/pci/pcie_layerscape_ep.c | 4 +++- drivers/pci/pcie_layerscape_rc.c | 6 -- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pc

[PATCH v2 00/12] Add label to pcie nodes

This patch series - Adds label to pcie nodes in dts file for NXP's layerscape SoCs - Print the pcie controller number starting from 1 to match RMs - Add checks for config resource size and fix indendation. Changes in V2: - Enable CONFIG_PCIE_LAYERSCAPE_GEN4 to make LX2160A-Rev1 work - Fix CheckPa

[PATCH v2 01/12] configs: lx2160a: Enable CONFIG_PCIE_LAYERSCAPE_GEN4

LX2160A-Rev1 uses PCIe layerscape Gen4 controller. Enable CONFIG_PCIE_LAYERSCAPE_GEN4 for lx2160a. Signed-off-by: Wasim Khan --- Changes in V2: - Added as new commit in V2 Changes in V3: - No Change configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig

[PATCH v2 04/12] arm: dts: lx2160a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan --- Changes in V2: - Updated commit description Changes in V3: - No Change arch/arm/dts/fsl-lx2160a.dtsi | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts

Pull request for UEFI sub-system for efi-2020-10-rc6

Hello Tom, The following changes since commit 1da91d9bcd6e5ef046c1df0d373d0df87b1e8a72: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell (2020-09-24 08:34:54 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git tags/efi-2020-10-

[PULL u-boot] Please pull u-boot-amlogic-20200928

ttps://gitlab.denx.de/u-boot/custodians/u-boot-marvell (2020-09-24 08:34:54 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic.git tags/u-boot-amlogic-20200928 for you to fetch changes up to 02d249f99ecb7e398067d91760287c61d35fd34b: rng: meson: make

[PATCH 1/3] configs: migrate CONFIG_VIDEO_BMP_GZIP to defconfigs

Done with: ./tools/moveconfig.py VIDEO_BMP_GZIP The 3 suspicious migration because CMD_BMP and SPLASH_SCREEN are not activated in these defconfigs: - trats_defconfig - s5pc210_universal_defconfig - trats2_defconfig Signed-off-by: Patrick Delaunay --- README | 6

Re: [PATCH v2 1/1] riscv: restore global data pointer in trap handler

On 28.09.20 09:45, Rick Chen wrote: >> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de] >> Sent: Sunday, September 27, 2020 4:24 PM >> To: Rick Jian-Zhi Chen(陳建志) >> Cc: Simon Glass; Sean Anderson; Bin Meng; u-boot@lists.denx.de; Alexander >> Graf; Abner Chang; Heinrich Schuchardt >> Subject:

Re: U-Boot issue

Hi Matteo, On 16/09/2020 00:27, Heinrich Schuchardt wrote: On 8/17/20 11:59 AM, 0x5c4r3 wrote: Hello guys, I am Matteo Peruzzi, a cyber-security expert. I am currently working on a project, creating a root of trust on RPI 2 using a TPM2 module and U-Boot. I noticed that in the latest update, u-

Re: SPI bus not probed

On Sun, Sep 27, 2020 at 10:35:30PM +0200, Michal Suchánek wrote: > Hello, > > When I enable SPI support I do not get a SPI bus. > > Config: > --- a/configs/orangepi_zero_defconfig > +++ b/configs/orangepi_zero_defconfig > @@ -11,3 +11,21 @@ CONFIG_CONSOLE_MUX=y > CONFIG_SUN8I_EMAC=y > CONFIG_US

Re: [PATCH v2 1/1] riscv: restore global data pointer in trap handler

> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de] > Sent: Sunday, September 27, 2020 4:24 PM > To: Rick Jian-Zhi Chen(陳建志) > Cc: Simon Glass; Sean Anderson; Bin Meng; u-boot@lists.denx.de; Alexander > Graf; Abner Chang; Heinrich Schuchardt > Subject: [PATCH v2 1/1] riscv: restore global data

Re: [PATCH 0/8] ARM: mach-meson: update & rework USB for GXL, GXM & AXG

On 10/09/2020 10:48, Neil Armstrong wrote: > This serie follows the recent work under Linux to rework and update support of > the USB complex in the Amlogic GXL, GXM & AXG SoCs. > > This rework follows the clean implementation for the G12A & following SoCs to > support > Host, Device & OTG functi

Re: [PATCH v2 0/4] amlogic: vim3: add support for dynamic PCIe enable

On 21/09/2020 09:34, Neil Armstrong wrote: > The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential > lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between > an USB3.0 Type A connector and a M.2 Key M slot. > The PHY driving these differential lines is shared between > the USB

Re: [PATCH] board: s400: generate unique mac address from SoC serial

On 10/09/2020 10:50, Neil Armstrong wrote: > Enable unique mac address generation from SoC serial on S400 board. > > Signed-off-by: Neil Armstrong > --- > board/amlogic/s400/s400.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/board/amlogic/s400/s400.c b/board/amlogic/s400/s400.c >

Re: [PATCH] rng: meson: make core clock optional

On 25/09/2020 09:19, Neil Armstrong wrote: > This fixes HWRNG support on Amlogic GXL, GXM, G12A, G12B & SM1 > based boards dues to the lack of the core clock in the device tree. > > It was reported breaking EFI boot in the Linux EFI stub, because the > EFI_RNG_PROTOCOL didn't check for the RNG dev