On 7/30/21 7:33 AM, AKASHI Takahiro wrote:
> On Fri, Jul 30, 2021 at 06:41:01AM +0200, Michal Simek wrote:
>>
>>
>> On 7/30/21 4:35 AM, AKASHI Takahiro wrote:
>>> On Thu, Jul 29, 2021 at 04:09:32PM +0200, Michal Simek wrote:
Hi,
On 6/10/21 2:59 PM, AKASHI Takahiro wrote:
> On
On Fri, Jul 30, 2021 at 06:41:01AM +0200, Michal Simek wrote:
>
>
> On 7/30/21 4:35 AM, AKASHI Takahiro wrote:
> > On Thu, Jul 29, 2021 at 04:09:32PM +0200, Michal Simek wrote:
> >> Hi,
> >>
> >> On 6/10/21 2:59 PM, AKASHI Takahiro wrote:
> >>> On Thu, Jun 10, 2021 at 02:31:46PM +0200, Michal Sim
HI Aswath,
> -Original Message-
> From: Aswath Govindraju
> Sent: Friday, July 30, 2021 10:41 AM
> To: Ashok Reddy Soma
> Cc: Lokesh Vutla ; Vignesh Raghavendra
> ; Kishon Vijay Abraham I ; Peng Fan
> ; Jaehoon Chung ; Simon
> Glass ; Heinrich Schuchardt ; Bin
> Meng ; Patrick Delaunay
>
Hi Jaehoon,
On 30/07/21 4:00 am, Jaehoon Chung wrote:
> Hi Aswath,
>
> On 7/29/21 11:55 PM, Aswath Govindraju wrote:
>> Add support for enumerating MMC card in a given mode using mmc rescan and
>> mmc dev commands. The speed mode is provided as the last argument in these
>> commands and is indica
Hi Ashok,
On 30/07/21 10:17 am, Ashok Reddy Soma wrote:
> Hi Aswath,
>
>> -Original Message-
>> From: Aswath Govindraju
>> Sent: Thursday, July 29, 2021 8:25 PM
>> Cc: Lokesh Vutla ; Vignesh Raghavendra
>> ; Kishon Vijay Abraham I ; Aswath
>> Govindraju ; Peng Fan ; Jaehoon
>> Chung ; Si
Dear Simon Glass,
On Mon, 19 Jul 2021 at 10:03, Simon Glass wrote:
> It is useful to have a board with unit tests enabled, to check that this
> does not break.
>
> Let's choose snow, since it is not under active development and it is
> glorious.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Jae
Dear Simon Glass,
On Mon, 19 Jul 2021 at 10:02, Simon Glass wrote:
> Some of the printf() formats do not match their types. Fix this.
>
> Reported-by: Minkyu Kang
>
I modified email address to mk7.k...@samsung.com : )
Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Fix some size_t wa
Dear Simon Glass,
On Mon, 19 Jul 2021 at 10:03, Simon Glass wrote:
> Add a bus driver for this and use it to configure the bus parameters for
> the Ethernet interface. Drop the old pre-driver-model code.
>
> Switch over to use driver model for Ethernet.
>
> Signed-off-by: Simon Glass
> Reviewed
Hi Aswath,
> -Original Message-
> From: Aswath Govindraju
> Sent: Thursday, July 29, 2021 8:25 PM
> Cc: Lokesh Vutla ; Vignesh Raghavendra
> ; Kishon Vijay Abraham I ; Aswath
> Govindraju ; Peng Fan ; Jaehoon
> Chung ; Simon Glass ;
> Heinrich Schuchardt ; Bin Meng
> ; Patrick Delaunay ;
On 7/30/21 4:35 AM, AKASHI Takahiro wrote:
> On Thu, Jul 29, 2021 at 04:09:32PM +0200, Michal Simek wrote:
>> Hi,
>>
>> On 6/10/21 2:59 PM, AKASHI Takahiro wrote:
>>> On Thu, Jun 10, 2021 at 02:31:46PM +0200, Michal Simek wrote:
On 6/10/21 12:51 PM, Heinrich Schuchardt wrote:
In DM Ethernet, the old "egiga0" name is no longer valid,
so replace these with Ethernet PHY names from device tree. Also, read
Ethernet PHY address from device tree.
Signed-off-by: Tony Dinh
---
board/Seagate/goflexhome/goflexhome.c | 57 +--
1 file changed, 45 insertio
Enable DM SATA in board file.
Signed-off-by: Tony Dinh
---
include/configs/goflexhome.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h
index a18e7869b0..2e89d72285 100644
--- a/include/configs/goflexhome.h
+++ b/include/conf
Add DM_ETH, SATA_MV and associated configs to goflexhome_defconfig.
Signed-off-by: Tony Dinh
---
configs/goflexhome_defconfig | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig
index 7207fa27e0..17adeca92f 100644
-
- Enable DM SATA and SATA MV driver
- Enable DM Ethernet.
- Use Ethernet PHY names from device tree.
- Replace the old Ethernet PHY addr lookup with a device tree parsing
lookup function.
Tony Dinh (3):
arm: kirkwood: GoFlex Home: Add DM Ethernet, remove IDE, and add DM
SATA configs
arm
On Thu, Jul 29, 2021 at 04:09:32PM +0200, Michal Simek wrote:
> Hi,
>
> On 6/10/21 2:59 PM, AKASHI Takahiro wrote:
> > On Thu, Jun 10, 2021 at 02:31:46PM +0200, Michal Simek wrote:
> >>
> >>
> >> On 6/10/21 12:51 PM, Heinrich Schuchardt wrote:
> >>> On 6/10/21 12:04 PM, Michal Simek wrote:
>
Rename these options to align the use in common/image-fit.c
else if (CONFIG_IS_ENABLED(SHA1) && strcmp(algo, "sha1") == 0)
...
else if (CONFIG_IS_ENABLED(SHA256) && strcmp(algo, "sha256") == 0)
...
else if (CONFIG_IS_ENABLED(SHA384) && strcmp(algo, "sha384")
Calculate hash using DM driver if supported.
For backward compatibility, the call to legacy
hash functions is reserved.
Signed-off-by: Chia-Wei Wang
---
common/image-fit.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/common/image-fit.c b/common/image-fit.c
Add UCLASS_HASH for hash driver development. Thus the
hash drivers (SW or HW-accelerated) can be developed
in the DM-based fashion.
Signed-off-by: Chia-Wei Wang
---
drivers/crypto/Kconfig| 2 +
drivers/crypto/Makefile | 1 +
drivers/crypto/hash/Kconfig | 5 ++
d
Add purely software-implmented drivers to support multiple
hash operations including CRC, MD5, and SHA family.
This driver is based on the new hash uclass.
Signed-off-by: Chia-Wei Wang
---
drivers/crypto/hash/Kconfig | 11 ++
drivers/crypto/hash/Makefile | 1 +
drivers/crypto/hash/hash_sw
Export the MD5 hash init/update/finish progressive APIs
for better flexibility.
Signed-off-by: Chia-Wei Wang
---
include/u-boot/md5.h | 4
lib/md5.c| 6 +++---
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/include/u-boot/md5.h b/include/u-boot/md5.h
index e09c16
This patch series proposes new UCLASS_HASH for hash devices.
Thus the hash drivers (SW or HW-accelerated) can be developed
in the DM-based fashion.
A purely software implemented hash driver is also added under
the newly added UCLASS_HASH uclass. In addition, the FIT image
hash verification is also
Select CONFIG_IMX_HAB so that the "hab_status" command
becomes available, which is useful for checking if the
chip has been correctly setup to run in secure boot mode.
Signed-off-by: Fabio Estevam
---
configs/mx7dsabresd_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/mx7ds
Hi Aswath,
On 7/29/21 11:55 PM, Aswath Govindraju wrote:
> Add support for enumerating MMC card in a given mode using mmc rescan and
> mmc dev commands. The speed mode is provided as the last argument in these
> commands and is indicated using the index from enum bus_mode in
> include/mmc.h. A spe
Hi
On 7/28/21 1:57 AM, Abder wrote:
> The previously mentioned commit didn't resolve the issue. When testing I
> made a mistake.
>
> The workaround I'm using to resolve the issue is by disabling the DDR mode
> juste before re-init happens (DDR mode will be automatically enabled later
> in the ini
Older OpenSSL and libressl versions have a slightly different API.
This require #ifdefs to support. However, we still can't support it
because the ECDSA path does not compile with these older versions.
These #ifdefs are truly a vestigial appendage.
Alternatively, the ECDSA path could be updated fo
Symbol CONFIG_SYS_ID_EEPROM is defined in include/configs/MPC8548CDS.h
but never used. Remove it here and from the whitelist.
Signed-off-by: Heinrich Schuchardt
---
include/configs/MPC8548CDS.h | 1 -
scripts/config_whitelist.txt | 1 -
2 files changed, 2 deletions(-)
diff --git a/include/confi
On Thu, Jul 29, 2021 at 06:47:02PM +0200, Marek Vasut wrote:
> On 7/29/21 5:23 PM, Tom Rini wrote:
> > On Thu, Jul 29, 2021 at 05:01:09PM +0200, Marek Vasut wrote:
> > > On 7/29/21 9:22 AM, Jan Kiszka wrote:
> > > > From: Jan Kiszka
> > > >
> > > > This reverts commit 2359fa7a87848626bcbd3399e92c
On Fri, Jul 23, 2021 at 10:17:50PM +0200, Marc Kleine-Budde wrote:
> This patch adds the possibility to pass the PIN the OpenSSL Engine
> used during signing via the environment variable MKIMAGE_SIGN_PIN.
> This follows the approach used during kernel module
> signing ("KBUILD_SIGN_PIN") or UBIFS
On Thu, Jul 22, 2021 at 10:52:05PM +0200, Marek Behún wrote:
> Some builds of squashfs-tools append version string with "-git" or
> similar. The float() conversion will fail in this case.
>
> Improve the code to only convert to float() the string before the '-'
> character.
>
> Signed-off-by: Ma
On Wed, Jul 21, 2021 at 09:56:07AM +0200, Patrick Delaunay wrote:
> With LTO activated, the buildman tools failed with an error on my
> configuration (Ubuntu 20.04, stm32mp15_trusted_defconfig) with the error:
>
> ../arm-linux-gnueabi/bin/nm:
> scripts/gen_ll_addressable_symbols.sh: file fo
On Mon, Jul 19, 2021 at 09:18:54AM -0700, Chan, Donald wrote:
> *sig_size isn't set until later so use the correct variables.
>
> Signed-off-by: Donald Chan
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Mon, Jul 19, 2021 at 04:04:44PM +0200, Thomas Perrot wrote:
> Signed-off-by: Thomas Perrot
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Mon, Jul 19, 2021 at 11:21:51AM +0200, Patrick Delaunay wrote:
> From: Patrice Chotard
>
> At early U-Boot stage, before relocation, MMU is not yet configured
> and disabled. DDR may not be configured with the correct memory
> attributes (can be configured in MT_DEVICE instead of MT_MEMORY).
On Mon, Jul 19, 2021 at 11:21:50AM +0200, Patrick Delaunay wrote:
> Align reset_cpu function with the next prototypes in
> sysreset.h or in cpu_func.h to solve compilation issue:
>
> void reset_cpu(void);
>
> This patch solves the prototype conflict when cpu_func.h is
> included.
>
> Signed-o
On Sun, Jul 18, 2021 at 02:14:24PM -0600, Simon Glass wrote:
> These are out of date. Update them and point to the existing build
> instructions to avoid duplication. Add a few that are missing.
>
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Descriptio
On Sun, Jul 18, 2021 at 02:14:23PM -0600, Simon Glass wrote:
> At present this driver assumes that ulong is 64-bits long. On 32-bit
> machines it is not. Use the 64-bit code only on 64-bit machines.
>
> This makes things work correctly on 32-bit machines.
>
> Signed-off-by: Simon Glass
Applied
On Thu, Jul 29, 2021 at 11:36:38AM +0530, Lokesh Vutla wrote:
> Hi Tom,
> Please find the PR for master branch targeted for v2021.10-rc2 tag.
> Details about the PR are updated in the tag message.
>
> Gitlab CI report:
> https://source.denx.de/u-boot/custodians/u-boot-ti/-/pipelines/8468
>
This test verifies that ECDSA_UCLASS is implemented, and that
ecdsa_verify() works as expected. The definition of "expected" is
"does not find a device, and returns -ENODEV".
The lack of a hardware-independent ECDSA implementation prevents us
from having one in the sandbox, for now.
Signed-off-by
FIT signatures can now be implemented with ECDSA. The assumption that
all FIT images are signed with RSA is no longer valid. Thus, instead
of 'select'ing RSA, only 'imply' it. This doesn't change the defaults,
but allows one to explicitly disable RSA support.
Signed-off-by: Alexandru Gagniuc
Revi
Implement the crypto_algo .verify() function for ecdsa256. Because
it backends on UCLASS_ECDSA, this change is focused on parsing the
keys from devicetree and passing this information to the specific
UCLASS driver.
Signed-off-by: Alexandru Gagniuc
Reviewed-by: Simon Glass
---
lib/Kconfig
The STM32MP ROM provides several service. One of them is the ability
to verify ecdsa256 signatures. Hook the ROM API into the ECDSA uclass.
Signed-off-by: Alexandru Gagniuc
---
arch/arm/mach-stm32mp/Kconfig| 9 +++
arch/arm/mach-stm32mp/Makefile | 1 +
arch/arm/mach-stm32mp/ecd
Define a UCLASS API for verifying ECDSA signatures. Unlike
UCLASS_MOD_EXP, which focuses strictly on modular exponentiation,
the ECDSA class focuses on verification. This is done so that it
better aligns with mach-specific implementations, such as stm32mp.
Signed-off-by: Alexandru Gagniuc
---
in
This series is based on the latest master, so no patch dependencies.
Q: Will there be a software-only implementation of ECDSA ?
A: That is the goal, so that we can have more extensive testing with
the sandbox. I don not have the bandwidth to implement it. There
has been an initial poer of so
On 7/29/21 5:23 PM, Tom Rini wrote:
On Thu, Jul 29, 2021 at 05:01:09PM +0200, Marek Vasut wrote:
On 7/29/21 9:22 AM, Jan Kiszka wrote:
From: Jan Kiszka
This reverts commit 2359fa7a87848626bcbd3399e92c657595880cd7.
While the goal is valid and there is surely unused memory in that area,
we als
From: Camelia Groza
Starting with board revision D, the MISCCSR CPLD register needs to be
configured to enable Power-on Reset for software reset commands.
Signed-off-by: Camelia Groza
---
board/freescale/t208xrdb/cpld.h | 4
board/freescale/t208xrdb/t208xrdb.c | 7 +++
2 files cha
Hi Artem
On 7/29/21 9:52 AM, Artem Panfilov wrote:
On 29.07.2021 15:59, Tom Rini wrote:
Well yes, this is part of the question now, is there enough interest in
the old version to bother with? The other part of the question is
what's being built now that wasn't being built before, and is that a
On Thu, Jul 29, 2021 at 05:01:09PM +0200, Marek Vasut wrote:
> On 7/29/21 9:22 AM, Jan Kiszka wrote:
> > From: Jan Kiszka
> >
> > This reverts commit 2359fa7a87848626bcbd3399e92c657595880cd7.
> >
> > While the goal is valid and there is surely unused memory in that area,
> > we also have a lot o
On 7/29/21 9:22 AM, Jan Kiszka wrote:
From: Jan Kiszka
This reverts commit 2359fa7a87848626bcbd3399e92c657595880cd7.
While the goal is valid and there is surely unused memory in that area,
we also have a lot of crucial things still located at the top-of-memory
while running lmb_alloc_base. Suc
Add support for enumerating MMC card in a given mode using mmc rescan and
mmc dev commands. The speed mode is provided as the last argument in these
commands and is indicated using the index from enum bus_mode in
include/mmc.h. A speed mode can be set only if it has already been enabled
in the devi
On 29.07.2021 15:59, Tom Rini wrote:
> Well yes, this is part of the question now, is there enough interest in
> the old version to bother with? The other part of the question is
> what's being built now that wasn't being built before, and is that a bug
> or a feature (a less CONFIG-dependent set
Hi,
On 6/10/21 2:59 PM, AKASHI Takahiro wrote:
> On Thu, Jun 10, 2021 at 02:31:46PM +0200, Michal Simek wrote:
>>
>>
>> On 6/10/21 12:51 PM, Heinrich Schuchardt wrote:
>>> On 6/10/21 12:04 PM, Michal Simek wrote:
Hi,
On 6/10/21 11:47 AM, Heinrich Schuchardt wrote:
> On 6/10/21 1
On Wed, Jul 28, 2021 at 07:44:37PM -0600, Simon Glass wrote:
> Hi,
>
> On Wed, 28 Jul 2021 at 17:55, Tom Rini wrote:
> >
> > On Thu, Jul 29, 2021 at 01:45:49AM +0200, Heinrich Schuchardt wrote:
> > >
> > >
> > > On 7/27/21 12:07 AM, Tom Rini wrote:
> > > > On Fri, Jul 02, 2021 at 12:36:18PM -0600
On Wed, Jul 28, 2021 at 07:27:08PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Wed, 28 Jul 2021 at 17:28, Simon Glass wrote:
> >
> > Hi again,
> >
> > On Mon, 26 Jul 2021 at 08:06, Simon Glass wrote:
> > >
> > > Hi Tom,
> > >
> > > On Sun, 25 Jul 2021 at 15:10, Tom Rini wrote:
> > > >
> > > > So
On Thu, Jul 29, 2021 at 01:40:41PM +0300, Artem Panfilov wrote:
> On 29.07.2021 02:43, Tom Rini wrote:
> >
> > Yes, true. And that's two 1-line if/else. That's a reasonable to me
> > level of effort to keep supporting older hosts. Your patch is adding in
> > 60 lines. I really do want to dig a
Hi Pratyush,
On Thu, Jul 29, 2021 at 8:08 PM Pratyush Yadav wrote:
>
> Hi Bin,
>
> On 29/07/21 07:58PM, Bin Meng wrote:
> > The smart spi_nor_adjust_hwcaps() does not respect the SPI flash's
> > hwcaps, and only looks to the controller on what can be supported.
> >
> > The flash's hwcaps needs to
On Wed, Jul 28, 2021 at 11:18 PM Sean Anderson wrote:
>
> On 7/28/21 3:25 AM, Zong Li wrote:
> > On Wed, Jul 28, 2021 at 12:29 PM Sean Anderson wrote:
> >>
> >> On 7/27/21 4:54 AM, Zong Li wrote:
> >>> Invokes the generic cache_enable interface to execute the relative
> >>> implementation in SiFi
Except ICH7 SPI, all SPI flashes connected to ICH9 / Fast SPI should
have "m25p,fast-read" property present in their DT nodes.
Signed-off-by: Bin Meng
---
arch/x86/dts/bayleybay.dts| 1 +
arch/x86/dts/baytrail_som-db5800-som-6867.dts | 1 +
arch/x86/dts/cherryhill.dts
On Thu, Jul 29, 2021 at 12:30:27PM +0200, Stefano Babic wrote:
> On 28.07.21 21:21, Tom Rini wrote:
> > On Wed, Jul 28, 2021 at 04:09:48PM -0300, Fabio Estevam wrote:
> > > Hi Stefano,
> > >
> > > On Wed, Jul 28, 2021 at 3:58 PM Stefano Babic wrote:
> > >
> > > > Its status was erroneously set i
Hi Bin,
On 29/07/21 07:58PM, Bin Meng wrote:
> The smart spi_nor_adjust_hwcaps() does not respect the SPI flash's
> hwcaps, and only looks to the controller on what can be supported.
>
> The flash's hwcaps needs to be AND'ed before checking.
>
> Fixes: 71025f013ccb ("mtd: spi-nor-core: Rework hw
On Thu, Jul 29, 2021 at 9:45 AM Simon Glass wrote:
>
> On Wed, 28 Jul 2021 at 04:29, Bin Meng wrote:
> >
> > Since commit 71025f013ccb ("mtd: spi-nor-core: Rework hwcaps selection")
> > SPI flash on Intel Crown Bay board does not work anymore.
> >
> > Disable CONFIG_SPI_FLASH_SMART_HWCAPS until a
On Thu, Jul 29, 2021 at 9:32 AM Simon Glass wrote:
>
> On Wed, 28 Jul 2021 at 04:29, Bin Meng wrote:
> >
> > Since commit 43c145b8b3ee ("spi: ich: Correct max-size bug in
> > ich_spi_adjust_size()")
> > (in v2020.04-rc1), SPI flash read no longer works with ICH SPI controller
> > in software seq
The console bootargs are already set from the kernel commandline.
On Android, this is done in yukawa at [1]
Don't set it in the bootloader since it's overridden by the kernel anyways.
[1] https://android-review.googlesource.com/c/device/amlogic/yukawa/+/1112994
Signed-off-by: Guillaume La Roque
Right now, when running fastboot we use a hard-coded "0" for the
device number.
Use the Kconfig option named CONFIG_FASTBOOT_USB_DEV instead.
Signed-off-by: Guillaume La Roque
Signed-off-by: Mattijs Korpershoek
---
include/configs/meson64_android.h | 4 ++--
1 file changed, 2 insertions(+), 2
To display the bootup logo, we read the gpt and assume that the
partition with index "2" will be the "logo" partition.
This might not always be the case, and it's very error-prone.
Load the logo partition by label instead of by index.
Signed-off-by: Guillaume La Roque
Signed-off-by: Mattijs Kor
To boot Android, we read the gpt and assume that the partition with
index "1" will be the "boot" partition.
This might not always be the case, as there are no requirements from
Android on the partition order.
However, Android does seem to use the "boot" label quite a lot on their
public documenta
both lines seem to be joined together which is not the case for the
meson64.h EXTRA_ENV_SETTINGS.
Add a newline for consistency.
Signed-off-by: Guillaume La Roque
Signed-off-by: Mattijs Korpershoek
---
include/configs/meson64_android.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
d
s/510/610/
Signed-off-by: Guillaume La Roque
Signed-off-by: Mattijs Korpershoek
---
include/configs/sei610.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/sei610.h b/include/configs/sei610.h
index 6d093161c9..9eeffdd72c 100644
--- a/include/configs/sei610.h
The Khadas VIM3 and VIM3L boards are well supported in the
Android Open Source project via the yukawa[1] platform.
Their U-Boot version, despite being public [2] is not in mainline.
These series a couple of cleanups to prepare to add mainline U-Boot support
for vim3 / vim3l so that we can boot An
The smart spi_nor_adjust_hwcaps() does not respect the SPI flash's
hwcaps, and only looks to the controller on what can be supported.
The flash's hwcaps needs to be AND'ed before checking.
Fixes: 71025f013ccb ("mtd: spi-nor-core: Rework hwcaps selection")
Signed-off-by: Bin Meng
---
drivers/mt
The DT bindings of "jedec,spi-nor" [1] defines "m25p,fast-read" property
to indicate that "fast read" opcode can be used to read data from the
chip instead of the usual "read" opcode.
If this property is not present in DT, mask out fast read in
spi_nor_init_params(). This change mirrors the same l
Enable RTC command to be able to check available.
And also enable ZynqMP RTC driver to be possible to use by default.
Here is the list when both drivers are enabled:
ZynqMP> rtc list
RTC #0 - rtc_emul
RTC #1 - rtc@ffa6
Signed-off-by: Michal Simek
---
configs/xilinx_zynqmp_virt_defconfig |
The whole driver logic is taken from Linux kernel but only set/get/reset
functions are implemented. When device is power off RTC is power out of
battery.
Signed-off-by: Michal Simek
---
MAINTAINERS | 1 +
drivers/rtc/Kconfig | 7 ++
drivers/rtc/Makefile | 1 +
driver
RTCs are using aliases for sequences. That's why enable
DM_UC_FLAG_SEQ_ALIAS for exact RTC indentification.
The same flag is used by a lot of other uclasses like mmc, pci, serial,
spi, timer, tpm, etc.
Signed-off-by: Michal Simek
---
drivers/rtc/rtc-uclass.c | 1 +
1 file changed, 1 insertion(+
Hi,
this series is correcting RTC uclass behavior to match RTC aliases to
enable RTC_EMULATION driver with ZYNQMP driver. If DT node is present
ZynqMP RTC is used. If not RTC emaulation is used.
The driver has been tested on Xilinx zcu104 also with booting to Linux to
make sure that U-Boot format
RTCs are using sequence number defined in aliases node. Date command with
DM_RTC enabled is looking for the first RTC with index 0. But when
RTC_EMULATION is enabled it gets likely most of the time index 0 even when
system has rtc0 device via aliases node and gets sequence number 0.
That's why exte
On 29.07.2021 02:43, Tom Rini wrote:
>
> Yes, true. And that's two 1-line if/else. That's a reasonable to me
> level of effort to keep supporting older hosts. Your patch is adding in
> 60 lines. I really do want to dig a bit more here.
For me, it doesn't matter how many lines of code were adde
On 28.07.21 21:21, Tom Rini wrote:
On Wed, Jul 28, 2021 at 04:09:48PM -0300, Fabio Estevam wrote:
Hi Stefano,
On Wed, Jul 28, 2021 at 3:58 PM Stefano Babic wrote:
Its status was erroneously set in patchwork - I'll pick it up.
Thanks. Peter Robinson's series to convert warp is also missing
The main reason for this to be implemented is capsule update.
Two memories are supported and tested which is MMC FAT based and QSPI
based.
For creating capsule these commands are used:
./tools/mkeficapsule --raw spl/boot.bin --index 1 capsule1.bin
./tools/mkeficapsule --raw u-boot.itb --index 2 ca
Change multi_boot() to return multiboot value and move print out of this
function and let this function to be used by other functions without
duplicating message.
Signed-off-by: Michal Simek
---
Changes in v2: None
board/xilinx/zynqmp/zynqmp.c | 6 ++
1 file changed, 2 insertions(+), 4 del
This variable is pointing to offset is qspi where u-boot image is placed.
In our case it is location of u-boot.itb file. Offset is the same as is
used by Xilinx Zynq SoC.
Signed-off-by: Michal Simek
---
Changes in v2: None
configs/xilinx_zynqmp_virt_defconfig | 1 +
1 file changed, 1 insertion
When U-Boot runs in EL2 there is no access to csu_base registers that's why
this has to be done via firmware interface to find out multi boot register
value. Till now this function is called only from SPL in EL3.
Signed-off-by: Michal Simek
---
Changes in v2: None
board/xilinx/zynqmp/zynqmp.c
Hi,
this series is just for composing dfu_alt_info string for capsule update to
work automatically based on current setup.
QSPI/MMC FAT bootmodes are handled and supported. Other bootmodes are
ignored for now.
Thanks,
Michal
Changes in v2:
- no need to free local buf variable
Michal Simek (4):
чт, 29 июл. 2021 г. в 08:22, Bin Meng :
>
> +Simon
>
> On Wed, Jul 28, 2021 at 11:22 PM Matwey V. Kornilov
> wrote:
> >
> > Hello,
> >
> > I am trying to build master for qemu-x86_64_defconfig. When I try to
> > boot u-boot.rom as the following everything works fine:
> >
> > > qemu-system-x86_64 -
On 29/07/2021 09:21, Mattijs Korpershoek wrote:
> The Khadas VIM3 and VIM3L boards are well supported in the
> Android Open Source project via the yukawa[1] platform.
>
> Their U-Boot version, despite being public [2] is not in mainline.
>
> These series a couple of cleanups to prepare to add mai
On 29/07/2021 09:21, Mattijs Korpershoek wrote:
> The console bootargs are already set from the kernel commandline.
> On Android, this is done in yukawa at [1]
>
> Don't set it in the bootloader since it's overridden by the kernel anyways.
>
> [1] https://android-review.googlesource.com/c/device/
On 29/07/2021 09:21, Mattijs Korpershoek wrote:
> To display the bootup logo, we read the gpt and assume that the
> partition with index "2" will be the "logo" partition.
>
> This might not always be the case, and it's very error-prone.
>
> Load the logo partition by label instead of by index.
>
On 29/07/2021 09:21, Mattijs Korpershoek wrote:
> To boot Android, we read the gpt and assume that the partition with
> index "1" will be the "boot" partition.
>
> This might not always be the case, as there are no requirements from
> Android on the partition order.
>
> However, Android does seem
On 29/07/2021 09:21, Mattijs Korpershoek wrote:
> Right now, when running fastboot we use a hard-coded "0" for the
> device number.
>
> Use the Kconfig option named CONFIG_FASTBOOT_USB_DEV instead.
>
> Signed-off-by: Guillaume La Roque
> Signed-off-by: Mattijs Korpershoek
> ---
> include/confi
On 29/07/2021 09:21, Mattijs Korpershoek wrote:
> both lines seem to be joined together which is not the case for the
> meson64.h EXTRA_ENV_SETTINGS.
>
> Add a newline for consistency.
>
> Signed-off-by: Guillaume La Roque
> Signed-off-by: Mattijs Korpershoek
> ---
> include/configs/meson64_an
On 29/07/2021 09:21, Mattijs Korpershoek wrote:
> s/510/610/
>
> Signed-off-by: Guillaume La Roque
> Signed-off-by: Mattijs Korpershoek
> ---
> include/configs/sei610.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/configs/sei610.h b/include/configs/sei610.h
On Thu, Jul 29, 2021 at 1:42 AM Pratyush Yadav wrote:
>
> On 28/07/21 11:56PM, Bin Meng wrote:
> > When CONFIG_SPI_FLASH_SMART_HWCAPS is on, SPI_RX_SLOW flag of the
> > SPI controller is not honored. This adds the missing logic there.
> >
> > With this patch, SPI flash read works again with ICH SP
From: Jan Kiszka
This reverts commit 2359fa7a87848626bcbd3399e92c657595880cd7.
While the goal is valid and there is surely unused memory in that area,
we also have a lot of crucial things still located at the top-of-memory
while running lmb_alloc_base. Such things are the page table (tlb_addr),
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