Dear Michal,
In message <90e6c670-9e11-beb8-bcb5-9d22ba00f...@xilinx.com> you wrote:
>
> > In case of the hard (cold) reset - is it really only a reset of the
> > CPU, or of the whole board hardware?
>
> If you look at sysreset headers you will find these levels
> 11 SYSRESET_WARM, /* R
On 8/13/21 8:11 AM, Wolfgang Denk wrote:
> Dear Michal,
>
> In message
> <82e0d7efdbd9f8c62f46c7e1a8913ffa52de5a1e.1628676265.git.michal.si...@xilinx.com>
> you wrote:
>> The commit 573a3811edc8 ("sysreset: psci: support system reset in a generic
>> way with PSCI") has added support for warm
Dear Tom,
In message <20210812162034.GY858@bill-the-cat> you wrote:
>
> > So if "the system is on fire" is one of the cases where an error
> > message should be omitted to save maybe 50 or 100 bytes of image
> > size? This sounds wrong to me.
>
> It sounds right to me because it's unlikely every
Dear Michal,
In message
<82e0d7efdbd9f8c62f46c7e1a8913ffa52de5a1e.1628676265.git.michal.si...@xilinx.com>
you wrote:
> The commit 573a3811edc8 ("sysreset: psci: support system reset in a generic
> way with PSCI") has added support for warm reset via PSCI but this hasn't
> been reflected in usage
Hi Tom,
This PR includes the following x86 changes for v2021.10:
- Enable SeaBIOS support for Crown Bay
- Update SeaBIOS build instructions in the x86 doc
- Enable CONFIG_SPI_FLASH_SMART_HWCAPS for Crown Bay
Azure results: PASS
https://dev.azure.com/bmeng/GitHub/_build/results?buildId=419&view=r
On Fri, Aug 13, 2021 at 4:20 AM Sean Anderson wrote:
>
> On 8/10/21 2:57 AM, Zong Li wrote:
> > On Tue, Aug 10, 2021 at 12:47 PM Sean Anderson wrote:
> >>
> >> On 8/3/21 12:44 AM, Zong Li wrote:
> >>> Add an interface for cache initialization. Each platform can overwrite
> >>> this weak function
On Fri, Aug 13, 2021 at 4:22 AM Sean Anderson wrote:
>
> On 8/10/21 3:04 AM, Zong Li wrote:
> > On Tue, Aug 10, 2021 at 12:55 PM Sean Anderson wrote:
> >>
> >>> Re: [PATCH v2 5/6] riscv: lib: move platform-related libraries to sperate
> >>> folder
> >>
> >> nit: separate
> >>
> >
> > Thanks for
On 8/12/21 10:25 PM, Heinrich Schuchardt wrote:
Am 13. August 2021 03:34:58 MESZ schrieb Sean Anderson :
On 8/12/21 2:25 PM, Heinrich Schuchardt wrote:
To make analyzing exceptions easier output the code that leads to it.
We already do the same on the ARM platform.
Here is an example:
=
Am 13. August 2021 03:34:58 MESZ schrieb Sean Anderson :
On 8/12/21 2:25 PM, Heinrich Schuchardt wrote:
To make analyzing exceptions easier output the code that leads to it.
We already do the same on the ARM platform.
Here is an example:
=> exception ebreak
Unhandled exception: Break
Am 13. August 2021 03:34:58 MESZ schrieb Sean Anderson :
>On 8/12/21 2:25 PM, Heinrich Schuchardt wrote:
>> To make analyzing exceptions easier output the code that leads to it.
>> We already do the same on the ARM platform.
>>
>> Here is an example:
>>
>> => exception ebreak
>> Unhandl
Here is the point, Can you take a try.
diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 8173724ecd..33c5344c70 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -591,7 +591,7 @@ static int rockchip_sfc_adjust_op_size(struct
spi_slave *mem, st
On Fri, 13 Aug 2021 01:39:36 +0200
Luka Kovacic wrote:
> The mac command is implemented to enable parsing Marvell hw_info formatted
> environments. This format is often used on Marvell Armada A37XX based
> devices to store parameters like the board serial number, factory
> MAC addresses and some
On 8/12/21 2:25 PM, Heinrich Schuchardt wrote:
To make analyzing exceptions easier output the code that leads to it.
We already do the same on the ARM platform.
Here is an example:
=> exception ebreak
Unhandled exception: Breakpoint
EPC: 8ff5d50e RA: 8ff5d62c TVAL
On Thu, Aug 12, 2021 at 04:34:01PM +0200, Christian Melki wrote:
> I was hoping that U-boot would detect BLOCK_IO devices provided by UEFI
> automatically. But I can't see anything attached under lsblk or find some
> other information about this.
I'm not sure what you intend to do here, but please
On 8/8/21 2:20 PM, Simon Glass wrote:
At present we have SPL_SERIAL and TPL_SERIAL but not piain SERIAL. This
nit: plain
I believe this typo occurs in several other patches in this series as well,
e.g. GPIO and POWER.
--Sean
works because there is a special build rule in Makefile that alwa
Add documentation for building and flashing mainline U-Boot
in the IOT-GATE-iMX8 board.
Signed-off-by: Fabio Estevam
---
doc/board/compulab/imx8mm-cl-iot-gate.rst | 84 +++
doc/board/index.rst | 1 +
2 files changed, 85 insertions(+)
create mode 100644
When trying to build the imx8mm-cl-iot-gate_defconfig target there is a
build error due to the missing 'fip.bin'.
To make the build process more consistent with other i.MX8M boards,
do not build fip.bin by default.
Signed-off-by: Fabio Estevam
---
arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi | 1
On Fri, Aug 13, 2021 at 5:46 AM Simon Glass wrote:
>
> On Tue, 3 Aug 2021 at 21:53, Bin Meng wrote:
> >
> > Now that the spi-nor fix has been made in u-boot/master via:
> >
> > commit 87e7219f9c6a ("mtd: spi-nor: Respect flash's hwcaps in
> > spi_nor_adjust_hwcaps()")
> >
> > enable CONFIG_SPI
On Fri, Aug 13, 2021 at 5:46 AM Simon Glass wrote:
>
> On Tue, 3 Aug 2021 at 06:50, Bin Meng wrote:
> >
> > Update SeaBIOS build instructions using exact command that involves
> > "make olddefconfig", and mention SeaBIOS release 1.14.0 has been
> > used for testing.
> >
> > Signed-off-by: Bin Men
On Fri, Aug 13, 2021 at 5:46 AM Simon Glass wrote:
>
> On Tue, 3 Aug 2021 at 06:50, Bin Meng wrote:
> >
> > Enable SeaBIOS support for any kernel that requires legacy BIOS
> > services.
> >
> > Signed-off-by: Bin Meng
> > ---
> >
> > configs/crownbay_defconfig | 1 +
> > 1 file changed, 1 inser
On 8/12/21 11:49 PM, Simon Glass wrote:
+Heinrich Schuchardt too
On Thu, 12 Aug 2021 at 08:35, Christian Melki
wrote:
I was hoping that U-boot would detect BLOCK_IO devices provided by UEFI
automatically. But I can't see anything attached under lsblk or find
some other information about this.
Add initial support for the ESPRESSOBin-Ultra board from Globalscale
Technologies, Inc.
The board is based on the 64-bit dual-core Marvell Armada 3720 SoC.
Peripherals:
- 5 Gigabit Ethernet ports (WAN has PoE, up to 30W, Topaz 6341 switch)
- RTC clock (PCF8563)
- USB 3.0 port
- USB 2.0 port
-
The mac command is implemented to enable parsing Marvell hw_info formatted
environments. This format is often used on Marvell Armada A37XX based
devices to store parameters like the board serial number, factory
MAC addresses and some other information.
These parameters are usually written to the fl
Add the loadaddr U-Boot environment variable, as this is available in
the stock Marvell U-Boot by default on Marvell Armada A37XX platforms.
Signed-off-by: Luka Kovacic
Cc: Luka Perkov
Cc: Robert Marko
---
include/configs/mvebu_armada-37xx.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/
This patchset adds initial support for the ESPRESSOBin-Ultra board from
Globalscale Technologies, Inc.
The board is based on the 64-bit dual-core Marvell Armada 3720 SoC.
Peripherals:
- 5 Gigabit Ethernet ports (WAN has PoE, up to 30W, Topaz 6341 switch)
- RTC clock (PCF8563)
- USB 3.0 port
-
On Thu, Aug 12, 2021 at 09:15:14PM +0800, Jon Lin wrote:
> From: Chris Morgan
>
> This patch adds support for the Rockchip serial flash controller
> found on the PX30 SoC. It should work for versions 3-5 of the SFC
> IP, however I am only able to test it on v3.
>
> This is adapted from the WIP S
Avoid applying the "fix" introduced by commit 5557eec01cbf ("env: Fix
invalid env handling in env_init()") to the environment "nowhere".
This is necessary as that commit, by setting the return value of
env_init() to -ENOENT if gd->env_valid is ENV_INVALID, forces that
function to reset gd->env_val
On 8/11/21 6:34 AM, Tom Rini wrote:
> Rework the default environment a bit to not use non-standard
> CONFIG_ENV_... names and similar one-off CONFIG names.
>
> Cc: Jaehoon Chung
> Signed-off-by: Tom Rini
Reviewed-by: Jaehoon Chung
Best Regars,
Jaehoon Chung
> ---
> include/configs/exynos4-c
On 8/9/21 3:20 AM, Simon Glass wrote:
> Rename these options so that CONFIG_IS_ENABLED can be used with them.
>
> Signed-off-by: Simon Glass
Reviewed-by: Jaehoon Chung
Best Regars,
Jaehoon Chung
> ---
On 8/7/21 10:24 PM, Simon Glass wrote:
> Use the livetree API for this driver.
>
> Signed-off-by: Simon Glass
Reviewed-by: Jaehoon Chung
Best Regars,
Jaehoon Chung
> ---
>
> drivers/mmc/ftsdc010_mci.c | 22 +++---
> 1 file changed, 7 insertions(+), 15 deletions(-)
>
> diff
On 8/9/21 3:20 AM, Simon Glass wrote:
> Move the power/ rules into drivers/power to avoid clutter in the Makefile
> and drivers/Makefile files.
>
> We must select SPL_POWER if SPL_POWER_DOMAIN is used, since the two are
> currently independent and boards do not necessarily enable SPL_POWER.
>
> A
On 8/9/21 3:20 AM, Simon Glass wrote:
> This converts the following to Kconfig:
>CONFIG_POWER_I2C
>CONFIG_POWER_LEGACY
>
> They are handled at the same time due to a dependency between them.
> Update the Makefile rule to use legacy power only in U-Boot proper.
>
> Unfortunately a separate
On 8/9/21 3:20 AM, Simon Glass wrote:
> This option is used in pre-driver model code and much of it has never
> been converted to driver model.
>
> We want to add a new option to enable power support, so we can use a
> simple rule in the Makefile. Rename this one, which is really about
> a particu
On 8/9/21 3:20 AM, Simon Glass wrote:
> Add a proper Kconfig option for SPL so we can remove the hack in some of
> the board config files.
>
> This involves adding CONFIG_SPL_DM_PMIC to some of the configs as well
> as updateing the Makefile rule for PMIC_RK8XX to exclude SPL.
>
> Signed-off-by:
+Heinrich Schuchardt too
On Thu, 12 Aug 2021 at 08:35, Christian Melki
wrote:
>
> I was hoping that U-boot would detect BLOCK_IO devices provided by UEFI
> automatically. But I can't see anything attached under lsblk or find
> some other information about this.
> For example, Barebox works just f
On Thursday 12 August 2021 15:46:23 Simon Glass wrote:
> Hi Pali,
>
> On Tue, 3 Aug 2021 at 08:29, Pali Rohár wrote:
> >
> > Transfer termination tries to instruct sender that transfer was terminated.
> >
> > Print error message and indicates aborted transfer in return value.
> >
> > Signed-off-b
Hi,
On Thu, 5 Aug 2021 at 19:07, Bin Meng wrote:
>
> On Fri, Aug 6, 2021 at 3:40 AM Tom Rini wrote:
> >
> > On Thu, Aug 05, 2021 at 01:20:51PM -0600, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Wed, 4 Aug 2021 at 12:49, Tom Rini wrote:
> > > >
> > > > On Wed, Aug 04, 2021 at 10:09:55AM -060
On Tue, 10 Aug 2021 at 01:30, Michal Simek wrote:
>
> Add kernel-doc description for fdt_fixup_memory_banks() because it is
> implemented in one specific way and this information should be available
> for others to decide if their SoC conforms to it.
> If you don't want U-Boot to update your memor
On Tue, 10 Aug 2021 at 07:50, Michal Simek wrote:
>
> The first name is taken from command name that's why shouldn't be listed in
> help. And commands shouldn't be listed with <> which means value but value
> itself is command name.
> Also add description for commands to make it clear what it does
On Tue, 3 Aug 2021 at 21:53, Bin Meng wrote:
>
> Now that the spi-nor fix has been made in u-boot/master via:
>
> commit 87e7219f9c6a ("mtd: spi-nor: Respect flash's hwcaps in
> spi_nor_adjust_hwcaps()")
>
> enable CONFIG_SPI_FLASH_SMART_HWCAPS on Intel Crown Bay again.
>
> Signed-off-by: Bin M
On Tue, 3 Aug 2021 at 08:29, Pali Rohár wrote:
>
> Currently it is possible to cancel loadx and loady commands by pressing
> CTRL+X (CAN character) at least 3 times quickly.
>
> All other U-Boot commands, including loadb and loads can be cancelled by
> CTRL+C. So allow it also in xyz-modem code us
On Tue, 3 Aug 2021 at 06:50, Bin Meng wrote:
>
> Update SeaBIOS build instructions using exact command that involves
> "make olddefconfig", and mention SeaBIOS release 1.14.0 has been
> used for testing.
>
> Signed-off-by: Bin Meng
> ---
>
> doc/arch/x86.rst | 21 -
> 1 file
Hi Pali,
On Tue, 3 Aug 2021 at 08:29, Pali Rohár wrote:
>
> Transfer termination tries to instruct sender that transfer was terminated.
>
> Print error message and indicates aborted transfer in return value.
>
> Signed-off-by: Pali Rohár
> ---
> cmd/load.c | 14 +-
> 1 file changed,
On Tue, 3 Aug 2021 at 08:29, Pali Rohár wrote:
>
> In x-modem protocol EOF is not an error state at the end of file.
>
> Signed-off-by: Pali Rohár
> ---
> common/xyzModem.c | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Simon Glass
On Tue, 3 Aug 2021 at 06:50, Bin Meng wrote:
>
> Enable SeaBIOS support for any kernel that requires legacy BIOS
> services.
>
> Signed-off-by: Bin Meng
> ---
>
> configs/crownbay_defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Simon Glass
On Thu, Aug 12, 2021 at 10:22:07PM +0100, Andre Przywara wrote:
> On Thu, 12 Aug 2021 13:49:30 -0400
> Tom Rini wrote:
>
> Hi Tom,
>
> > As I try and migrate more CONFIG symbols to be Kconfig only, I see that
> > sunxi is still using the legacy I2C drivers. Is there something
> > specific holdi
Change maintainer to me. Prafulla is no longer active in U-Boot community.
Signed-off-by: Tony Dinh
---
board/Marvell/sheevaplug/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/Marvell/sheevaplug/MAINTAINERS
b/board/Marvell/sheevaplug/MAINTAINERS
index 2b0
On Thu, 12 Aug 2021 13:49:30 -0400
Tom Rini wrote:
Hi Tom,
> As I try and migrate more CONFIG symbols to be Kconfig only, I see that
> sunxi is still using the legacy I2C drivers. Is there something
> specific holding up migration? Thanks!
Do you mean a DM_I2C conversion, or just moving those
On 8/10/21 3:04 AM, Zong Li wrote:
On Tue, Aug 10, 2021 at 12:55 PM Sean Anderson wrote:
Re: [PATCH v2 5/6] riscv: lib: move platform-related libraries to sperate folder
nit: separate
Thanks for catching it. Fix it in the next version.
On 8/3/21 12:44 AM, Zong Li wrote:
Put the platfo
On 8/10/21 2:57 AM, Zong Li wrote:
On Tue, Aug 10, 2021 at 12:47 PM Sean Anderson wrote:
On 8/3/21 12:44 AM, Zong Li wrote:
Add an interface for cache initialization. Each platform can overwrite
this weak function by their own implementation, such as sifive_cache in
this patch.
Can we call
To make analyzing exceptions easier output the code that leads to it.
We already do the same on the ARM platform.
Here is an example:
=> exception ebreak
Unhandled exception: Breakpoint
EPC: 8ff5d50e RA: 8ff5d62c TVAL:
EPC: 8020b50e RA: 000
Hey,
As I try and migrate more CONFIG symbols to be Kconfig only, I see that
sunxi is still using the legacy I2C drivers. Is there something
specific holding up migration? Thanks!
--
Tom
signature.asc
Description: PGP signature
On Thu, Aug 12, 2021 at 04:21:29PM +0200, Wolfgang Denk wrote:
> Dear Tom,
>
> In message <20210812134833.GU858@bill-the-cat> you wrote:
> >
> > Alright, lets take a look at what kind of area of the code we're talking
> > about. uclass_get is a pretty fundamental thing. If that fails, your
> >
Hi Michal,
On Wed, Aug 11, 2021 at 1:04 PM Michal Simek wrote:
>
> The commit 573a3811edc8 ("sysreset: psci: support system reset in a generic
> way with PSCI") has added support for warm reset via PSCI but this hasn't
> been reflected in usage message and user has to look at the code how to run
On 8/12/21 5:28 PM, Pierre-Clément Tosi wrote:
Avoid applying the "fix" introduced by commit 5557eec01cbf ("env: Fix
invalid env handling in env_init()") to the environment "nowhere".
This is necessary as that commit, by setting the return value of
env_init() to -ENOENT if gd->env_valid is ENV_I
Ported from https://github.com/ARM-software/optimized-routines
These files are included from this repository, including the latest
git commit ID:
string/aarch64/memcpy.S: afd6244a1f8d
string/aarch64/memset.S: e823e3abf5f8
string/asmdefs.h: e823e3abf5f8
Note that memmove is also handled by the mem
On an NXP LX2160 based platform it has been noticed, that the currently
implemented memset/memcpy functions for aarch64 are suboptimal.
Especially the memset() for clearing the NXP MC firmware memory is very
expensive (time-wise).
This patchset now adds the optimized functions ported from this
r
This patch enables the use of the optimized memset(), memmove() &
memcpy() versions recently added on ARM64.
Signed-off-by: Stefan Roese
---
(no changes since v3)
Changes in v3:
- Add memmove as well
arch/arm/Kconfig | 38 +--
arch/arm/include/asm
The optimized memset uses the dc opcode, which causes problems when the
cache is disabled. This patch adds a check if the cache is disabled and
uses a very simple memset implementation in this case. Otherwise the
optimized version is used.
Signed-off-by: Stefan Roese
---
Changes in v4:
- Use ma
I was hoping that U-boot would detect BLOCK_IO devices provided by UEFI
automatically. But I can't see anything attached under lsblk or find
some other information about this.
For example, Barebox works just fine on both Virtualbox and real
hardware in this regard.
Barebox does not have an emm
Dear Tom,
In message <20210812134833.GU858@bill-the-cat> you wrote:
>
> Alright, lets take a look at what kind of area of the code we're talking
> about. uclass_get is a pretty fundamental thing. If that fails, your
> system is on fire. Things are massively corrupt.
Full agreement here.
> So
Hi Tom,
On Thu, 12 Aug 2021 at 07:48, Tom Rini wrote:
>
> On Thu, Aug 12, 2021 at 08:40:21AM +0200, Wolfgang Denk wrote:
> > Dear Tom,
> >
> > In message <20210811124318.GT858@bill-the-cat> you wrote:
> > >
> > > > This argument fits on all types or effors: they are supposed to
> > > > never ever
Make px30 SFC clock configurable
Signed-off-by: Jon Lin
Reviewed-by: Jagan Teki
Reviewed-by: Kever Yang
Reviewed-by: Philipp Tomsich
---
(no changes since v7)
Changes in v7:
- Make px30 SFC clock configurable
drivers/clk/rockchip/clk_px30.c | 32
1 file cha
From: Chris Morgan
This patch adds support for setting the correct pin configuration
for the Rockchip Serial Flash Controller found on the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
Reviewed-by: Kever Yang
---
(no changes since v1)
arch/arm/mach-rockchip/px30/px30.c | 64
From: Chris Morgan
Add the serial flash controller to the devicetree for the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
Reviewed-by: Kever Yang
---
(no changes since v5)
Changes in v5:
- px30 use "rockchip, sfc" as compatible id
arch/arm/dts/px30.dtsi | 38 ++
From: Chris Morgan
The Odroid Go Advance uses a Rockchip Serial Flash Controller with an
XT25F128B SPI NOR flash chip. This adds support for both. Note that
while both the controller and chip support quad mode, only two lines
are connected to the chip. Changing the pinctrl to bus2 and setting tx
Changes in v8:
- Move speed operation to set_speed logic
- Use read_poll
- Change debug to dev_dbg
- Simply exec_op dma logic
- Change to use tx single line to make a good compatible
- Change spiflash dts node
Changes in v7:
- Make sfc-use-dma configurable
- Make px30 SFC clock configurable
Ch
From: Chris Morgan
This patch adds support for the Rockchip serial flash controller
found on the PX30 SoC. It should work for versions 3-5 of the SFC
IP, however I am only able to test it on v3.
This is adapted from the WIP SPI-MEM driver for the SFC on mainline
Linux. Note that the main differe
From: Chris Morgan
Add the serial flash controller to the devicetree for the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
Reviewed-by: Kever Yang
---
(no changes since v5)
Changes in v5:
- px30 use "rockchip, sfc" as compatible id
arch/arm/dts/px30.dtsi | 38 ++
From: Chris Morgan
This patch adds support for setting the correct pin configuration
for the Rockchip Serial Flash Controller found on the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
Reviewed-by: Kever Yang
---
(no changes since v1)
arch/arm/mach-rockchip/px30/px30.c | 64
From: Chris Morgan
This patch adds support for the Rockchip serial flash controller
found on the PX30 SoC. It should work for versions 3-5 of the SFC
IP, however I am only able to test it on v3.
This is adapted from the WIP SPI-MEM driver for the SFC on mainline
Linux. Note that the main differe
From: Tom Rini
The current stable release of LLVM is 12, update to that. While at it,
fix that we had not correctly upgraded to LLVM 11 previously.
Signed-off-by: Tom Rini
Signed-off-by: Jon Lin
---
(no changes since v1)
.azure-pipelines.yml| 4 ++--
.gitlab-ci.yml | 4 ++--
t
Changes in v8:
- Move speed operation to set_speed logic
- Use read_poll
- Change debug to dev_dbg
- Simply exec_op dma logic
- Change to use tx single line to make a good compatible
- Change spiflash dts node
Changes in v7:
- Make sfc-use-dma configurable
- Make px30 SFC clock configurable
Ch
On Thu, Aug 12, 2021 at 08:40:21AM +0200, Wolfgang Denk wrote:
> Dear Tom,
>
> In message <20210811124318.GT858@bill-the-cat> you wrote:
> >
> > > This argument fits on all types or effors: they are supposed to
> > > never ever happen - at least in theory; in reality they do, and more
> > > often
Make px30 SFC clock configurable
Signed-off-by: Jon Lin
Reviewed-by: Jagan Teki
---
(no changes since v7)
Changes in v7:
- Make px30 SFC clock configurable
drivers/clk/rockchip/clk_px30.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/clk/rockch
From: Chris Morgan
Add the serial flash controller to the devicetree for the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v5)
Changes in v5:
- px30 use "rockchip, sfc" as compatible id
arch/arm/dts/px30.dtsi | 38 ++
1 f
From: Chris Morgan
This patch adds support for the Rockchip serial flash controller
found on the PX30 SoC. It should work for versions 3-5 of the SFC
IP, however I am only able to test it on v3.
This is adapted from the WIP SPI-MEM driver for the SFC on mainline
Linux. Note that the main differe
From: Chris Morgan
The Odroid Go Advance uses a Rockchip Serial Flash Controller with an
XT25F128B SPI NOR flash chip. This adds support for both. Note that
while both the controller and chip support quad mode, only two lines
are connected to the chip. Changing the pinctrl to bus2 and setting tx
From: Chris Morgan
This patch adds support for setting the correct pin configuration
for the Rockchip Serial Flash Controller found on the PX30.
Signed-off-by: Chris Morgan
Signed-off-by: Jon Lin
---
(no changes since v1)
arch/arm/mach-rockchip/px30/px30.c | 64 +
Changes in v8:
- Move speed operation to set_speed logic
- Use read_poll
- Change debug to dev_dbg
- Simply exec_op dma logic
- Change to use tx single line to make a good compatible
Changes in v7:
- Make sfc-use-dma configurable
- Make px30 SFC clock configurable
Changes in v6:
- Fix dma tran
Is this structure describing some hardware register layout? Or some
interface with the firmware?
Then please use explicit types: uint8_t, uint16_t, ...
I want to use uint8_t,but checkpatch.pl showed “Prefer kernel type 'u8' over
'uint8_t'”.So I don't know which is better.
Thanks.
___
The efidebug command is needed to manage UEFI boot options.
To display them fully CONFIG_HEXDUMP is needed.
Signed-off-by: Heinrich Schuchardt
---
cmd/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index ffef3cc76c..30a291fa3b 100644
--- a/cmd/Kconfig
+++
On Fri, Jul 30, 2021 at 08:22:18AM +0200, Michal Simek wrote:
>
>
> On 7/30/21 7:33 AM, AKASHI Takahiro wrote:
> > On Fri, Jul 30, 2021 at 06:41:01AM +0200, Michal Simek wrote:
> >>
> >>
> >> On 7/30/21 4:35 AM, AKASHI Takahiro wrote:
> >>> On Thu, Jul 29, 2021 at 04:09:32PM +0200, Michal Simek w
Hi Stefan,
On Wed, Aug 11, 2021 at 11:15 PM Stefan Roese wrote:
>
> Hi Tony,
>
> a few nits...
>
> On 06.08.21 06:49, Tony Dinh wrote:
> > Add fdt network helper functions common/fdt_support_net.c
> >
> > Signed-off-by: Tony Dinh
> > ---
> >
> > common/fdt_support_net.c | 46 ++
The 64 bit rk33xx chips don't have the ROCKCHIP_USB2_PHY IP so
drop the configs as they were likely copied over from other
boards during enablement.
Signed-off-by: Peter Robinson
---
configs/lion-rk3368_defconfig | 1 -
configs/nanopc-t4-rk3399_defconfig| 1 -
configs/roc-pc-
Dear "Z.Q. Hou",
In message
you wrote:
>
> > Adding or - like here, even worse - removing just a few lines of data
> > definitions is certainly nothing where you can claim a copyright on.
> >
>
> It's NXP's legal check policy.
Maybe, but that's not how copyright works. You cannot claim an
On 11.08.21 16:28, Stefan Roese wrote:
On 11.08.21 16:25, Tom Rini wrote:
On Wed, Aug 11, 2021 at 04:02:39PM +0200, Stefan Roese wrote:
On an NXP LX2160 based platform it has been noticed, that the currently
implemented memset/memcpy functions for aarch64 are suboptimal.
Especially the memset(
following changes since commit 3e5b62f7740530e6f3a2e989f4c361a9d52b:
configs: Resync with savedefconfig (2021-08-10 15:08:46 -0400)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-rockchip.git
tags/u-boot-rockchip-20210812
for you to fetch changes up to
Hello Wolfgang,
> -Original Message-
> From: Wolfgang Denk
> Sent: 2021年8月12日 15:24
> To: Z.Q. Hou
> Cc: u-boot@lists.denx.de; Priyanka Jain ;
> ykau...@suse.de; feste...@gmail.com; tr...@konsulko.com
> Subject: Re: [PATCH] configs: Layerscape: Remove the 'fdt_addr' env
>
> Dear Zhiqian
Dear Zhiqiang Hou,
In message <20210812072846.39305-1-zhiqiang@nxp.com> you wrote:
> diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h
> index 2711f651d7..c7fdd10cf5 100644
> --- a/include/configs/ls1012afrdm.h
> +++ b/include/configs/ls1012afrdm.h
> @@ -1,6 +1,7 @@
>
From: Hou Zhiqiang
On Layerscape platforms, the DTB is loaded from boot filesystem,
per the fdt_addr description in doc/README.distro, it must be
removed.
And on many platforms, like ls1046a, ls1088a, ls2088a and lx216xa,
the 'fdt_addr' pointed address is not accessible.
And with the current EFI
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