Hi Pali,
On 12/13/21 11:27, Pali Rohár wrote:
On Monday 13 December 2021 08:41:30 Stefan Roese wrote:
Hi Pali,
On 12/12/21 12:23, Pali Rohár wrote:
On Thursday 11 November 2021 16:35:39 Marek Behún wrote:
From: Marek Behún
Hello Stefan,
we have some more fixes for PCI (mvebu and aardvark)
út 14. 12. 2021 v 13:42 odesílatel Michal Simek
napsal:
>
> SGMII configuration depends on proper GT setting that's why when node has
> phys property call PSGTR driver to configure it properly.
>
> Signed-off-by: Michal Simek
> ---
>
> Changes in v2:
> - Handle also cases where phy reference does
Add PSGTR driver for Xilinx ZynqMP.
The most of configurations are taken from Linux kernel psgtr driver.
USB3.0 and SGMII configurations are tested on SOM. In SGMII case also
IOU_SLCR reg is updated to get proper clock setup and signal detection
configuration.
Signed-off-by: Michal Simek
---
Ch
SGMII configuration depends on proper GT setting that's why when node has
phys property call PSGTR driver to configure it properly.
Signed-off-by: Michal Simek
---
Changes in v3:
- Separate phy init from phy power on (IP reset has to be between)
Changes in v2:
- Handle also cases where phy refe
On 11/29/21 16:12, Sean Anderson wrote:
On 11/24/21 9:52 AM, Michal Simek wrote:
On 11/22/21 22:53, Sean Anderson wrote:
On 11/18/21 7:30 AM, Michal Simek wrote:
Add PSGTR driver for Xilinx ZynqMP.
The most of configurations are taken from Linux kernel psgtr driver.
USB3.0 and SGMII
On 11/11/21 16:35, Marek Behún wrote:
From: Marek Behún
Since u32 takes up 4 bytes, we need to divide the number of u32s by 4
for cfgcache.
Signed-off-by: Marek Behún
Applied to u-boot-marvell/master
Thanks,
Stefan
---
drivers/pci/pci-aardvark.c | 2 +-
drivers/pci/pci_mvebu.c| 2
On 11/11/21 16:35, Marek Behún wrote:
From: Pali Rohár
The PCI Bridge which represents mvebu PCIe Root Port has Expansion ROM
Base Address register at offset 0x30 but its meaning is different that
of PCI's Expansion ROM BAR register, although the address format of
the register is the same.
In
Hi Tom,
please pull these late Marvell MVEBU related fixes:
- Marvell/PCI: Fix size of the configuration cache and disallow ROM BAR
setting in pci_mvebu.c & pci-aardvark.c (Pali & Marek)
--
Hi Campbell,
campbell@snapit.group wrote on Wed, 15 Dec 2021 14:53:43 +1300:
> Previously, if root had more than 256 files or otherwise needed to be an
> ldir, sqfsls would emit the error 'Inode not found.' which was caused by
> code in sqfs_search_dir assuming it was a regular directory inode.
>
On Tue, Dec 14, 2021 at 05:55:39PM +, Andre Przywara wrote:
> The Juno Arm development board is an open, vendor-neutral, Armv8-A
> development platform.
> Add documentation that briefly outlines the hardware, and describes
> building and installation of U-Boot.
>
> Signed-off-by: Andre Przywar
On Tue, Dec 14, 2021 at 05:55:38PM +, Andre Przywara wrote:
> From: Peter Hoyes
>
> Create a new documentation section for Arm Ltd boards with a sub-page
> for the FVP VExpress64 system.
>
> Signed-off-by: Peter Hoyes
> [Andre: remove Juno stub]
> Signed-off-by: Andre Przywara
Reviewed-by
Hi Stanley,
On 15/12/21 03:57, Stanley Chu wrote:
Add basic support for the Nuvoton NPCM845 BMC.
Signed-off-by: Stanley Chu
---
arch/arm/Kconfig | 9 +
arch/arm/Makefile | 1 +
arch/arm/include/asm/arch-npcm8xx/clock.h | 164
On Wed, Dec 15, 2021 at 10:57:59AM +0800, Stanley Chu wrote:
> Add a common device tree for all Nuvoton NPCM8xx BMCs and a board
> specific device tree for the NPCM845(Arbel) evaluation board.
>
> Signed-off-by: Stanley Chu
Which Linux kernel release are these from? Thanks!
--
Tom
signatur
Tom Rini 於 2021年12月15日 週三 下午9:07寫道：
>
> On Wed, Dec 15, 2021 at 10:57:59AM +0800, Stanley Chu wrote:
>
> > Add a common device tree for all Nuvoton NPCM8xx BMCs and a board
> > specific device tree for the NPCM845(Arbel) evaluation board.
> >
> > Signed-off-by: Stanley Chu
>
> Which Linux kernel
On Wed, Dec 15, 2021 at 09:32:00PM +0800, 盛 wrote:
> Tom Rini 於 2021年12月15日 週三 下午9:07寫道：
> >
> > On Wed, Dec 15, 2021 at 10:57:59AM +0800, Stanley Chu wrote:
> >
> > > Add a common device tree for all Nuvoton NPCM8xx BMCs and a board
> > > specific device tree for the NPCM845(Arbel) evaluation boa
On Wed, Dec 15, 2021 at 11:58:34AM +0100, Stefan Roese wrote:
> Hi Tom,
>
> please pull these late Marvell MVEBU related fixes:
>
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
From: Michael Liebert
Currently only the PADCFG registers of the main domain are unlocked.
Also unlock PADCFG registers of MCU domain, so MCU pin muxing can be configured
by u-boot or Linux.
Signed-off-by: Michael Liebert
Tested-by: Christian Gmeiner
---
arch/arm/mach-k3/am642_init.c
From: Michael Liebert
Currently only the PADCFG registers of the main domain are unlocked.
Also unlock PADCFG registers of MCU domain, so MCU pin muxing can be configured
by u-boot or Linux.
Signed-off-by: Michael Liebert
Tested-by: Christian Gmeiner
---
arch/arm/mach-k3/am642_init.c
Hi Andre,
On 2021-12-14 17:55, Andre Przywara wrote:
The Juno Arm development board is an open, vendor-neutral, Armv8-A
development platform.
Add documentation that briefly outlines the hardware, and describes
building and installation of U-Boot.
Signed-off-by: Andre Przywara
---
doc/board/a
> OK. The device trees at least need to be in linux-next. That will
> cover a lot of baseline review that needs to happen before we take it
> in.
>
Hi Tom!
If my understanding is correct device tree's should be accepted into
Linux-next before U-Boot, or am I wrong.
Also Stanley, I don't think
On Wed, Dec 15, 2021 at 10:32:21AM -0500, Jesse Taube wrote:
> > OK. The device trees at least need to be in linux-next. That will
> > cover a lot of baseline review that needs to happen before we take it
> > in.
> >
> Hi Tom!
> If my understanding is correct device tree's should be accepted int
Hi all,
I'm reviewing a clock driver [1], and the submitter has deviated from
the defines used by Linux. For example, where Linux might have
#define CLOCK_FOOBAR 5
his driver might have
#define CLK_FUBAR 6
Which means that both the device tree source and the resulting device
On Wed, Dec 15, 2021 at 10:53:26AM -0500, Sean Anderson wrote:
>
> Hi all,
>
> I'm reviewing a clock driver [1], and the submitter has deviated from
> the defines used by Linux. For example, where Linux might have
>
> #define CLOCK_FOOBAR 5
>
> his driver might have
>
> #define CLK
Hi Weijie,
(sorry for the delayed response)
On 12/3/21 5:06 AM, Weijie Gao wrote:
On Fri, 2021-11-26 at 12:44 -0500, Sean Anderson wrote:
On 11/18/21 8:35 PM, Weijie Gao wrote:
This patch adds a clock driver for MediaTek MT7621 SoC.
This driver provides clock gate control as well as getting c
Hi Tom,
Here come a small set of patches for v2022.01 for the RaspberryPi.
You can find the passing tests here:
https://source.denx.de/u-boot/custodians/u-boot-raspberrypi/-/pipelines/10047
It's the same commit ID as the tag, although it's not the same test-run.
Regards,
Matthias
---
The fol
This makes some minor clean ups to the clock build infrastructure.
Sean Anderson (3):
clk: Alphabetize Makefile
clk: Alphabetize Kconfig
clk: Rename ICS8N3QV01 to CLK_ICS8N3QV01
configs/gazerbeam_defconfig | 2 +-
drivers/clk/Kconfig | 182 ++--
d
This alphabetizes the clock makefile by Kconfig option. This will help
prevent merge conflicts.
Signed-off-by: Sean Anderson
---
drivers/clk/Makefile | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 711ae5bc
This driver was missing a clock prefix. Add one.
Signed-off-by: Sean Anderson
---
configs/gazerbeam_defconfig | 2 +-
drivers/clk/Kconfig | 2 +-
drivers/clk/Makefile| 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/configs/gazerbeam_defconfig b/configs/gaze
This alphabetizes the Kconfig for the clock subsystem. This will help
people find their clocks, and help prevent merge conflicts.
Signed-off-by: Sean Anderson
---
drivers/clk/Kconfig | 182 ++--
1 file changed, 91 insertions(+), 91 deletions(-)
diff --gi
This xlate function just performs some checking. We can do this in
request() instead and use the default xlate.
Signed-off-by: Sean Anderson
---
Changes in v2:
- Fix build error caused by mismatched function name
drivers/clk/clk-cdce9xx.c | 12 +++-
1 file changed, 3 insertions(+), 9 d
This adds an entry in MAINTAINERS for the cdce9xx driver, since it was not
added when the driver was submitted. This will help future submitters
figure out who to CC.
Signed-off-by: Sean Anderson
---
Tero, if you don't want to maintain this I'll resubmit this patch with the
orphaned status. Alter
On 12/3/21 3:18 AM, Tero Kristo wrote:
On 01/12/2021 22:10, Sean Anderson wrote:
On 12/1/21 3:08 PM, Tom Rini wrote:
On Wed, Dec 01, 2021 at 02:44:02PM -0500, Sean Anderson wrote:
This xlate function just performs some checking. We can do this in
request() instead and use the default xlate.
On Sun, 14 Feb 2021 03:17:18 +0100, Giulio Benetti wrote:
> Improve clk_get_rate() @return documentation that otherwise is a bit
> ambiguous. At the moment I expect to return 0 as error since the return
> type is 'ulong', instead the function really returns negative value in
> case the correspondin
On Fri, 19 Nov 2021 15:12:06 +0100, Patrick Delaunay wrote:
> Reorder include files in the U-Boot expected order:
>
> the common.h header should always be first,
> followed by other headers in order,
> then headers with directories,
> then local files.
>
> [...]
Applied, thanks!
[1/2] clk: cosm
Hi Tom,
The following changes since commit ade37460a944aed36ae6ee634c4d4a9a22690461:
Prepare v2022.01-rc3 (2021-11-29 11:16:03 -0500)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-clk.git tags/clk-2022.01-rc3
for you to fetch changes up to 560e1e0
On 12/14/21 9:57 PM, Stanley Chu wrote:
Add basic support for the Nuvoton NPCM845 BMC.
Signed-off-by: Stanley Chu
---
arch/arm/Kconfig | 9 +
arch/arm/Makefile | 1 +
arch/arm/include/asm/arch-npcm8xx/clock.h | 164
arch/arm
On 12/14/21 9:57 PM, Stanley Chu wrote:
Add clock controller driver for NPCM845
Signed-off-by: Stanley Chu
---
drivers/clk/Makefile | 1 +
drivers/clk/nuvoton/Makefile | 1 +
drivers/clk/nuvoton/clk_npcm8xx.c | 213 ++
inclu
Previously, sqfs_search_dir assumed that the root inode has the highest
available ID. Unfortunately, this fails on appended images (those where
you run mksquashfs multiple times) since the inodes there are arranged
differently to those on a regular image.
The squashfs format does contain a refere
On Wed, Dec 15, 2021 at 05:27:39PM +0100, Matthias Brugger wrote:
> Hi Tom,
>
> Here come a small set of patches for v2022.01 for the RaspberryPi.
>
> You can find the passing tests here:
> https://source.denx.de/u-boot/custodians/u-boot-raspberrypi/-/pipelines/10047
>
> It's the same commit ID
On Wed, Dec 15, 2021 at 02:41:19PM -0500, Sean Anderson wrote:
> Hi Tom,
>
> The following changes since commit ade37460a944aed36ae6ee634c4d4a9a22690461:
>
> Prepare v2022.01-rc3 (2021-11-29 11:16:03 -0500)
>
> are available in the Git repository at:
>
> https://source.denx.de/u-boot/custo
Hello,
I can't figure out why timer_init() is needed in board_init_r function for
spl. (common/spl/spl.c)
Why is it called there? I'm not sure if I have to provide a version for our
board..
Any comment will be appreciated. Thank you.
Chan Kim
Hello,
For example In file arch/arm/cpu/arm1136/mx31/timer.c, I see
#include
#include
#include
#include
There are 13 files named common.h files and 4405 files doing '#include
'.
I can guess what file it is including but can't figure out exactly how the
default include path (-I cflag ) i
On Wed, Dec 1, 2021 at 11:40 PM Roman Bacik wrote:
>
> IPROC qspi driver supports both BSPI and MSPI modes.
>
> Signed-off-by: Rayagonda Kokatanur
> Signed-off-by: Bharat Gooty
> Acked-by: Rayagonda Kokatanur
>
> Signed-off-by: Roman Bacik
> ---
>
> Changes in v9:
> - merge bspi_set_4byte_mode
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