On Thursday 26 January 2023 20:58:10 Tony Dinh wrote:
> Hi Pali,
>
> On Thu, Jan 26, 2023 at 1:26 AM Stefan Roese wrote:
> >
> > On 1/19/23 04:03, Tony Dinh wrote:
> > > This syncs drivers/ddr/marvell/a38x/ with the master branch of repository
> > >
On Thu, 2023-01-26 at 13:28 -0500, Tom Rini wrote:
> On Thu, Jan 19, 2023 at 09:38:17AM +0100, Sjoerd Simons wrote:
> >
> > As this is likely to impact more devices bump the default max
> > regions to 16 so there is a bit more slack.
> >
> > Signed-off-by: Sjoerd Simons
>
> I prefer to use:
>
On 26/01/2023 19.17, Christophe Leroy wrote:
> When doing a build with C=2, the following failure is encountered on
> several files:
>
> CHECK arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c: note: in included file (through
>
On 1/19/23 10:46, Michal Simek wrote:
U-Boot is composing u-boot.bin from u-boot-nodtb.bin with appended
dts/dt.dtb. It means U-Boot doesn't have DTB inside. When REMAKE_ELF is
enabled make will also create u-boot.elf which is recreated from
u-boot.bin. Below is build output for mini
On 1/25/23 17:41, Ovidiu Panait wrote:
Make spl_start_uboot() available only if CONFIG_SPL_OS_BOOT is enabled,
since it is only used for falcon mode.
Signed-off-by: Ovidiu Panait
---
Changes in v2:
New patch.
arch/microblaze/cpu/spl.c | 4 +---
1 file changed, 1 insertion(+), 3
This reverts commit f5315dd6290a588434e4f79bfd2886bb7df9210d.
[why]
TPL is not mandatory for not all Rockchip SoCs, some SoCs like
RK356x, and RK3588 still use mainline u-boot without TPL as
their ddr init programs are accessed via binaries provided by
Rockchip instead of ddr source code.
Enable TIMER as default option for all Tegra devices and
enable TEGRA_TIMER for TEGRA_ARMV7_COMMON and TEGRA210.
Additionally enable SPL_TIMER if build as SPL part and
drop deprecated configs from common header.
Signed-off-by: Svyatoslav Ryhel
Reviewed-by: Simon Glass
---
arch/arm/Kconfig
Enum clock_osc_freq was designed to use only with T20.
This patch remaps it to use additional frequencies, added in
T30+ SoC while maintaining backwards compatibility with T20.
Tested-by: Andreas Westman Dorcsak # ASUS TF600T T30
Tested-by: Jonas Schwöbel # Surface RT T30
Tested-by: Robert
Add timer support for T20/T30/T114/T124 and T210 based devices.
Driver is based on DM, has device tree support and can be
used on SPL and early boot stage.
Arm64 Tegra (apart T210) according to comment in tegra-common.h use
architected timer.
Tested-by: Andreas Westman Dorcsak # ASUS TF600T T30
- ARM: tegra: remap clock_osc_freq for all Tegra family
Enum clock_osc_freq was designed to use only with T20.
This patch remaps it to use additional frequencies, added in
T30+ SoC while maintaining backwards compatibility with T20.
- drivers: timer: add timer driver for ARMv7 based Tegra devices
On Wed, 25 Jan 2023 at 19:19, Heinrich Schuchardt
wrote:
>
> HandleProtocol() is deprecrated. According to the UEFI specification it
> should be implemented as a call to OpenProtocolInterface() with a hard
> coded agent handle. This implies that we would have to call
> CloseProtocolInterfaces()
Hi all,
On Thu, Jan 26, 2023 at 3:38 PM Tony Dinh wrote:
>
> Hi all,
>
> I ran some tests today (Pogo V4 and NSA310S boards) with the latest
> master branch and saw the same behavior we've seen before. The boards
> hung, and the serial console was silent after kwboot finished
> transferring the
Hello Heinrich,
On 27.01.23 01:42, Heinrich Schuchardt wrote:
> These symbols are not specific to Keymile boards.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> board/keymile/km83xx/Kconfig | 6 --
> cmd/Kconfig | 8
> 2 files changed, 8 insertions(+), 6
as Tom suggested get rid of CFG_EXTRA_ENV_SETTINGS and
enable CONFIG_ENV_SOURCE_FILE and use text file
board/socrates/socrates.env
which contains the default environment. While at it,
cleanup the default Environment.
Signed-off-by: Heiko Schocher
Suggested-by: Tom Rini
---
This patch is a
Hello Tom,
On 26.01.23 15:30, Tom Rini wrote:
> On Thu, Jan 26, 2023 at 08:46:21AM +0100, Heiko Schocher wrote:
>
>> as Tom suggested get rid of CFG_EXTRA_ENV_SETTINGS and
>> enable CONFIG_ENV_SOURCE_FILE and use text file
>>
>> board/socrates/socrates.env
>>
>> which contains the default
Hi Pali,
On Thu, Jan 26, 2023 at 1:26 AM Stefan Roese wrote:
>
> On 1/19/23 04:03, Tony Dinh wrote:
> > This syncs drivers/ddr/marvell/a38x/ with the master branch of repository
> > https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
> >
> > up to the commit "mv_ddr: a3700: Use the
Good point. U-Boot has instruments to get clk_m rate on time of timer
probe. I need some time to prepare this modification for testing.
пт, 27 січ. 2023 р. о 00:12 Dmitry Osipenko пише:
>
> 27.01.2023 01:00, Dmitry Osipenko пишет:
> > 26.01.2023 20:54, Thierry Reding пишет:
> >> On Thu, Jan 26,
Hi Tom,
https://source.denx.de/u-boot/custodians/u-boot-dm/-/pipelines/14897
The following changes since commit 27e0fb3b0823519aea2d42cd8bde20234dd87cef:
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
(2023-01-26 10:24:13 -0500)
are available in the Git repository at:
Hi Safae,
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> test_abootimg is extended to include the testing of boot images
> version 4. For this, boot.img and vendor_boot.img have been
> generated using mkbootimg tool with setting the header
> version to 4.
>
> This tests:
> - Getting the
Hi Rasmus,
On Tue, 9 Aug 2022 at 05:53, Rasmus Villemoes
wrote:
>
> Currently, U-Boot doesn't parse a "max-speed" DT property in a phy's
> DT node. That property is a standard binding which should be honoured,
> and in linux that is done by the core phy code via a call to an
>
Hi Safae,
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> This adds support for Bootconfig feature.
> - The bootconfig feature replaces the androidboot.*
> kernel cmdline options.
>
> This was adapted from downstream [1] commit : 7af0a0506d4d ("cuttlefish:
> support bootconfig
Hi Safae,
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> In version 3 and 4 of boot image header, the vendor specific
vendor-spefcific
> command line are located in vendor boot image. Thus, using
use the
> extra command line to add those cmd to bootargs.
>
> Signed-off-by: Safae
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> Since boot image header version 3 and 4 introduced vendor boot image,
> the following functions are used to fill the generic android
> structure : andr_image_data:
>
> - android_boot_image_v3_v4_parse_hdr()
> -
Hi Safae,
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> Move from andr_boot_img_hdr_v0 to andr_image_data
> structure to prepare for boot image header
> version 3 and 4.
>
> Signed-off-by: Safae Ouajih
> ---
> boot/image-android.c | 127 ---
>
On Thu, 26 Jan 2023 at 06:44, Mark Kettenis wrote:
>
> There are no SPL/TPL variants of CONFIG_CLK_EXYNOS and
> CONFIG_ARCH_APPLE, so switch from CONFIG_IS_ENABLED to
> IS_ENABLED.
>
> Signed-off-by: Mark Kettenis
> ---
> drivers/serial/serial_s5p.c | 8
> 1 file changed, 4
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> android_image_get_dtbo() is used to get recovery DTBO via abootimg cmd.
> This is not supported in boot image header v3 and v4. Thus, we print an
> error message when v1,v2 header version are not used.
>
> Signed-off-by: Safae Ouajih
> ---
>
Hi Eddie,
On Thu, 26 Jan 2023 at 07:41, Eddie James wrote:
>
>
> On 1/25/23 19:41, Simon Glass wrote:
> > Hi Eddie,
> >
> > On Wed, 25 Jan 2023 at 10:18, Eddie James wrote:
> >> Add a configuration option to measure the boot through the bootm
> >> function. Add the measurement state to the
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> andr_image_data structure is used as a global representation of
> boot image header structure. This new structure is introduced to
> support all boot header versions : v0,v1.v2.v3.v4 and will be used
> to support v3 and v4 while maitaining
Hi Safae,
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> This enables the support for boot image header version 3 and 4
> using abootimg command.
>
> In order to use version 3 or 4:
>
> 1- Vendor boot image address should be given to abootimg cmd.
>
> abootimg addr $1
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> Version 3 and 4 of boot image header introduced
> vendor boot ramdisk: Please check include/android_image.h
> for details.
>
> The ramdisk is now split into a generic ramdisk in boot image
> and a vendor ramdisk in vendor boot image.
>
>
Hi Safae,
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> This is done to prepare for boot image version 3 and 4 support.
>
> Signed-off-by: Safae Ouajih
> ---
> boot/bootm.c | 8 +++
> boot/image-android.c | 54
>
Hi Safae,
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> This adds support for boot image version 3 and 4
> in android_image_get_dtb_img_addr(). Since the dtb
> is now included in vendor_boot image instead of
> boot image, the dtb address should be extracted from
> vendor_boot image when
Hi Safae,
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> Print an error message when the boot image header version is
> greater than 2 as this is not supported for v3 and v4.
But why is is not supported? Please add this here.
>
> Signed-off-by: Safae Ouajih
> ---
>
Hi Safae,
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> Content print is not supported for version 3 and 4 of boot image header.
> Thus, only print that content when v2 is used.
>
> Update android_print_contents() to print an error message
> when trying to print boot image header version
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> This adds support for v3/v4 boot image format by adding
> the following structures:
>
> - andr_boot_img_hdr_v3 : describes boot image header
> - andr_vendor_img_hdr : describes vendor boot image header
>
> These definitions have been copied
Hi Safae,
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> Android introduced boot header version 3 or 4.
> The header structure change with version 3 and 4 to support
> the new updates such as:
> - Introducing Vendor boot image: with a vendor ramdisk
> - Bootconfig feature (v4)
>
> To
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> With the new vendor boot image introduced in versions 3 and 4
> of boot image header, the header check must be done for both boot
> image and vendor boot image. Thus, android_image_check_header() is
> being replaced by
On Thu, 26 Jan 2023 at 09:05, Safae Ouajih wrote:
>
> Vendor boot image is introduced in boot image header
> version 3 and 4. Please check [1] for more details.
>
> To prepare for boot image v3/v4 support, allow the abootimg command
> to store the vendor_boot image address.
>
> Full support for
These symbols are not specific to Keymile boards.
Signed-off-by: Heinrich Schuchardt
---
board/keymile/km83xx/Kconfig | 6 --
cmd/Kconfig | 8
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/board/keymile/km83xx/Kconfig b/board/keymile/km83xx/Kconfig
* Use 16 digits on 64 bit systems.
* Use 64 bit patterns on 64 bit systems.
* Expect the sign bit in bit 63 on 64 bit systems.
* Adjust the formatting of a constant.
Signed-off-by: Heinrich Schuchardt
---
cmd/mem.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
On 2023-01-26 23:16, Jonas Karlman wrote:
> Hi Jagan,
> On 2023-01-26 20:17, Jagan Teki wrote:
>> On Fri, 27 Jan 2023 at 00:33, Jonas Karlman wrote:
>>>
>>> On 2023-01-26 19:26, Jagan Teki wrote:
Hi Simon,
On Thu, 26 Jan 2023 at 23:34, Simon Glass wrote:
>
> Hi Jagan,
Hi all,
I ran some tests today (Pogo V4 and NSA310S boards) with the latest
master branch and saw the same behavior we've seen before. The boards
hung, and the serial console was silent after kwboot finished
transferring the u-boot image. I'm running with this DTSI patch below
(to enable
Hi Jagan,
On 2023-01-26 20:17, Jagan Teki wrote:
> On Fri, 27 Jan 2023 at 00:33, Jonas Karlman wrote:
>>
>> On 2023-01-26 19:26, Jagan Teki wrote:
>>> Hi Simon,
>>>
>>> On Thu, 26 Jan 2023 at 23:34, Simon Glass wrote:
Hi Jagan,
On Thu, 26 Jan 2023 at 10:42, Jagan Teki wrote:
Using your existing patches and generating a v7 to fix the T210 boards sounds
like the right approach to me.
Tom
-Original Message-
From: Svyatoslav Ryhel
Sent: Thursday, January 26, 2023 11:11 AM
To: Thierry Reding
Cc: Tom Warren ; Rayagonda Kokatanur
; Marek Vasut ; Maxim Schwalm
On Thu, Jan 26, 2023 at 02:29:53PM -0700, Simon Glass wrote:
> Hi Tom,
>
> On Thu, 26 Jan 2023 at 11:16, Tom Rini wrote:
> >
> > On Thu, Jan 26, 2023 at 11:04:21AM -0700, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Thu, 26 Jan 2023 at 10:21, Tom Rini wrote:
> > > >
> > > > On Tue, Jan 24,
Hi Tom,
On Thu, 26 Jan 2023 at 11:16, Tom Rini wrote:
>
> On Thu, Jan 26, 2023 at 11:04:21AM -0700, Simon Glass wrote:
> > Hi Tom,
> >
> > On Thu, 26 Jan 2023 at 10:21, Tom Rini wrote:
> > >
> > > On Tue, Jan 24, 2023 at 06:36:00PM -0700, Simon Glass wrote:
> > > > Hi Troy,
> > > >
> > > > On
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux
6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/clk/renesas/r8a7796-cpg-mssr.c | 33 +-
1 file changed, 17 insertions(+), 16 deletions(-)
diff
From: Hai Pham
Introduce new helper function to handle clock type that uses
clk_div_table struct. Based vaguely on Linux code. Make use
of clk_div_table in RPC clocks handling.
The E3/D3 RPCSRC need to be handled differently and will be addressed in
subsequence patch.
Based on Linux commit
From: Hai Pham
R-Car V3U has a CPG different enough to not be a generic Gen3 CPG but
similar enough to reuse code. Introduce a new CPG library, factor out
the SD clock and RPC clock handling and hook them to the generic Gen3
CPG driver so we have an equal state.
Based on Linux commit [1] and
On Thu, Jan 26, 2023 at 11:22:30PM +0530, Jagan Teki wrote:
> Hi Tom,
>
> Please pull this PR.
>
> Summary:
> - fix return code of sf command (Heinrich)
> - fix register reads in STIG Mode (Dhruva)
> - Infineon s25fs256t support (Takahiro)
>
> CI:
>
Replace custom local structure with matching one from clk-provider.h .
No functional change.
Signed-off-by: Marek Vasut
---
drivers/clk/renesas/clk-rcar-gen2.c | 6 +-
drivers/clk/renesas/clk-rcar-gen3.c | 8 ++--
2 files changed, 3 insertions(+), 11 deletions(-)
diff --git
From: Hai Pham
Still uses 0x3 for now, adjust the offset value to TMPPORT3 accordingly
Reviewed-by: Marek Vasut
Signed-off-by: Hai Pham
Signed-off-by: Marek Vasut
---
drivers/mmc/renesas-sdhi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/renesas-sdhi.c
From: Hai Pham
It is unnecessary, so clean it up.
Reviewed-by: Marek Vasut
Signed-off-by: Hai Pham
Signed-off-by: Marek Vasut # update commit
message, mention ES3.0
---
drivers/mmc/renesas-sdhi.c | 16
1 file changed, 16 deletions(-)
diff --git
From: Hai Pham
Early ES revisions of M3-W SoCs requires 4-tap HS400. Reflect the status
from datasheet.
Reviewed-by: Marek Vasut
Signed-off-by: Hai Pham
Signed-off-by: Marek Vasut
---
drivers/mmc/renesas-sdhi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
From: Hai Pham
Support R8A77961 M3-W+ SoC.
Reviewed-by: Marek Vasut
Signed-off-by: Hai Pham
Signed-off-by: Marek Vasut
---
drivers/mmc/renesas-sdhi.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index
From: Hai Pham
Adjust HS400 calibration tables based on Linux settings
Reviewed-by: Marek Vasut
Signed-off-by: Hai Pham
Signed-off-by: Marek Vasut
---
drivers/mmc/renesas-sdhi.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git
From: Hai Pham
V3M handles SDnH differently than other Gen3 SoCs, so let's add a
separate entry for that. This will allow better SDnH handling in the
future.
Based on Linux commit 627151b4966f ("mmc: renesas_sdhi: Flag
non-standard SDnH handling for V3M") by Wolfram Sang
Signed-off-by: Hai
From: Hai Pham
The RPCSRC clock divider on R-Car D3 is very similar to the one on R-Car
E3, but uses a different pre-divider for the PLL0 parent. Add a new
macro to describe it, reusing the existing clock type for R-Car E3.
As both E3/D3 RPCSRC clock divider are different from the rest of
From: Hai Pham
On R-Car V3M (AKA R8A77970), the SD0CKCR is laid out differently than on
the other R-Car gen3 SoCs. Hence, new clock types are introduced
respectively.
Based on Linux commit 381081ffc294 ("clk: renesas: r8a77970: Add SD0H/SD0
clocks for SDHI") by Sergei Shtylyov
Signed-off-by:
The current set of U-Boot upstream R-Car Gen3 DTs all contain generic
"renesas,etheravb-rcar-gen3" compatible strings, drop the SoC specific
compatible string support from U-Boot to reduce size and duplication.
Signed-off-by: Marek Vasut
---
drivers/net/ravb.c | 6 --
1 file changed, 6
From: Hai Pham
Further filter out HS400 support on certain SoCs.
Since M3-W r1.2 does not support HS400, drop the calibration table and
rename the one for M3-W r1.3 to r8a7796_rev13_calib_table
Reviewed-by: Marek Vasut
Signed-off-by: Hai Pham
Signed-off-by: Marek Vasut
---
Add trivial reset driver extension to the CPG clock driver. The change
turns current CPG UCLASS_CLK driver instance into an UCLASS_NOP proxy
driver, which in turn binds both generic rcar3_clk UCLASS_CLK clock
driver as well as generic rcar_rst UCLASS_RESET reset driver to the
CPG DT node. This
Drop 'core' parameter from gen3_clk_get_rate64_pll_mul_reg() function
as it is only used in debug print. No functional change except for the
debug print, which is disabled by default.
Signed-off-by: Marek Vasut
---
drivers/clk/renesas/clk-rcar-gen3.c | 27 +--
1 file
From: Hai Pham
Since commit f7b4e4c0949f ("clk: renesas: Synchronize R-Car Gen3 tables
with Linux 5.12"), the custom macros for RPC clocks were dropped.
Use pre-defined offset for RPC clocks, same as what Linux does, instead
of retrieving it from the macros
Reviewed-by: Marek Vasut
From: Hai Pham
Add support for the R-Car M3-W+ (R8A77961) SoC.
R-Car M3-W+ is very similar to R-Car M3-W (R8A77960), which allows for
both SoCs to share a driver.
Based on Linux commit 2ba738d56db4 ("clk: renesas: r8a7796: Add R8A77961
CPG/MSSR support")
Reviewed-by: Marek Vasut
Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/clk/renesas/r8a774b1-cpg-mssr.c | 25 ++---
1 file changed, 14 insertions(+), 11 deletions(-)
diff --git
From: Hai Pham
Rename CONFIG_CLK_R8A7796 for R-Car M3-W (R8A77960) to
CONFIG_CLK_R8A77960, to avoid confusion with R-Car M3-W+ (R8A77961),
which will use CONFIG_CLK_R8A77961.
Based on Linux commit 92d1ebae9abf ("clk: renesas: Rename CLK_R8A7796
to CLK_R8A77960")
Reviewed-by: Marek Vasut
Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/clk/renesas/r8a774c0-cpg-mssr.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git
Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/clk/renesas/r8a774a1-cpg-mssr.c | 32 +
1 file changed, 17 insertions(+), 15 deletions(-)
diff --git
Synchronize R-Car R8A779A0 V3U clock tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Rename CLK_TYPE_R8A779A0_ to CLK_TYPE_GEN4_ to match the new
clock tables. Add CLK_TYPE_GEN4_SD, CLK_TYPE_GEN4_RPC and
CLK_TYPE_GEN4_RPCD2 macros and handling into Gen3 CPG core.
Synchronize R-Car R8A77980 V3H clock tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/clk/renesas/r8a77980-cpg-mssr.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git
Synchronize R-Car R8A77990 E3 clock tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/clk/renesas/r8a77990-cpg-mssr.c | 23 +--
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git
Synchronize R-Car R8A77995 D3 clock tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/clk/renesas/r8a77995-cpg-mssr.c | 17 +
drivers/clk/renesas/rcar-gen3-cpg.h | 5 +
2 files changed, 14 insertions(+), 8
Synchronize R-Car R8A77965 M3-N clock tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/clk/renesas/r8a77965-cpg-mssr.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git
Synchronize R-Car R8A7795 H3 clock tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/clk/renesas/r8a7795-cpg-mssr.c | 28 +-
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git
From: Hai Pham
Currently, SDnH is handled together with SDn. This caused lots of
problems, so we want SDnH as a separate clock. Introduce a dummy SDnH
type here which creates a fixed-factor clock with factor 1. That allows
us to convert the per-SoC CPG drivers while keeping the old behaviour
for
Synchronize R-Car R8A77990 E3 PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/pinctrl/renesas/pfc-r8a77990.c | 606 +++--
1 file changed, 266 insertions(+), 340 deletions(-)
diff --git
Synchronize R-Car R8A7794 E2 PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/pinctrl/renesas/pfc-r8a7794.c | 671 +-
1 file changed, 455 insertions(+), 216 deletions(-)
diff --git
Synchronize R-Car R8A7795 H3 PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Note that the Kconfig option name has been updated to match the
Linux kernel Kconfig option name, from PINCTRL_PFC_R8A7795 to
PINCTRL_PFC_R8A77951 .
Signed-off-by: Marek Vasut
---
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Note that the Kconfig option name has been updated to match the
Linux kernel Kconfig option name, from PINCTRL_PFC_R8A7796 to
PINCTRL_PFC_R8A77960 .
Also note that a
Synchronize R-Car R8A77970 V3M PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/pinctrl/renesas/pfc-r8a77970.c | 478 +
1 file changed, 252 insertions(+), 226 deletions(-)
diff --git
Synchronize R-Car R8A77995 D3 PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/pinctrl/renesas/pfc-r8a77995.c | 746 ++---
1 file changed, 531 insertions(+), 215 deletions(-)
diff --git
Synchronize R-Car R8A779A0 V3U PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/pinctrl/renesas/pfc-r8a779a0.c | 400 +
1 file changed, 145 insertions(+), 255 deletions(-)
diff --git
Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/pinctrl/renesas/pfc-r8a7791.c | 820 +-
1 file changed, 529 insertions(+), 291 deletions(-)
diff --git
Synchronize R-Car R8A7790 H2 PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/pinctrl/renesas/pfc-r8a7790.c | 961 +++---
1 file changed, 555 insertions(+), 406 deletions(-)
diff --git
Synchronize R-Car R8A77965 M3-N PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/pinctrl/renesas/pfc-r8a77965.c | 609 +
1 file changed, 210 insertions(+), 399 deletions(-)
diff --git
Synchronize R-Car R8A7792 V2H PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/pinctrl/renesas/pfc-r8a7792.c | 1206 -
1 file changed, 772 insertions(+), 434 deletions(-)
diff --git
Synchronize R-Car R8A77980 V3H PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut
---
drivers/pinctrl/renesas/pfc-r8a77980.c | 515 +++--
1 file changed, 302 insertions(+), 213 deletions(-)
diff --git
From: Hai Pham
R-Car M3-W+ (R8A77961) is pin compatible with R-Car M3-W (R8A77960),
which allows for both SoCs to share a driver.
Based on Linux commit 708c69e9eacc ("pinctrl: sh-pfc: r8a7796: Add
R8A77961 PFC support") and 74ce7a8044b0 ("pinctrl: renesas: r8a7796:
Optimize pinctrl image size
Synchronize R-Car PFC core with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Parts picked from
pinctrl: renesas: Synchronize R-Car Gen2/Gen3 tables with Linux 5.18.3
- Add pin groups for the green and high8 subsets of the Video IN pins
- Add MediaLB pins
- Add bias support for
From: Hai Pham
Pick R-Car Gen3 R8A77961 M3W+ power domain header from Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Reviewed-by: Marek Vasut
Signed-off-by: Hai Pham
Signed-off-by: Marek Vasut # Update commit
message
---
include/dt-bindings/power/r8a77961-sysc.h | 32
From: Hai Pham
Pick R-Car Gen3 R8A77961 M3W+ CPG Core Clock header from Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
Reviewed-by: Marek Vasut
Signed-off-by: Hai Pham
Signed-off-by: Marek Vasut # Update commit
message
---
include/dt-bindings/clock/r8a77961-cpg-mssr.h | 65
Synchronize R-Car device tree headers with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
This is only a copyright and SPDX identifier update, no
functional change.
The following script has been used for the synchronization:
$ for i in $(cd include/dt-bindings/clock/ ; ls -1
This patch introduses config which allows interrupt run of usb
mass storage with any key. This is especially useful on devices
with limited input capabilities like tablets and smatphones which
have only gpio keys in direct access.
Signed-off-by: Svyatoslav Ryhel
---
cmd/Kconfig| 6
- add ability for 'ums' command to interrupt run of usb
mass storage with any key. This is especially useful on
devices with limited input capabilities like tablets and
smatphones which have only gpio keys in direct access.
Current implementation uses Kconfig entry.
Changelog from V1
- 'continue'
Hi Simon,
On Fri, 27 Jan 2023 at 00:45, Simon Glass wrote:
>
> Hi Jagan,
>
> On Thu, 26 Jan 2023 at 11:27, Jagan Teki wrote:
> >
> > Hi Simon,
> >
> > On Thu, 26 Jan 2023 at 23:34, Simon Glass wrote:
> > >
> > > Hi Jagan,
> > >
> > > On Thu, 26 Jan 2023 at 10:42, Jagan Teki wrote:
> > > >
> >
On Fri, 27 Jan 2023 at 00:33, Jonas Karlman wrote:
>
> On 2023-01-26 19:26, Jagan Teki wrote:
> > Hi Simon,
> >
> > On Thu, 26 Jan 2023 at 23:34, Simon Glass wrote:
> >>
> >> Hi Jagan,
> >>
> >> On Thu, 26 Jan 2023 at 10:42, Jagan Teki wrote:
> >>>
> >>> On Thu, 26 Jan 2023 at 22:28, Jonas
On Thu, Jan 19, 2023 at 04:28:21PM +0100, Mario Kicherer wrote:
> Add BOOT_DEVICE_NOR2 as a second SPL_LOAD_IMAGE_METHOD to enable a
> board-specific spl_nor_get_uboot_base() function to return an alternative
> address in the NOR flash in case booting from BOOT_DEVICE_NOR fails.
>
>
Hi Jagan,
On Thu, 26 Jan 2023 at 11:27, Jagan Teki wrote:
>
> Hi Simon,
>
> On Thu, 26 Jan 2023 at 23:34, Simon Glass wrote:
> >
> > Hi Jagan,
> >
> > On Thu, 26 Jan 2023 at 10:42, Jagan Teki wrote:
> > >
> > > On Thu, 26 Jan 2023 at 22:28, Jonas Karlman wrote:
> > > >
> > > > Hi Jagan,
> > >
On 2023-01-26 19:26, Jagan Teki wrote:
> Hi Simon,
>
> On Thu, 26 Jan 2023 at 23:34, Simon Glass wrote:
>>
>> Hi Jagan,
>>
>> On Thu, 26 Jan 2023 at 10:42, Jagan Teki wrote:
>>>
>>> On Thu, 26 Jan 2023 at 22:28, Jonas Karlman wrote:
Hi Jagan,
On 2023-01-26 17:51, Jagan Teki
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