On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> Add these options to permit access to more disk types.
>
> Add some documentation as well.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> configs/coreboot64_defconfig| 1 +
> configs/coreboot_defconfig | 9
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> Enable bootstd options and provide instructions on how to boot a linux
> distro using coreboot.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> configs/coreboot64_defconfig| 14 ++
> configs/coreboot_defcon
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> Init errors in SPL are currently ignored by this function.
>
> Change the code to init the CPU, reporting an error if something is wrong.
> After that, look for the coreboot table.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> We don't read this information in 64-bit mode, since we don't have the
> macros for doing it. Set it to Intel by default. This allows the TSC timer
> to work correctly.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> arch/
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> This is needed so we can find the DBG2 table provided by coreboot. Add a
> Kconfig so it can be enabled.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> lib/Kconfig | 8
> 1 file changed, 8 insertions(+)
>
Review
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> If coreboot does not set up sysinfo for the UART, SPL currently hangs.
> Use the DBG2 teechnique there as well. This allows coreboot64 to boot from
typo: technique
> coreboot even if the console info is missing from sysinfo
>
> Signed-off-by
Hi Simon,
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> The debug UART on modern machines uses a 32-bit wide transfer. Without
> this, setting debug output causes a hang or no output. It is not obvious
> (when enabling CONFIG_DEBUG_UART) that this is needed.
>
> Enable 32-bit access to a
Hi Simon,
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> This is very annoying as it is quite slow on many machines. Also, U-Boot
> has an existing 'preboot' mechanism to enable this feature if desired.
>
> Drop this code so that it is possible to choose whether to init USB or
> not.
>
>
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> These two builds are similar but have some different options for not good
> reason. Line them up to be as similar as possible.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v2)
>
> Changes in v2:
> - Update the malloc size too
>
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> At least on modern machines the write-back mechanism for the frame buffer
> is quite slow when scrolling, since it must read the entire frame buffer
> and write it back.
>
> Enable the VIDEO_COPY feature to resolve this problem.
>
> Signed-off
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> When booted from coreboot, U-Boot does not build the SMBIOS tables, but
> it should still pass them on to the OS. Add a new option which indicates
> whether SMBIOS tables are present, however they were built.
>
> Flip the ordering so that the
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> Remember where these end up so that we can pass this information on to
> the EFI layer.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v4:
> - Fix arm and riscv
>
> Changes in v2:
> - Add new patch
>
> arch/arm/include/asm/global_data.h
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> Make a note of where coreboot installed the SMBIOS tables so that we can
> pass this on to EFI.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v2)
>
> Changes in v2:
> - Add new patch
>
> arch/x86/lib/coreboot/cb_sysinfo.c | 1 +
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> There is enough material that it makes sense to split this up into
> several files. Create an x86/ directory for this purpose.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v2)
>
> Changes in v2:
> - Add new patch
>
> doc/arch/i
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> Refresh the summary information so it is more up-to-date. Add links to
> the coreboot and slimbootloader docs.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v2)
>
> Changes in v2:
> - Add new patch
>
> doc/arch/x86/x86.rst | 17
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> Move this out of the main file since for simple users it is easier to
> rely on standard boot.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v2)
>
> Changes in v2:
> - Add new patch
>
> doc/arch/x86/index.rst | 1 +
> do
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> It is not always the case that U-Boot builds the ACPI tables itself. For
> example, when booting from coreboot, the ACPI tables are built by
> coreboot.
>
> Correct the Makefile condition so that U-Boot can pass on tables built
> by a previous
On Thu, Aug 24, 2023 at 5:11 AM Simon Glass wrote:
>
> Add a little more detail as to why coreboot64 is preferred for booting
> Linux distros.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v2)
>
> Changes in v2:
> - Add new patch
>
> doc/board/coreboot/coreboot.rst | 2 ++
> 1 file
Hi Andy,
On Fri, Aug 25, 2023 at 9:52 PM Andy Shevchenko
wrote:
>
> The Simon's patch missed the FADT to be added to the chain, hence all
> the issues on Intel Tangier.
>
> Signed-off-by: Andy Shevchenko
> ---
> arch/x86/cpu/tangier/acpi.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --gi
Hi Jonas
> Gesendet: Montag, 18. September 2023 um 23:45 Uhr
> Von: "Jonas Karlman"
> An: "Frank Wunderlich"
> Cc: "Frank Wunderlich" , "Simon Glass"
> , "Philipp Tomsich" , "Kever
> Yang" , u-boot@lists.denx.de
> Betreff: Re: [PATCH v4] board: rockchip: Add Bananapi R2Pro Board
>
> Hi Frank,
Hi Roger
>
>
>On 08/09/2023 14:05, Apurva Nandan wrote:
>> From: Hari Nagalla
>>
>> The K3 J784S4 SoCs have four dual-core R5F subsystems, one in MCU
>> voltage domain and the other three in MAIN voltage domain. These R5F
>> clusters are similar to the R5F clusters in J7200 and J721S2 SoCs.
>>
>>
On Fri, Sep 1, 2023 at 3:13 AM Simon Glass wrote:
>
> Hi Tom,
>
> On Thu, 31 Aug 2023 at 11:48, Tom Rini wrote:
> >
> > On Thu, Aug 31, 2023 at 11:20:52AM -0600, Simon Glass wrote:
> >
> > > When building in a portage chroot, we do not have the environment needed
> > > to build pylibfdt. It is in
On Tue, Sep 19, 2023 at 3:28 PM Bin Meng wrote:
>
> Hi Andy,
>
> On Fri, Aug 25, 2023 at 9:52 PM Andy Shevchenko
> wrote:
> >
> > The Simon's patch missed the FADT to be added to the chain, hence all
> > the issues on Intel Tangier.
> >
> > Signed-off-by: Andy Shevchenko
> > ---
> > arch/x86/cp
On Sat, Sep 2, 2023 at 1:27 AM Simon Glass wrote:
>
> From: Andy Shevchenko
>
> Recent approach with FADT writer shows that there is
> a room for subtle errors. Prevent this from happening
> again by introducing acpi_add_fadt() helper.
>
> Signed-off-by: Andy Shevchenko
> Signed-off-by: Simon Gl
On 2023/9/9 17:33, Massimo Pegorer wrote:
Update and improve documentation about build steps for SoCs that
require using TF-A and TPL binaries provided by Rockchip, such as
rk3308. Add rk3308 boards case to rST document. Add ROCK Pi S in
the list of supported boards. Minor page format improveme
On Sat, Sep 2, 2023 at 1:27 AM Simon Glass wrote:
>
> Each board has its own way of creating this table. Rather than calling the
> acpi_create_fadt() function for each one from a common acpi_write_fadt()
> function, just move the writer into the board-specific code.
>
> Co-developed-by: Andy Shevc
On Sat, Sep 2, 2023 at 2:08 AM Simon Glass wrote:
>
> Add a note about using -cdrom with QEMU.
>
> Suggested-by: Bin Meng
> Signed-off-by: Simon Glass
> ---
>
> doc/board/emulation/qemu-x86.rst | 3 +++
> 1 file changed, 3 insertions(+)
>
Reviewed-by: Bin Meng
applied to u-boot-86/next, than
On Thu, Sep 7, 2023 at 11:58 PM Simon Glass wrote:
>
> On x86 devices we use CAR (Cache-As-RAM) to hold the malloc() region in
> SPL, since SDRAM is not set up yet. This means that driver model stores
> its tables in this region.
>
> When preparing to jump from SPL to U-Boot proper, we must disabl
On Thu, Sep 7, 2023 at 11:58 PM Simon Glass wrote:
>
> When turning off CAR, set the flag to make sure that nothing tries to use
> driver model in SPL before jumping to U-Bot proper, since its tables are
> in CAR.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Add new patch to mark d
On Thu, Sep 7, 2023 at 11:58 PM Simon Glass wrote:
>
> The current condition does not handle the samus_tpl case where it sets
> up the RAM in SPL but needs to commit the MTRRs in U-Boot proper.
>
> Add another case to handle this and update the comment.
>
> Signed-off-by: Simon Glass
> ---
>
> (n
On Thu, Sep 7, 2023 at 11:58 PM Simon Glass wrote:
>
> These boards have various problems which prevent them from booting. In
> the case of link there was a recent regression with PCI probing added to
> SPL. For samus_tpl it needs a few tweaks to get things back up and
> running.
>
> This series r
The sync tries to ensure that U-boot remains functional with the updated
Linux DTS and all the fixes from Linux move to U-boot during the sync.
The series tries to sync from Linux v6.6-rc1 along with addition of
the documentation for J721S2 that had been previously missing.
DMA fixes [0] are curr
From: Udit Kumar
The malloc capacity in DRAM at R5 SPL is set to 1MB which isn't
sufficient to load the new tispl.bin to
enable loading of tispl.bin the size is increased by 256KB to 1.25MB.
Cc: Nikhil M Jain
Signed-off-by: Udit Kumar
Reviewed-by: Nishanth Menon
Signed-off-by: Manorit Chawdhr
The update causes instability in am68-sk boards so revert the patch in
the meantime till fix is available.
This reverts commit f1edf4bb6aa19732574ac23ca90cb9a0ba395ec1.
Signed-off-by: Manorit Chawdhry
---
arch/arm/dts/k3-j721e-ddr-evm-lp4-4266.dtsi | 98 +++---
arch/arm/dts/k3-j721s2-ddr-evm-
mcu_timer0 is used by u-boot as the tick-timer. Add it to the soc
devices lsit so it an be enabled via the k3 power controller.
Reviewed-by: Neha Malcom Francis
Reviewed-by: Nishanth Menon
Signed-off-by: Manorit Chawdhry
---
arch/arm/mach-k3/j721s2/dev-data.c | 1 +
1 file changed, 1 insertion
The following commit syncs the device tree from Linux tag
v6.6-rc1 to U-boot and fixes the following to be compatible with
the future syncs -
- Include k3-j721s2-common-proc-board.dts file
Remove the duplicated pinmuxes from r5 and -u-boot.dtsi files and
include k3-j721s2-common-proc-boar
The following commit syncs the device tree from Linux tag
v6.6-rc1 to U-boot and fixes the following to be compatible with
the future syncs -
- Include k3-am68-sk-base-board.dts file
Remove the duplicated pinmuxes from r5 and -u-boot.dtsi files and
include k3-am68-sk-base-board.dts for Li
Add the documentation for J721S2-EVM and SK-AM68
TRM for J721S2/AM68: https://www.ti.com/lit/pdf/spruj28
Product Page for J721S2: https://www.ti.com/tool/J721S2XSOMXEVM
Product Page for AM68: https://www.ti.com/tool/SK-AM68
Reviewed-by: Neha Malcom Francis
Reviewed-by: Nishanth Menon
Signed-off
Update the MAINTAINERS file and propose a new MAINTAINER for j721s2 due
to the previous MAINTAINER not being associated with TI.
Reviewed-by: Nishanth Menon
Signed-off-by: Manorit Chawdhry
---
board/ti/j721s2/MAINTAINERS | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --
Hi Simon,
On Mon, Sep 11, 2023 at 3:13 AM Simon Glass wrote:
>
> This driver is not actually built since a Kconfig was never created for
> it.
>
> Add a Kconfig (which is already implied by COREBOOT) and update the
> implementation to avoid using unnecessary memory. Drop the #ifdef at the
> top s
On Mon, Sep 11, 2023 at 3:13 AM Simon Glass wrote:
>
> Coreboot changed a few years ago to include an overflow flag. Update the
> structure to match this.
>
> This comes from coreboot commit:
>
>6f5ead14b4 ("mb/google/nissa/var/joxer: Update eMMC DLL settings")
>
> Note: There are several impl
The hab signing script doc/imx/habv4/csf_examples/mx8m/csf.sh does
fdtget -t x u-boot.dtb /binman/imx-boot/uboot offset
to figure out the offset of u-boot.itb inside flash.bin. That works
fine for imx8mm, imx8mn, imx8mq, but fails for imx8mp because in that
case 'uboot' is merely a label and no
When built with CONFIG_IMX_HAB, the full FIT image, including stuff
tacked on beyond the end of the fdt structure, is expected to be (fdt
size rounded up to 0x1000 boundary)+CONFIG_CSF_SIZE.
Now, when the FIT image is loaded from a storage device, it doesn't
really matter that the flash.bin that g
This is the difference between version 1 and 2 of Massimo's patch:
binman: doc: fix reference tag placement for Logging section
v2:
https://lore.kernel.org/u-boot/20230913161633.999542-1-massimo.pegorer+...@gmail.com/
v1:
https://lore.kernel.org/u-boot/20230909135235.21242-1-massimo.pegorer+...@
On 14:09-20230919, Manorit Chawdhry wrote:
> The sync tries to ensure that U-boot remains functional with the updated
> Linux DTS and all the fixes from Linux move to U-boot during the sync.
>
> The series tries to sync from Linux v6.6-rc1 along with addition of
> the documenta
On 11:36-20230919, Udit Kumar wrote:
> AVS is enabled at R5 SPL stage, where clk-k3 is used
> instead if clk-sci driver.
>
> clk-k3 driver to notify AVS driver upon setting clock rate
> so that voltage is changed accordingly.
>
> Fixes: e0aa873bc7cd ("clk: clk-ti-s
On 07:35-20230919, Sverdlin, Alexander wrote:
> Hello Sjoerd,
>
> On Thu, 2023-04-06 at 20:55 +0200, Sjoerd Simons wrote:
> > sdhci0 on the k3-am625-sk is the emmc, enable this in SPL as well to
> > allow booting from that media.
> >
> > Signed-off-by: Sjoerd
Hi Nishanth,
On 06:13-20230919, Nishanth Menon wrote:
> On 14:09-20230919, Manorit Chawdhry wrote:
> > The sync tries to ensure that U-boot remains functional with the updated
> > Linux DTS and all the fixes from Linux move to U-boot during the sync.
> >
> > The seri
I was surprised to discover that mkimage effectively ignores -B when
used by itself - the help text suggests otherwise, and it's a
completely reasonable thing to have.
Also, binman already translates a fit,align property into a -B
argument, without requiring fit,external-offset to be set.
Rasmus
In some cases, using the "external data" feature is impossible or
undesirable, but one may still want (or need) the FIT image to have a
certain alignment. Also, given the current 'mkimage -h' output,
-B => align size in hex for FIT structure and header
it is quite unexpected for -B to be effect
In preparation for adding a test case for fit,align without
fit,external-offset present, rename the existing test case and
corresponding file.
Signed-off-by: Rasmus Villemoes
---
tools/binman/ftest.py | 4 ++--
.../test/{275_fit_align.dts => 275_fit_align_
Eliminate the repetition "what alignment to use ... and provides the
alignment to use", and indicate that fit,align can both be used by
itself and together with fit,external-offset.
Signed-off-by: Rasmus Villemoes
---
tools/binman/entries.rst | 5 ++---
1 file changed, 2 insertions(+), 3 deletio
Signed-off-by: Rasmus Villemoes
---
tools/binman/ftest.py | 10 +
tools/binman/test/311_fit_align.dts | 58 +
2 files changed, 68 insertions(+)
create mode 100644 tools/binman/test/311_fit_align.dts
diff --git a/tools/binman/ftest.py b/tools/binman/
On 16:50-20230919, Manorit Chawdhry wrote:
[...]
> >
> > Not sure what happened to your patches, but they are missing sequence
> > numbering and versioning info.
> >
>
> Am not sure either.. I had been using b4 for all the patches and I still
> see that my ne
Add timer driver in Starfive SoC. It is an timer that outside
of CPU core and inside Starfive SoC.
Signed-off-by: Kuan Lim Lee
Reviewed-by: Wei Liang Lim
---
drivers/timer/Kconfig | 7 +++
drivers/timer/Makefile | 1 +
drivers/timer/starfive-timer.c | 94 +
Hello Sjoerd,
On Thu, 2023-04-06 at 20:55 +0200, Sjoerd Simons wrote:
> sdhci0 on the k3-am625-sk is the emmc, enable this in SPL as well to
> allow booting from that media.
>
> Signed-off-by: Sjoerd Simons
> Reviewed-by: Tom Rini
thanks for the patch! I've tested the eMMC boot on AM625 SK
and
On Sep 19, 2023 at 06:19:02 -0500, Nishanth Menon wrote:
> On 07:35-20230919, Sverdlin, Alexander wrote:
> > Hello Sjoerd,
> >
> > On Thu, 2023-04-06 at 20:55 +0200, Sjoerd Simons wrote:
> > > sdhci0 on the k3-am625-sk is the emmc, enable this in SPL as well to
>
On 9/19/2023 4:44 PM, Nishanth Menon wrote:
On 11:36-20230919, Udit Kumar wrote:
AVS is enabled at R5 SPL stage, where clk-k3 is used
instead if clk-sci driver.
[..]
Why drop from here? we do have am64 and am65 that use ti-sci, correct?
Thanks,
am64/am65 slipped out of my mind while
From: Fabio Estevam
Vanessa's NXP e-mail is no longer active.
Contacted her offline and she told me that she does not have
access to the board anymore and it is OK to remove her
from MAINTAINERS.
Signed-off-by: Fabio Estevam
---
board/technexion/pico-imx7d/MAINTAINERS | 1 -
1 file changed, 1
Currently, spl_imx_romapi uses a somewhat tricky workaround for the
fact that a FIT image with external data doesn't directly allow one to
know the full size of the file: It does a dummy spl_load_simple_fit(),
having the ->read callback remember the largest offset requested, and
then does a last ca
This is essentially a resend of something I sent four months ago
[1]. The patches themselves are unchanged, but the commit log for 1/2
is updated to reflect the change wrt. IMX_HAB.
Moreover, while they were previously "merely" a simplification, they
are now required for making usb loading with IM
These IS_ENABLED(CONFIG_SPL_LOAD_FIT) cases can no longer be reached,
and thus get_fit_image_size() is also redundant.
Signed-off-by: Rasmus Villemoes
---
arch/arm/mach-imx/spl_imx_romapi.c | 25 ++---
1 file changed, 2 insertions(+), 23 deletions(-)
diff --git a/arch/arm/ma
AVS is enabled at R5 SPL stage, on few platforms like J721E
and J7200 clk-k3 is used instead if clk-sci driver.
Add support in clk-k3 driver as well to notify AVS driver
upon setting clock rate so that voltage is changed accordingly.
Cc: Keerthy
Signed-off-by: Udit Kumar
---
Change log:
Changes
Keep track of the re-entries with help of the lr register.
This binary can be re-used and called from various BROM functions.
Only when it's called from the part that handles SPI, NAND or EMMC
hardware it needs to early return to BROM ones.
In download mode when it handles data on USB OTG and UART0
Hi Simon,
On Mon, Sep 18, 2023 at 07:04:47PM -0600, Simon Glass wrote:
> On Sun, 17 Sept 2023 at 04:14, Igor Prusov wrote:
> >
> > This patch adds basic clock driver for Amlogic A1 Family which supports
> > enabling/disabling some gates, getting frequencies and setting rate
> > with limited repa
On Wed, Aug 30, 2023 at 10:49:50PM -0400, Trevor Woerner wrote:
> In 2cb43ef1c223 ("usb: ether: Fix error handling in usb_ether_init") the error
> handling of usb_ether_init() was changed. Not a single other call site of this
> function checks its return value, therefore follow suit in the am33xx
On Fri, Sep 01, 2023 at 04:09:13PM +0530, Nikhil M Jain wrote:
> Change the file name from ti.gz and ti.bmp to ti_logos_414x97_32bpp to
> help user understand the resolution and identify the logo files when
> placed in the boot partition and update the splashfile name with the
> same in .env file.
Hi,
It looks as if all the TABs are gone.
Will resend.
Johan
On 9/19/23 16:57, Johan Jonker wrote:
> Keep track of the re-entries with help of the lr register.
> This binary can be re-used and called from various BROM functions.
> Only when it's called from the part that handles SPI, NAND or EM
On Thu, Sep 07, 2023 at 01:06:35PM -0500, Reid Tonking wrote:
> The ti,j7200-vtm and ti,j721e-vtm compatibles are used for voltage
> and thermal monitoring (VTM) by (drivers/thermal/k3_j72xx_bandgap.c)
> in Linux, but the same hardware is used for adaptive voltage scaling
> (AVS) in u-boot, This b
On Mon, Sep 11, 2023 at 09:02:55AM -0500, Nishanth Menon wrote:
> Sync pinctrl header with v6.6-rc1
>
> Signed-off-by: Nishanth Menon
> Reviewed-by: Dhruva Gole
> Reviewed-by: Mattijs Korpershoek
Applied to u-boot/next, thanks!
--
Tom
signature.asc
Description: PGP signature
On Mon, Sep 11, 2023 at 09:02:56AM -0500, Nishanth Menon wrote:
> Sync device tree with v6.6-rc1
>
> Signed-off-by: Nishanth Menon
> Reviewed-by: Dhruva Gole
> Reviewed-by: Mattijs Korpershoek
Applied to u-boot/next, thanks!
--
Tom
signature.asc
Description: PGP signature
On Mon, Sep 11, 2023 at 09:43:58AM -0500, Nishanth Menon wrote:
> Introduce the new serdes header from kernel v6.6-rc1
>
> The DTS uses constants for SERDES MUX idle state values which were earlier
> provided as bindings header. But they are unsuitable for bindings.
> So move these constants in a
On Mon, Sep 18, 2023 at 07:04:41PM -0600, Simon Glass wrote:
> Hi Tom, Dan,
>
> On Tue, 8 Aug 2023 at 19:39, Tom Rini wrote:
> >
> > On Wed, Jul 26, 2023 at 09:54:08AM +0300, Dan Carpenter wrote:
> >
> > > The VNBYTES() macro needs to have parentheses to prevent some (harmless)
> > > macro expans
Hi,
On Thu, 7 Sept 2023 at 15:40, Simon Glass wrote:
>
> It is common to split firmware into 'Platform Init', which does the
> initial hardware setup and a "Payload" which selects the OS to be booted.
> Thus an handover interface is required between these two pieces.
>
> This aims to provide an s
Keep track of the re-entries with help of the lr register.
This binary can be re-used and called from various BROM functions.
Only when it's called from the part that handles SPI, NAND or EMMC
hardware it needs to early return to BROM ones.
In download mode when it handles data on USB OTG and UART0
This is the cover letter for patchset [1].
First, do not restrain the STM32 RNG driver to the MPU series.
The STM32MP13x platforms have a RNG hardware block that supports
customization, a conditional reset sequences that allows to
recover from certain situations and a configuration locking
mechani
Rename the RNG driver as it is usable by other STM32 platforms
than the STM32MP1x ones. Rename CONFIG_RNG_STM32MP1 to
CONFIG_RNG_STM32
Signed-off-by: Gatien Chevallier
Reviewed-by: Grzegorz Szymaszek
Reviewed-by: Patrick Delaunay
---
Changes in V2:
- Added ARCH_STM32 in the "depends on
Default embed this configuration. If OP-TEE PTA RNG is exposed, it means
that the RNG is managed by the secure world. Therefore, the RNG node
should be disabled in the device tree as an access would be denied
by the hardware firewall.
Signed-off-by: Gatien Chevallier
Reviewed-by: Patrick Delaunay
RNG clock error detection is now enabled if the "clock-error-detect"
property is set in the device tree.
Signed-off-by: Gatien Chevallier
Reviewed-by: Patrick Delaunay
---
Changes in V2:
- Added Patrick's tag
drivers/rng/stm32_rng.c | 22 +-
1 file changed, 17 inser
In order to ensure a good RNG quality and compatibility with
certified RNG configuration, add RNG clock frequency restraint.
Signed-off-by: Gatien Chevallier
Reviewed-by: Patrick Delaunay
---
Changes in V2:
- Added Patrick's tag
drivers/rng/stm32_rng.c | 43
Seed errors can occur when using the hardware RNG. Implement the
sequences to handle them. This avoids irrecoverable RNG state.
Try to conceal seed errors when possible. If, despite the error
concealing tries, a seed error is still present, then return an error.
A clock error does not compromise
Add RNG node for STM32MP13x platforms.
Signed-off-by: Gatien Chevallier
Reviewed-by: Patrick Delaunay
---
Changes in V2:
- Added Patrick's tag
arch/arm/dts/stm32mp131.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131
STM32 RNG configuration should best fit the requirements of the
platform. Therefore, put a platform-specific RNG configuration
field in the platform data. Default RNG configuration for STM32MP13
is the NIST certified configuration [1].
While there, fix and the RNG init sequence to support all RNG
On 19:34-20230919, Udit Kumar wrote:
> AVS is enabled at R5 SPL stage, on few platforms like J721E
> and J7200 clk-k3 is used instead if clk-sci driver.
>
> Add support in clk-k3 driver as well to notify AVS driver
> upon setting clock rate so that voltage is changed accordingly.
&
Add missing SelectMAP bootmode for proper identification during boot.
The SelectMAP configuration interface provides an 8-bit, 16-bit or
32-bit bidirectional data bus interface to the Versal FPGA
configuration logic that can be used for both configuration and
readback.
A connected microcontoller
Hi Nishanth,
On 9/19/2023 9:07 PM, Nishanth Menon wrote:
On 19:34-20230919, Udit Kumar wrote:
AVS is enabled at R5 SPL stage, on few platforms like J721E
and J7200 clk-k3 is used instead if clk-sci driver.
Add support in clk-k3 driver as well to notify AVS driver
upon setting clock rate so
Hi,
On 09/09/23 16:20, Roger Quadros wrote:
On 08/09/2023 14:05, Apurva Nandan wrote:
Introduce the basic j784s4 SoC dts from the next-20230905 tag of the
linux kernel.
Signed-off-by: Hari Nagalla
Signed-off-by: Apurva Nandan
---
arch/arm/dts/k3-j784s4-evm.dts | 864 +
Hi,
On 09/09/23 16:18, Roger Quadros wrote:
Hi,
On 08/09/2023 14:05, Apurva Nandan wrote:
Add j784s4 initialization files for initial SPL boot.
Please be consistent in naming. J784S4 ?
Signed-off-by: Hari Nagalla
[ add firewall configurations and change the R5 MCU scratchpad ]
Signed-off-b
Hi,
On 09/09/23 16:26, Roger Quadros wrote:
On 08/09/2023 14:05, Apurva Nandan wrote:
From: Hari Nagalla
The K3 J784S4 SoCs have four dual-core R5F subsystems, one in MCU
voltage domain and the other three in MAIN voltage domain. These R5F
clusters are similar to the R5F clusters in J7200 an
On 09/09/23 16:28, Roger Quadros wrote:
On 08/09/2023 14:05, Apurva Nandan wrote:
From: Hari Nagalla
The K3 J784S4 SoCs have four C71x DSP subsystems in MAIN voltage domain
missing period.
SoCs have/SoC has
The C71x DSPs are 64 bit machine with fixed and floating point DSP> operations.
Hi,
On 09/09/23 16:32, Roger Quadros wrote:
On 08/09/2023 14:05, Apurva Nandan wrote:
Add board files for J784S4 EVM.
Signed-off-by: Hari Nagalla
[ add env and board specific yaml files for binman ]
Signed-off-by: Neha Malcom Francis
[ cleaned up the env files ]
Signed-off-by: Manorit Chawd
On 09/09/23 16:59, Roger Quadros wrote:
On 08/09/2023 14:05, Apurva Nandan wrote:
Add board files for J784S4 EVM.
Signed-off-by: Hari Nagalla
[ add env and board specific yaml files for binman ]
Signed-off-by: Neha Malcom Francis
[ cleaned up the env files ]
Signed-off-by: Manorit Chawdhry
On 09/09/23 17:08, Roger Quadros wrote:
On 08/09/2023 14:05, Apurva Nandan wrote:
TI K3 J784S4 and AM69 SK are new additions to the K3 SoC family.
J784S4 is a SoC variant, AM69-SK is a board using AM69 SoC variant.
How can a board be part of SoC family?
Okay will fix that statement.
Look
So far expo only supports menus. These are quite flexible for various
kinds of settings, but cannot deal with free-form input, such as a
serial number or a machine name.
This series adds support for a textline object, which is a single line
of text. It has a maximum length and its value is stored
Move this code into its own function since it is a separate
implementation from the full version.
Signed-off-by: Simon Glass
---
common/cli_readline.c | 79 +--
1 file changed, 46 insertions(+), 33 deletions(-)
diff --git a/common/cli_readline.c b/common
There is a function for this but it is never used. Showing the history is
a useful feature, so add a new 'history' command.
Signed-off-by: Simon Glass
---
cmd/Kconfig | 7
cmd/Makefile | 1 +
cmd/history.c | 23 +
common/cli_readline.c
Add a few static inlines to avoid the need for #ifdefs in
cli_readline_into_buffer()
Signed-off-by: Simon Glass
---
common/cli_readline.c | 20 ++--
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/common/cli_readline.c b/common/cli_readline.c
index f3ba76a62ec..61
Use a static inline and adjust the logic to avoid the need for #ifdefs in
cli_readline_into_buffer()
Signed-off-by: Simon Glass
---
common/cli_readline.c | 85 +--
include/command.h | 6 +++
2 files changed, 48 insertions(+), 43 deletions(-)
diff --
The Ctrl-W option is implemented in the cread_line_simple() but not in
the full version. This seems odd, so add an implementation.
Signed-off-by: Simon Glass
---
common/cli_readline.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/common/cli_readline.c b/co
The index values are not very large so it makes no sense to use a long
integer. Change these to uint instead.
Signed-off-by: Simon Glass
---
common/cli_readline.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/common/cli_readline.c b/common/cli_readline.c
1 - 100 of 185 matches
Mail list logo
