Hi Marek,
> -Original Message-
> From: Marek Vasut
> Sent: Saturday, July 27, 2024 4:38 AM
> To: Z.Q. Hou ; u-boot@lists.denx.de;
> tr...@konsulko.com; lu...@denx.de; sean...@gmail.com;
> feste...@gmail.com; Peng Fan
> Subject: Re: [PATCHv2] clk: imx8m: register ARM A53 core clock
>
> O
From: Hou Zhiqiang
This patch set is to add a subcommand 'release' to the 'cpu' command
in cmd/cpu.c, making the command is able to release a core to run
baremetal and RTOS applications.
Fixed some problems of the imx8_cpu.c and added i.MX 8M series SoCs
support.
Added ARM A53 core clock regist
From: Hou Zhiqiang
Register ARM A53 core clock for i.MX 8M Mini, Nano and Plus, preparing
for enabling the 'cpu' command, which depends on this to print CPU core
frequency.
Signed-off-by: Hou Zhiqiang
---
V4:
- Moved here from other thread.
drivers/clk/imx/clk-imx8mm.c | 6 ++
drivers/cl
From: Hou Zhiqiang
Add a new callback release_core to the cpu_ops, which is used to
release a CPU core to run baremetal or RTOS application on a SoC
with multiple CPU cores.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Simon Glass
---
V4:
- No change.
drivers/cpu/cpu-uclass.c | 10 ++
i
From: Hou Zhiqiang
Add empty release CPU core function for testing.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Simon Glass
---
V4:
- No change.
drivers/cpu/cpu_sandbox.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/cpu/cpu_sandbox.c b/drivers/cpu/cpu_sandbox.c
index e65e1
From: Hou Zhiqiang
Add test for API cpu_release_core().
Signed-off-by: Hou Zhiqiang
Reviewed-by: Simon Glass
---
V4:
- No change.
test/dm/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/test/dm/cpu.c b/test/dm/cpu.c
index acba810599..8af25316ce 100644
--- a/test/dm/cpu.c
+++ b/t
From: Hou Zhiqiang
The cpu_freq stores the current CPU frequency in Hz.
Signed-off-by: Hou Zhiqiang
---
V4:
- Rewrote the change log.
drivers/cpu/imx8_cpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c
index 4781a5655
From: Hou Zhiqiang
Increase one more bit to cover all CPU types. Otherwise it shows
wrong CPU info on some platforms, such as i.MX8M Plus:
U-Boot 2024.04+g674440bc73e+p0 (Jun 06 2024 - 10:05:34 +)
CPU: NXP i.MX8MM Rev1.1 A53 at 4154504685 MHz at 30C
Model: NXP i.MX8MPlus LPDD
From: Hou Zhiqiang
Return CPU description string without newline character in the end.
Signed-off-by: Hou Zhiqiang
---
V4:
- New patch.
drivers/cpu/imx8_cpu.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c
index 6a97b7b9ad..b633a2c73a 100
From: Hou Zhiqiang
Add i.MX 8M Mini, Nano and Plus SoCs support.
Signed-off-by: Hou Zhiqiang
---
V4:
- No change.
drivers/cpu/imx8_cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c
index b633a2c73a..a35147b72a 100644
--- a/drivers
From: Hou Zhiqiang
Release the secondary cores through the PSCI request.
Signed-off-by: Hou Zhiqiang
---
V4:
- No change.
drivers/cpu/imx8_cpu.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c
index a35147b72a..60d
From: Hou Zhiqiang
Add a new subcommand 'release' to bring up a core to run baremetal
and RTOS applications.
For example on i.MX8M Plus EVK, release the LAST core to run a RTOS
application, passing the sequence number of the CPU core to release,
here it is 3:
u-boot=> cpu list
0: cpu@0
From: Hou Zhiqiang
Add documentation for the 'cpu' command, taking NXP i.MX 8M Plus
as a example.
Signed-off-by: Hou Zhiqiang
---
V4:
- Added brief descriptions for each subcommand..
doc/usage/cmd/cpu.rst | 101 ++
1 file changed, 101 insertions(+)
cr
From: Hou Zhiqiang
Added the original author Simon and myself.
Signed-off-by: Hou Zhiqiang
---
V4:
- No change.
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index a6e47e8a21..f1aa802758 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -996,6 +
From: Hou Zhiqiang
Enable the 'cpu' command and the depended imx CPU driver to
display the CPU info and release CPU core to run baremetal
or RTOS applications.
Signed-off-by: Hou Zhiqiang
---
V4:
- No change.
configs/imx8mm_evk_defconfig | 3 +++
configs/imx8mn_evk_defconfig | 3 +++
configs
From: Hou Zhiqiang
Enable the 'cpu' command to display the CPU info and release CPU core to
run baremetal or RTOS applications.
Signed-off-by: Hou Zhiqiang
---
V4:
- No change.
configs/imx93_11x11_evk_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/imx93_11x11_evk_defco
Hi
On Tue, Jul 30, 2024 at 9:09 AM Zhiqiang Hou wrote:
>
> From: Hou Zhiqiang
>
> Register ARM A53 core clock for i.MX 8M Mini, Nano and Plus, preparing
> for enabling the 'cpu' command, which depends on this to print CPU core
> frequency.
>
> Signed-off-by: Hou Zhiqiang
> ---
> V4:
> - Moved
Hi
On Tue, Jul 30, 2024 at 9:10 AM Zhiqiang Hou wrote:
>
> From: Hou Zhiqiang
>
> The cpu_freq stores the current CPU frequency in Hz.
>
> Signed-off-by: Hou Zhiqiang
> ---
> V4:
> - Rewrote the change log.
>
> drivers/cpu/imx8_cpu.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Hi Michael,
> -Original Message-
> From: Michael Nazzareno Trimarchi
> Sent: Tuesday, July 30, 2024 3:12 PM
> To: Z.Q. Hou
> Cc: u-boot@lists.denx.de; tr...@konsulko.com; Peng Fan
> ; feste...@gmail.com; s...@chromium.org;
> ma...@denx.de; lu...@denx.de; sean...@gmail.com;
> xypron.g...@
Hi Dmitry,
Thank you for the patch.
On jeu., juil. 25, 2024 at 22:47, Dmitry Rokosov
wrote:
> Command ab_select has wrong help description from indentation
> perspective.
>
> Signed-off-by: Dmitry Rokosov
Reviewed-by: Mattijs Korpershoek
> ---
> cmd/ab_select.c | 4 ++--
> 1 file changed,
Hi Raymond,
On Tue, 2 Jul 2024 at 21:33, Raymond Mao wrote:
>
> Previous patch has introduced MbedTLS porting layer for mscode parser,
> here to adjust the header and makefiles accordingly.
>
> Signed-off-by: Raymond Mao
> ---
> Changes in v2
> - Move the porting layer to MbedTLS dir.
> Changes
Hi Raymond
On Tue, 2 Jul 2024 at 21:33, Raymond Mao wrote:
>
> Add RSA helper layer on top on MbedTLS PK and RSA library.
> Introduce _LEGACY and _MBEDTLS kconfigs for RSA helper legacy and
> MbedTLS implementations respectively.
>
> Signed-off-by: Raymond Mao
> ---
> Changes in v2
> - Initial
Hi Dmitry,
Thank you for the patch.
Hi Simon,
On dim., juil. 28, 2024 at 13:36, Simon Glass wrote:
> Hi Dmitry,
>
> On Thu, 25 Jul 2024 at 14:55, Dmitry Rokosov
> wrote:
>>
>> It's really helpful to have the ability to dump BCB block for debugging
>> A/B logic on the board supported this part
On Mon, 29 Jul 2024 at 18:28, Simon Glass wrote:
>
> Hi Ilias,
>
> On Mon, 29 Jul 2024 at 04:02, Ilias Apalodimas
> wrote:
> >
> > Hi Simon
> >
> > On Fri, 26 Jul 2024 at 17:54, Simon Glass wrote:
> > >
> > > Hi Ilias,
> > >
> > > On Fri, 26 Jul 2024 at 02:31, Ilias Apalodimas
> > > wrote:
> >
Hi Dmitry,
Thank you for the patch.
On lun., juil. 29, 2024 at 17:39, Dmitry Rokosov
wrote:
> Hello Simon,
>
> On Sun, Jul 28, 2024 at 01:36:05PM -0600, Simon Glass wrote:
>> Hi Dmitry,
>>
>> On Thu, 25 Jul 2024 at 14:55, Dmitry Rokosov
>> wrote:
>> >
>> > The ab_dump command allows you to d
Hi Dmitry,
Thank you for the patch.
On jeu., juil. 25, 2024 at 22:47, Dmitry Rokosov
wrote:
> To align with the official Android BCB (Boot Control Block)
> specifications, it's important to note that the slot_suffix should start
> with an underscore symbol.
>
> For a comprehensive understandin
On Tue, Jul 30, 2024 at 10:43:13AM +0200, Mattijs Korpershoek wrote:
> Hi Dmitry,
>
> Thank you for the patch.
>
> On jeu., juil. 25, 2024 at 22:47, Dmitry Rokosov
> wrote:
>
> > To align with the official Android BCB (Boot Control Block)
> > specifications, it's important to note that the slo
Hi Michael,
Thank you for the patch.
On lun., juil. 29, 2024 at 23:36, Michael Walle wrote:
> android_image_get_ramdisk() will return an error if there is no ramdisk.
> Using the android image without a ramdisk worked until commit
> 1ce8e10f3b4b ("image: Fix up ANDROID_BOOT_IMAGE ramdisk code")
On 7/28/24 21:36, Simon Glass wrote:
Hi Love,
On Wed, 24 Jul 2024 at 05:07, Love Kumar wrote:
Add test cases for sf commands to verify various SPI flash operations
such as erase, write and read. It also adds qspi lock unlock cases.
This test relies on boardenv_* configurations to run it fo
Hi Zixun,
Thank you for the patch.
On jeu., juil. 25, 2024 at 17:32, Zixun LI wrote:
> Add driver model support by using the uclass UCLASS_USB_GADGET_GENERIC.
>
> Disable local usb_gadget_register_driver()/usb_gadget_unregister_driver()
> implementation which is implemented in udc-core.c when D
When kernel uses file system encryption, fscrypt on UBIFS v5,
after a hard power cycle UBIFS journal replay fails which results in mount
failure.
Failure logs:
UBIFS: recovery needed
UBIFS error (pid 0): ubifs_validate_entry: bad directory entry node
UBIFS error (pid 0): replay_bud: bad node is
Hi Simon,
Thank you for the patch.
On ven., juil. 26, 2024 at 06:36, Simon Glass wrote:
> USB is stopped using driver model now, in dm_remove_devices_flags() in
> announce_and_cleanup() at the top of this file.
>
> The usb_stop() call actually unbinds devices.
>
> When a USB device is unbound,
On 7/25/24 19:22, Tom Rini wrote:
> On Thu, Jul 25, 2024 at 02:57:21PM +0200, Jerome Forissier wrote:
>
>> This is a rework of a patch series by Maxim Uvarov: "net/lwip: add lwip
>> library for the network stack" [1]. The goal is to introduce the lwIP TCP/IP
>> stack [2] [3] as an alternative t
On Mon, 29 Jul 2024 at 18:18, Jerome Forissier
wrote:
>
> Hi Ilias,
>
> On 7/29/24 14:29, Ilias Apalodimas wrote:
> > Hi Jerome,
> >
> > On Thu, 25 Jul 2024 at 15:59, Jerome Forissier
> > wrote:
> >>
> >> Add support for setting the TFTP block size. The default value (1468)
> >> is fine for Ether
Having zynqmp firmware is actually only one valid configuration. In QEMU
case for example there is no PMU that's why this checking can't end up in
panic that's why code remove this code completely.
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c | 13 -
1 file changed,
Add a function to count the nodes of a list.
Taken from linux 6.11-rc1 tag commit 8400291e289e.
Signed-off-by: Sughosh Ganu
---
include/linux/list.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/include/linux/list.h b/include/linux/list.h
index 6910721c00..0f9d939b05 1006
Use the API function list_count_nodes() to count the number of EFI
memory map entries.
Signed-off-by: Sughosh Ganu
---
lib/efi_loader/efi_memory.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index 12cf23fa3f..
Populate the previous memory descriptor node pointer only after it's
parent struct has been initialised. The compiler fixes this logic to
do the right thing, but it is better to have correct code in place.
Signed-off-by: Sughosh Ganu
---
lib/efi_loader/efi_memory.c | 3 ++-
1 file changed, 2 ins
Use the list_for_each_entry() API to get the efi_mem_list node
directly, instead of making an additional call to list_entry().
Signed-off-by: Sughosh Ganu
---
lib/efi_loader/efi_memory.c | 25 -
1 file changed, 8 insertions(+), 17 deletions(-)
diff --git a/lib/efi_loader
The linux kernel has the list_count_nodes() API functions which is
used for counting nodes of a list. This has now been imported in
U-Boot as part of an earlier commit. Use this function and drop the
list_count_items().
Signed-off-by: Sughosh Ganu
---
drivers/core/util.c | 14 ++
inc
From: Tejas Bhumkar
Since the opcode SPINOR_OP_CHIP_ERASE (0xc7) is not supported
for the S28HS02GT flash, the NO_CHIP_ERASE flag has been added
to enable sector erase functionality instead.
Signed-off-by: Tejas Bhumkar
Signed-off-by: Prasad Kummari
---
drivers/mtd/spi/spi-nor-ids.c | 2 +-
1
From: Tejas Bhumkar
Since the opcode SPINOR_OP_CHIP_ERASE (0xc7) is not supported
for the S28HS02GT flash, the NO_CHIP_ERASE flag has been added
to enable sector erase functionality instead.
Signed-off-by: Tejas Bhumkar
Signed-off-by: Prasad Kummari
---
Changes in v2:
- corrected commit subjec
Signed-off-by: Emil Kronborg
---
doc/usage/cmd/pwm.rst | 80 +++
doc/usage/index.rst | 1 +
2 files changed, 81 insertions(+)
create mode 100644 doc/usage/cmd/pwm.rst
diff --git a/doc/usage/cmd/pwm.rst b/doc/usage/cmd/pwm.rst
new file mode 100644
index
On Wed, Jul 24, 2024 at 12:57 PM Marek Vasut wrote:
Hello Marek,
I'll do the changes. Thanks for your input.
Best regards,
Fedor
> On 7/24/24 11:59 AM, fedorr...@gmail.com wrote:
> > From: Fedor Ross
> >
> > The TXFIFO register of LPI2C only has one byte length, and if the length
> > of the d
> Subject: [PATCH v1] mmc: fix signed vs unsigned compare in read
> check in _spl_load()
>
> Fix signed vs unsigned compare in read check in _spl_load()
>
> Issue: when info->read() returns a negative value because of an error,
>the comparison of 'read' (signed) with 'sizeof(*header)'
>
Add support for *_lr SOCs. Without this change chips are not going to be
properly identified and bitstream programming won't work.
Signed-off-by: Michal Simek
---
arch/arm/mach-zynq/cpu.c | 2 ++
include/zynqpl.h | 6 ++
2 files changed, 8 insertions(+)
diff --git a/arch/arm/mach-z
Hi Peter,
unfortunately i don't have any of such 548x boards, so cannot
help that much, but if you can manage to have it working, it will
be great.
Considering 548x is with mmu, mcf5441x startup code may be helpful,
even if it's isa_C (your is isa_B).
mcf5441x is tested here, and it is actually
On Tue, Jul 30, 2024 at 11:48:06AM +0200, Jerome Forissier wrote:
>
>
> On 7/25/24 19:22, Tom Rini wrote:
> > On Thu, Jul 25, 2024 at 02:57:21PM +0200, Jerome Forissier wrote:
> >
> >> This is a rework of a patch series by Maxim Uvarov: "net/lwip: add lwip
> >> library for the network stack" [1]
Hi Ilias,
On Tue, 30 Jul 2024 at 04:05, Ilias Apalodimas
wrote:
> Hi Raymond
>
>
> On Tue, 2 Jul 2024 at 21:33, Raymond Mao wrote:
> >
> > Add RSA helper layer on top on MbedTLS PK and RSA library.
> > Introduce _LEGACY and _MBEDTLS kconfigs for RSA helper legacy and
> > MbedTLS implementations
Hi Ilias,
On Tue, 30 Jul 2024 at 04:04, Ilias Apalodimas
wrote:
> Hi Raymond,
>
> On Tue, 2 Jul 2024 at 21:33, Raymond Mao wrote:
> >
> > Previous patch has introduced MbedTLS porting layer for mscode parser,
> > here to adjust the header and makefiles accordingly.
> >
> > Signed-off-by: Raymon
On 7/30/24 16:02, Tom Rini wrote:
> On Tue, Jul 30, 2024 at 11:48:06AM +0200, Jerome Forissier wrote:
>>
>>
>> On 7/25/24 19:22, Tom Rini wrote:
>>> On Thu, Jul 25, 2024 at 02:57:21PM +0200, Jerome Forissier wrote:
>>>
This is a rework of a patch series by Maxim Uvarov: "net/lwip: add lwip
The merged upstream DT node for OTP differs in nodename and a future
update of dts/upstream to devicetree-rebasing v6.11-rc1-dts tag or newer
will cause build issues.
This series replace the node in soc u-boot dtsi with the upstream node.
Changes in v2:
- Drop patch that changed the nodename to m
The merged upstream DT node for OTP differs in nodename and will cause
following build errors once rk3308.dtsi in dts/upstream is updated:
ERROR (duplicate_label): /nvmem@ff21: Duplicate label 'otp' on
/nvmem@ff21 and /efuse@ff21
ERROR (duplicate_label): /nvmem@ff21/id@7: Dupl
The RK3308 SoC contains a controller for one-time-programmable memory,
add a device node for it.
Signed-off-by: Jonas Karlman
Link: https://lore.kernel.org/r/20240521211029.1236094-9-jo...@kwiboo.se
Signed-off-by: Heiko Stuebner
[ upstream commit: 36d3bbc8cdbef2f83391f770265ac4c37a99 ]
(ch
Hi Sughosh,
On Mon, 29 Jul 2024 at 19:49, Sughosh Ganu wrote:
>
> On Mon, 29 Jul 2024 at 23:46, Tom Rini wrote:
> >
> > On Mon, Jul 29, 2024 at 09:28:57AM -0600, Simon Glass wrote:
> > > Hi Sughosh,
> > >
> > > On Sun, 28 Jul 2024 at 12:07, Sughosh Ganu
> > > wrote:
> > > >
> > > > On Thu, 25
Hi Neha,
On Mon, 29 Jul 2024 at 22:44, Neha Malcom Francis wrote:
>
> Hi Simon
>
> On 20/07/24 16:19, Simon Glass wrote:
> > FIT provides a way to select between different devicetree blobs
> > depending on the model. This works fine for U-Boot proper and allows SPL
> > to select the correct blob
Hi Ilias,
On Tue, 30 Jul 2024 at 02:20, Ilias Apalodimas
wrote:
>
> On Mon, 29 Jul 2024 at 18:28, Simon Glass wrote:
> >
> > Hi Ilias,
> >
> > On Mon, 29 Jul 2024 at 04:02, Ilias Apalodimas
> > wrote:
> > >
> > > Hi Simon
> > >
> > > On Fri, 26 Jul 2024 at 17:54, Simon Glass wrote:
> > > >
> >
This data structure provides a list of pointers / array of structures.
I was planning to use it for the lmb restructure, to allow it to
support any number of entries, but then I gave up on it.
There are quite a few places in U-Boot where such a list would be
useful, since it supports growing the a
At present in tests it is possible to cause an out-of-memory condition
with malloc() but not realloc(). Add support to realloc() too, so code
which uses that function can be tested.
Signed-off-by: Simon Glass
---
(no changes since v1)
common/dlmalloc.c | 4
1 file changed, 4 insertions(+)
The current implementation can return an extra result at the end when
the string ends with a space. Fix this by adding a special case.
Signed-off-by: Simon Glass
---
(no changes since v1)
lib/strto.c | 4 +++-
test/str_ut.c | 4 +---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --g
In various places it is useful to have an array of structures, but allow
it to grow. In some cases we work around it by setting maximum number of
entries, using a Kconfig option. In other places we use a linked list,
which does not provide for random access and can complicate the code.
Introduce a
Use this new data structure in the utility function.
Signed-off-by: Simon Glass
---
(no changes since v3)
Changes in v3:
- Update for alist_add() API change
lib/strto.c | 35 +++
1 file changed, 19 insertions(+), 16 deletions(-)
diff --git a/lib/strto.c b/lib/
This series adds a few tweaks to Sugosh's lmb series to show:
- save/restore of test stage
- putting lmb in a struct
- small code-size improvement
Simon Glass (4):
lmb: Put internal details in a struct
lmb: Tighten up the code in lmb_add_region_flags()
lmb: Split init into two functions
l
Rather than exporting the internal details of lmb, create a struct which
holds the lists.
Signed-off-by: Simon Glass
---
include/lmb.h | 10 -
lib/lmb.c | 56 +--
test/cmd/bdinfo.c | 8 +++
3 files changed, 43 insertions(+), 3
This function has more special cases than it needs. Simplify it to
reduce code size and complexity.
Signed-off-by: Simon Glass
---
lib/lmb.c | 57 +++
1 file changed, 19 insertions(+), 38 deletions(-)
diff --git a/lib/lmb.c b/lib/lmb.c
index
The normal case for initing lmb is to set up all the memory regions. Put
that in a separate function, called lmb_init(). The other function is
now only used for testing.
Note that tests never set up the memory regions, so we can drop that
code.
Signed-off-by: Simon Glass
---
common/board_r.c |
Tests should not change the lmb state, so provide a way to save and
restore the state.
Note: The _norun tests can now become normal tests.
When tests fail, lmb is broken. This is probably fine. If it causes
problems we could save/restore outside the test, using a UT_TESTF_ flag.
Signed-off-by: S
This series cherry picks related rk3308 and rk3308-rock-pi-s commits
from devicetree-rebasing v6.11-rc1-dts tag to improve support for the
new v1.5 hw revision of Radxa Rock Pi S.
This series loosely depends on following patches:
- mmc: rockchip_dw_mmc: Allow 4-bit mode when 8-bit mode is supporte
Add a disabled RK3308 IO voltage domains node to SoC DT.
Signed-off-by: Jonas Karlman
Link: https://lore.kernel.org/r/20240521211029.1236094-12-jo...@kwiboo.se
Signed-off-by: Heiko Stuebner
[ upstream commit: d1829ba469d5743734e37d59fece73e3668ab084 ]
(cherry picked from commit cebde305971e33a
UAR0 CTS/RTS is not wired to any pin and is not used for the default
serial console use of UART0 on ROCK Pi S.
Override the SoC defined pinctrl props to limit configuration of the
two xfer pins wired to one of the GPIO pin headers.
Fixes: 2e04c25b1320 ("arm64: dts: rockchip: add ROCK Pi S DTS sup
Add cap-mmc-highspeed to allow use of high speed MMC mode using an eMMC
to uSD board. Use disable-wp to signal that no physical write-protect
line is present. Also add vcc_io used for card and IO line power as
vmmc-supply.
Fixes: 2e04c25b1320 ("arm64: dts: rockchip: add ROCK Pi S DTS support")
Sig
Be explicit about the Ethernet port and define mdio and ethernet-phy
nodes in the device tree for ROCK Pi S.
Fixes: bc3753aed81f ("arm64: dts: rockchip: rock-pi-s add more peripherals")
Signed-off-by: Jonas Karlman
Link: https://lore.kernel.org/r/20240521211029.1236094-8-jo...@kwiboo.se
Signed-of
Update WiFi SDIO and BT UART related props to better reflect details
about the optional onboard RTL8723DS WiFi/BT module.
Also correct the compatible used for bluetooth to match the WiFi/BT
module used on the board.
Fixes: bc3753aed81f ("arm64: dts: rockchip: rock-pi-s add more peripherals")
Sign
The VCCIO4 io-domain used for WiFi/BT is using 1v8 IO signal voltage.
Add io-domains node with the VCCIO supplies connected on the board.
Signed-off-by: Jonas Karlman
Link: https://lore.kernel.org/r/20240521211029.1236094-13-jo...@kwiboo.se
Signed-off-by: Heiko Stuebner
[ upstream commit: 100b
With the emmc and uart0 DT nodes updated to v6.11-rc1 in dts/upstream
there is no longer any need to keep overrides in board u-boot dtsi.
Signed-off-by: Jonas Karlman
---
arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi | 19 ---
1 file changed, 19 deletions(-)
diff --git a/arch/arm/dt
Add LED=y and LED_GPIO=y to support the onboard leds.
Add ROCKCHIP_IODOMAIN=y to configure correct io voltage domains.
Add DM_MDIO=y now that the DT contain a Ethernet phy node.
Signed-off-by: Jonas Karlman
---
configs/rock-pi-s-rk3308_defconfig | 4
1 file changed, 4 insertions(+)
diff
> From: Simon Glass
> Date: Tue, 30 Jul 2024 08:38:03 -0600
>
> Hi Ilias,
>
> On Tue, 30 Jul 2024 at 02:20, Ilias Apalodimas
> wrote:
> >
> > On Mon, 29 Jul 2024 at 18:28, Simon Glass wrote:
> > >
> > > Hi Ilias,
> > >
> > > On Mon, 29 Jul 2024 at 04:02, Ilias Apalodimas
> > > wrote:
> > > >
There is new chip coming which is using new _lr suffix that's why record it
in the list to enable bitstream in bit format loading.
Signed-off-by: Michal Simek
---
drivers/soc/soc_xilinx_zynqmp.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/soc/soc_xilinx_zynqmp.c b/driver
On Tue, 30 Jul 2024 at 17:38, Simon Glass wrote:
>
> Hi Ilias,
>
> On Tue, 30 Jul 2024 at 02:20, Ilias Apalodimas
> wrote:
> >
> > On Mon, 29 Jul 2024 at 18:28, Simon Glass wrote:
> > >
> > > Hi Ilias,
> > >
> > > On Mon, 29 Jul 2024 at 04:02, Ilias Apalodimas
> > > wrote:
> > > >
> > > > Hi Si
Hi Ilias,
On Tue, 30 Jul 2024 at 08:54, Ilias Apalodimas
wrote:
>
> On Tue, 30 Jul 2024 at 17:38, Simon Glass wrote:
> >
> > Hi Ilias,
> >
> > On Tue, 30 Jul 2024 at 02:20, Ilias Apalodimas
> > wrote:
> > >
> > > On Mon, 29 Jul 2024 at 18:28, Simon Glass wrote:
> > > >
> > > > Hi Ilias,
> > >
Hi Mark,
On Tue, 30 Jul 2024 at 08:53, Mark Kettenis wrote:
>
> > From: Simon Glass
> > Date: Tue, 30 Jul 2024 08:38:03 -0600
> >
> > Hi Ilias,
> >
> > On Tue, 30 Jul 2024 at 02:20, Ilias Apalodimas
> > wrote:
> > >
> > > On Mon, 29 Jul 2024 at 18:28, Simon Glass wrote:
> > > >
> > > > Hi Ilia
On Tue, Jul 30, 2024 at 09:18:02AM -0600, Simon Glass wrote:
> Hi Ilias,
>
> On Tue, 30 Jul 2024 at 08:54, Ilias Apalodimas
> wrote:
> >
> > On Tue, 30 Jul 2024 at 17:38, Simon Glass wrote:
> > >
> > > Hi Ilias,
> > >
> > > On Tue, 30 Jul 2024 at 02:20, Ilias Apalodimas
> > > wrote:
> > > >
> >
From: Fedor Ross
Fix a typo in a debug message. It should be 'for' not 'fot' .
Signed-off-by: Fedor Ross
---
Cc: Heiko Schocher
Cc: Tom Rini
Cc: Marek Vasut
---
Changes in v2:
- Add additional '---' below SoB line to separate Cc list. This way it
does not get included in the commit messag
From: Fedor Ross
Instead of using the hard-coded bus speed value I2C_SPEED_STANDARD_RATE,
use the actual configured bus speed. This way the bus speed doesn't
change suddenly after calling the imx_lpi2c_probe_chip() function for
example.
Signed-off-by: Fedor Ross
---
Cc: Heiko Schocher
Cc: Tom
From: Fedor Ross
The TXFIFO register of LPI2C only has one byte length, and if the length
of the data that needs to be read exceeds 256 bytes, it needs to be
written to TXFIFO multiple times.
Signed-off-by: Fedor Ross
---
Cc: Heiko Schocher
Cc: Tom Rini
Cc: Marek Vasut
---
Changes in v2:
-
Thank you for the feedback.
It looks like the mcf5441x executes from RAM. At least looking at the
configuration for the stmark2, which defines CONFIG_SERIAL_BOOT and
CONFIG_SF_SBF. This appears to copy from an external device using the
DSPI into RAM. After loaded, _start finally executes. Inte
A bit more digging.
When I follow the chain through the PLT call to memset, it does some
lookups in the .got.plt section. And even on the MCF5445x, it seems
to ultimately result in a lookup of 0x.
Here's the chain for the MCF5445x. I did the manually using
objdump/nm, but I think the ma
Hi Tom,
On Tue, 30 Jul 2024 at 09:24, Tom Rini wrote:
>
> On Tue, Jul 30, 2024 at 09:18:02AM -0600, Simon Glass wrote:
> > Hi Ilias,
> >
> > On Tue, 30 Jul 2024 at 08:54, Ilias Apalodimas
> > wrote:
> > >
> > > On Tue, 30 Jul 2024 at 17:38, Simon Glass wrote:
> > > >
> > > > Hi Ilias,
> > > >
>
On Tue, 30 Jul 2024 at 05:11, Sughosh Ganu wrote:
>
> Add a function to count the nodes of a list.
>
> Taken from linux 6.11-rc1 tag commit 8400291e289e.
>
> Signed-off-by: Sughosh Ganu
> ---
> include/linux/list.h | 15 +++
> 1 file changed, 15 insertions(+)
Reviewed-by: Simon Glas
On Tue, 30 Jul 2024 at 05:11, Sughosh Ganu wrote:
>
> Use the API function list_count_nodes() to count the number of EFI
> memory map entries.
>
> Signed-off-by: Sughosh Ganu
> ---
> lib/efi_loader/efi_memory.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
Reviewed-by: Simon Glas
On Tue, 30 Jul 2024 at 05:11, Sughosh Ganu wrote:
>
> Populate the previous memory descriptor node pointer only after it's
its
> parent struct has been initialised. The compiler fixes this logic to
> do the right thing, but it is better to have correct code in place.
>
> Signed-off-by: Sughosh G
On Tue, 30 Jul 2024 at 05:12, Sughosh Ganu wrote:
>
> The linux kernel has the list_count_nodes() API functions which is
> used for counting nodes of a list. This has now been imported in
> U-Boot as part of an earlier commit. Use this function and drop the
> list_count_items().
>
> Signed-off-by:
Hi Sughosh,
On Wed, 24 Jul 2024 at 00:03, Sughosh Ganu wrote:
>
> The current LMB API's for allocating and reserving memory use a
> per-caller based memory view. Memory allocated by a caller can then be
> overwritten by another caller. Make these allocations and reservations
> persistent using th
This series add support for the RK3308 based Radxa ROCK S0 board.
Features tested on a ROCK S0 v1.2 with 512 MiB RAM and 8 GiB eMMC:
- SD-card boot
- eMMC boot
- Ethernet
- USB gadget
- USB host
This series depends on the following patch:
- arm64: dts: rockchip: Add rk3308 IO voltage domains [1]
Radxa ROCK S0 is a single-board computer based on the Rockchip RK3308B
SoC in an ultra-compact form factor.
Add initial support for eMMC, SD-card, Ethernet, WiFi/BT and USB.
Signed-off-by: Jonas Karlman
Link: https://lore.kernel.org/r/20240521212247.1240226-3-jo...@kwiboo.se
Signed-off-by: Heiko
Radxa ROCK S0 is a single-board computer based on the Rockchip RK3308B
SoC in an ultra-compact form factor. Add a board target for the board.
Features tested on a ROCK S0 v1.2 with 512 MiB RAM and 8 GiB eMMC:
- SD-card boot
- eMMC boot
- Ethernet
- USB gadget
- USB host
Signed-off-by: Jonas Karlm
On Tue, Jul 30, 2024 at 01:42:17PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Tue, 30 Jul 2024 at 09:24, Tom Rini wrote:
> >
> > On Tue, Jul 30, 2024 at 09:18:02AM -0600, Simon Glass wrote:
> > > Hi Ilias,
> > >
> > > On Tue, 30 Jul 2024 at 08:54, Ilias Apalodimas
> > > wrote:
> > > >
> > > > On
Hi Tom,
On Tue, 30 Jul 2024 at 13:49, Tom Rini wrote:
>
> On Tue, Jul 30, 2024 at 01:42:17PM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Tue, 30 Jul 2024 at 09:24, Tom Rini wrote:
> > >
> > > On Tue, Jul 30, 2024 at 09:18:02AM -0600, Simon Glass wrote:
> > > > Hi Ilias,
> > > >
> > > > On T
On Tue, Jul 30, 2024 at 02:05:19PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Tue, 30 Jul 2024 at 13:49, Tom Rini wrote:
> >
> > On Tue, Jul 30, 2024 at 01:42:17PM -0600, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Tue, 30 Jul 2024 at 09:24, Tom Rini wrote:
> > > >
> > > > On Tue, Jul 30, 20
Hi Tom,
On Tue, 30 Jul 2024 at 14:11, Tom Rini wrote:
>
> On Tue, Jul 30, 2024 at 02:05:19PM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Tue, 30 Jul 2024 at 13:49, Tom Rini wrote:
> > >
> > > On Tue, Jul 30, 2024 at 01:42:17PM -0600, Simon Glass wrote:
> > > > Hi Tom,
> > > >
> > > > On Tue
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