On 9/1/25 19:00, Andrew Goodbody wrote:
The Cadence TTC has 3 channels that can each be used for PWM functions.
Ensure that the array has sufficient elements to avoid a possible memory
access overrun. Use a macro to keep the array size and limit checks in
sync so adjust checks to work with thi
On 8/28/25 15:42, Michal Simek wrote:
There is no reason to call SMC from clock driver directly when clock driver
is a child of firmware driver which is providing it.
Signed-off-by: Michal Simek
---
drivers/clk/clk_versal.c | 19 ---
1 file changed, 4 insertions(+), 15 de
Introduce the base dts files needed for u-boot or to augment the linux
dtbs for use in the u-boot-spl and u-boot binaries. Support added for
HS-SE and HS-FS boot binaries for AM62dx via binman.
Signed-off-by: Paresh Bhagat
---
arch/arm/dts/Makefile|2 +
arch/arm/dts/k
Hi Marek
On 09-Sep-25 4:32 AM, Marek Vasut wrote:
On 9/8/25 3:41 PM, Ravulapalli, Naresh Kumar wrote:
On 08-Sep-25 6:32 PM, Marek Vasut wrote:
On 9/8/25 10:44 AM, Ravulapalli, Naresh Kumar wrote:
Hi Marek
On 02-Sep-25 11:48 PM, Marek Vasut wrote:
[CAUTION: This email is from outside you
Introduce the bare minimum SD and UART support for AM62D2-EVM.
Signed-off-by: Paresh Bhagat
---
board/ti/am62dx/Kconfig | 26 ++
board/ti/am62dx/MAINTAINERS | 8
board/ti/am62dx/Makefile| 7 +++
board/ti/am62dx/am62dx.env | 21 +
On Mon, Sep 08, 2025 at 01:31:20PM +0200, Stephan Gerhold wrote:
> There have been issues with autoboot on DB410c for years, where autoboot
> gets interrupted by spurious input on the UART console. I've tried fixing
> this back in 2021, but it turned out this fix was not enough. Looking into
> it f
On Mon, Sep 08, 2025 at 03:18:38PM -0600, John Ripple wrote:
>The ahab_commit command allows the user to commit into the SECO fuses
>that control the SRK key revocation information. This is used to Revoke
>compromised SRK keys.
>
>To use ahab_commit, the boot container must be built with an SRK
>re
From: Alif Zakuan Yuslaimi
Introduce header file to define the clock indexes for the Agilex
platform.
Signed-off-by: Alif Zakuan Yuslaimi
---
include/dt-bindings/clock/agilex-clock.h | 71
1 file changed, 71 insertions(+)
create mode 100644 include/dt-bindings/clock/a
> -邮件原件-
> 发件人: Tom Rini
> 发送时间: 2025年9月8日 22:35
> 收件人: Alice Guo (OSS)
> 抄送: Fabio Estevam ; Simon Glass
> ; Alper Nebi Yasak ; Stefano
> Babic ; dl-uboot-imx ; Alice
> Guo ; Marek Vasut ;
> thar...@gateworks.com; u-boot@lists.denx.de
> 主题: Re: 回复: [PATCH v4 1/2] binman: add a new entry
On 6/30/25 7:18 AM, Heinrich Schuchardt wrote:
Am 30. Juni 2025 02:08:05 MESZ schrieb Marek Vasut :
Add support for jumping to Linux kernel through OpTee-OS on ARMv7a.
This is only supported if U-Boot runs in PL1 secure. This change adds
two components, one is fitImage OpTee-OS loadable handler,
On 8/21/25 8:47 AM, Michal Simek wrote:
On 8/20/25 22:59, Marek Vasut wrote:
On 8/19/25 4:25 PM, Michal Simek wrote:
[...]
ZynqMP> mtd read "U-Boot storage variables" 1000
It would be better to spray the 0x1000 area with pattern first,
otherwise, if the 'mtd read' fails, such failure migh
From: Alif Zakuan Yuslaimi
Update Agilex clock driver to support enabling or disabling
the peripheral clocks via clock driver model APIs.
The caller will pass the clock ID to this driver and the driver
will then proceed to manipulate the desired bit in the Agilex clock
manager peripheral PLL reg
From: Alif Zakuan Yuslaimi
Update the driver to enable or disable the SDMMC clock via
clock driver model API instead of doing it in the driver itself.
This allows for scalability of the driver for various SoCFPGA
devices.
Signed-off-by: Alif Zakuan Yuslaimi
---
drivers/mmc/socfpga_dw_mmc.c |
From: Alif Zakuan Yuslaimi
This patch series introduces support for Agilex clock definitions and adds
enable/disable API functionality for the Agilex clock driver. The series
also updates the SocFPGA DW MMC driver to utilize the new clock API for
SDMMC clock management.
Detailed changelog can be
On 9/8/25 3:41 PM, Ravulapalli, Naresh Kumar wrote:
On 08-Sep-25 6:32 PM, Marek Vasut wrote:
On 9/8/25 10:44 AM, Ravulapalli, Naresh Kumar wrote:
Hi Marek
On 02-Sep-25 11:48 PM, Marek Vasut wrote:
[CAUTION: This email is from outside your organization. Unless you
trust the sender, do not c
On Mon, Sep 08, 2025 at 11:24:29AM +0530, Sidharth Seela wrote:
> I am confused on where to place this information of the
> configs. As the new configurations need to be added to the default
> am335x_evm_defconfig, as well as some unused configs need to go to make
> space; to enable falcon booting.
The ahab_commit command allows the user to commit into the SECO fuses
that control the SRK key revocation information. This is used to Revoke
compromised SRK keys.
To use ahab_commit, the boot container must be built with an SRK
revocation bit mask that is not 0x0. For the SPSDK provided by NXP, t
On Tue, 02 Sep 2025 01:49:21 +0200, Heinrich Schuchardt wrote:
> Provide test environments for running
> qemu-riscv64_smode and qemu-riscv64_smode_acpi.
>
> These use the OpenSBI implementation provided by QEMU and
> pass main u-boot as -kernel parameter.
>
> ACPI is enabled for both boards. We
Hi Vignesh,
On 03/09/25 09:38, Raghavendra, Vignesh wrote:
Hi,
On 9/2/2025 11:36 AM, Paresh Bhagat wrote:
[...]
Branch used-next
Kernel Patch
https://lore.kernel.org/all/20250708085839.1498505-1-p-bha...@ti.com/
Boot Logs
https://gist.github.com/paresh-bhagat12/6e169340c222427c7648b1ef3ca
Hi Bhimeswararao,
On 9/2/25 7:07 AM, Bhimeswararao Matsa wrote:
This document introduces a developer guide for PMIC and regulator
support in U-Boot. It covers subsystem architecture, Kconfig options,
Device Tree integration, SPL considerations, and debugging methods,
using TPS65219 + BeaglePlay
Am Montag, dem 08.09.2025 um 08:33 +0200 schrieb Yannic Moog:
> Enable OP-TEE config and RNG by default.
> Set OP-TEE load address to end of 1GiB RAM for phycore-imx8mp and
> phycore-imx8mm as the boards support a 1GiB RAM variant (although not
> yet upstreamed for phycore-imx8mm).
> The imx8mm-phy
When PMIC drivers are disabled their functions should not be called.
Signed-off-by: Maarten Brock
---
board/ti/am335x/board.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 2b7ab68e83c..284c31cc329 100644
--- a/
Hi Andrew,
On 02/09/25 19:15, Andrew Davis wrote:
On 9/2/25 1:07 AM, Paresh Bhagat wrote:
Introduce the base dts files needed for u-boot or to augment the
linux dtbs for use in the u-boot-spl and u-boot binaries.
Support added for HS-SE and HS-FS boot binaries for AM62dx via
binman.
Signed-of
Hello,
ping for the following series:
https://patchwork.ozlabs.org/project/uboot/list/?series=469871
I’d be grateful for any feedback when convenient.
Thanks in advance for your time!
Best regards,
Uros
On 08-Sep-25 2:14 PM, Ravulapalli, Naresh Kumar wrote:
Hi Marek
On 02-Sep-25 11:48 PM, Marek Vasut wrote:
On 9/2/25 9:52 AM, Ravulapalli, Naresh Kumar wrote:
On 30-Aug-25 5:30 AM, Marek Vasut wrote:
On 8/29/25 6:19 PM, Ravulapalli, Naresh Kumar wrote:
Hi Marek
On 29-Aug-25 2:11 PM, M
On Mon Sep 8, 2025 at 8:24 AM UTC, Neil Armstrong via groups.io wrote:
> On 07/09/2025 16:36, Ferass El Hafidi wrote:
>> Add initial boilerplate for U-Boot SPL support on Amlogic.
>>
>> Signed-off-by: Ferass El Hafidi
>> ---
>> arch/arm/include/asm/arch-meson/clock-gx.h | 1 +
>> arch/arm/in
On Mon, Sep 8, 2025 at 7:21 AM Jerome Forissier
wrote:
>
> Hi Tim,
>
> On 9/5/25 19:45, Tim Harvey wrote:
> > Hi Jerome,
> >
> > I'm working with a board that has an IMX ENETC MAC on it
> > drivers/net/fsl_enetc.c and when configured for LWIP it fails and
> > warns about RX buffers not being 64B a
On Mon, 8 Sep 2025 16:05:04 +
Maarten Brock wrote:
> When PMIC drivers are disabled their functions should not be called.
>
> Signed-off-by: Maarten Brock
There is already board check with board_is_bone or board_is_beaglebonex call.
Is it not sufficient? Why would we disable the PMIC suppor
On Tue, 26 Aug 2025 11:05:05 +0800, Boon Khai Ng wrote:
> Add a MAINTAINERS entry for the DesignWare XGMAC network driver to
> ensure future patches are properly routed for review and support.
>
>
Applied to u-boot/master, thanks!
[1/1] MAINTAINERS: Add entry for DesignWare XGMAC driver
On Mon, 01 Sep 2025 11:46:55 +0530, Anurag Dutta wrote:
> This patch series migrates from .h to .env format for am57xx/dra7xx.
> Also, we do relevant changes so that the fdtfile can be set from C code.
>
> logs : https://gist.github.com/anuragdutta731/82560cc9bc958ca70a25a95a7031eeea
>
> Changel
On Sun, 07 Sep 2025 22:21:57 +0200, Marek Vasut wrote:
> Trivial last minute fix ups.
>
> The following changes since commit 328747974a0620d0996113fe2b3906b06e96de00:
>
> Merge branch 'master' of
> https://source.denx.de/u-boot/custodians/u-boot-samsung (2025-09-05 08:15:16
> -0600)
>
> are
On 9/5/25 11:18 AM, Anshul Dalal wrote:
Hi all,
In U-Boot, TI only provides a single memory map for all k3 platforms, this
does not scale for devices where atf and optee lie outside the range 0x8000
- 0x8008 and 0x9e78 - 0xa000 respectively.
There are also issues for devices
Hi Tim,
On 9/5/25 19:45, Tim Harvey wrote:
> Hi Jerome,
>
> I'm working with a board that has an IMX ENETC MAC on it
> drivers/net/fsl_enetc.c and when configured for LWIP it fails and
> warns about RX buffers not being 64B aligned:
> WARNING at drivers/net/fsl_enetc.c:776/enetc_setup_rx_bdr()!
>
On 08-Sep-25 6:32 PM, Marek Vasut wrote:
On 9/8/25 10:44 AM, Ravulapalli, Naresh Kumar wrote:
Hi Marek
On 02-Sep-25 11:48 PM, Marek Vasut wrote:
[CAUTION: This email is from outside your organization. Unless you
trust the sender, do not click on links or open attachments as it may
be a fra
Hi Svyatoslav,
> вт, 26 серп. 2025 р. о 12:39 Lukasz Majewski
> пише:
> >
> > The Tegra30 SoC is a bit special, as it doesn't have the separate
> > IP block to provide watchdog functionality.
> >
> > Instead, timer IP block allows such functionality when properly
> > configured.
> >
> > As in the
On 9/8/25 10:44 AM, Ravulapalli, Naresh Kumar wrote:
Hi Marek
On 02-Sep-25 11:48 PM, Marek Vasut wrote:
[CAUTION: This email is from outside your organization. Unless you
trust the sender, do not click on links or open attachments as it may
be a fraudulent email attempting to steal your inform
Some of the register definitions are inconsistently named (likely copied
as-is from Qualcomm's Little Kernel/LK bootloader, which uses the
MSM_BOOT_UART naming scheme). Rename them to be in line with the other
register definitions and move them up to be next to the related register.
No functional
On 9/8/25 1:39 PM, Stephan Gerhold wrote:
Hello Stephan,
On Mon, Apr 07, 2025 at 11:54:20AM +0200, Stephan Gerhold wrote:
The ehci-msm driver has several subtle issues and stale code. Most of them
are minor and do not cause issues during normal usage. The last patch is
the most critical, it fi
Lunzn Fastrhino R66S is a high-performance mini router.
Specification:
- Rockchip RK3568
- 1/2GB LPDDR4 RAM
- SD card slot
- 2x USB 3.0 Port
- 2x 2500 Base-T (PCIe, r8125b)
- 12v DC Jack
Signed-off-by: Tianling Shen
---
.../arm/dts/rk3568-fastrhino-r66s-u-boot.dtsi | 3 +
board/rockchip/evb_rk
The UART DM controller supports different channel data packing modes,
either the 4-character packing mode (where 32-bit are read/written at once)
or the single-character mode (where only a single character is read/written
at a time). The 4-character mode can be more efficient, but the
single-charac
According to the documentation of the UART controller in the APQ8016E TRM,
clearing bits inside UARTDM_DMEN requires resetting the transmitter and/or
receiver. We do reset inside uart_dm_init(), but before writing to
UARTDM_DMEN. This doesn't seem to cause problems in practice, but let's
move the r
There have been issues with autoboot on DB410c for years, where autoboot
gets interrupted by spurious input on the UART console. Back in 2021, I've
tried to fix this by inserting a delay before UART initialization, but it
has turned out this is not working reliably either.
It looks like the root c
The documentation for the UART controller in the APQ8016E specifies that
both RESET and ENABLE commands must be issued to set up the receiver and
transmitter, but at the moment we only issue RESET. This doesn't seem to
cause issues in practice (looks like the reset already re-enables the
receiver/t
This is applied for all devices upstream in Linux now (when using the
console-specific pinctrl templates).
Signed-off-by: Stephan Gerhold
---
arch/arm/dts/apq8016-sbc-u-boot.dtsi | 9 -
1 file changed, 9 deletions(-)
diff --git a/arch/arm/dts/apq8016-sbc-u-boot.dtsi
b/arch/arm/dts/apq8
Hi Marek
On 02-Sep-25 11:48 PM, Marek Vasut wrote:
[CAUTION: This email is from outside your organization. Unless you trust
the sender, do not click on links or open attachments as it may be a
fraudulent email attempting to steal your information and/or compromise
your computer.]
On 9/2/25 9
Hi,
Am Mo., 8. Sept. 2025 um 13:02 Uhr schrieb Siddharth Vadapalli
:
>
> On Mon, Sep 08, 2025 at 10:52:37AM +0200, Heiko Thiery wrote:
> > Hi Siddhardth,
> >
> > Am Mi., 16. Apr. 2025 um 14:57 Uhr schrieb Siddharth Vadapalli
> > :
> > >
> > > Currently, the phy_config() API is invoked by the drive
On Mon, Sep 08, 2025 at 10:52:37AM +0200, Heiko Thiery wrote:
> Hi Siddhardth,
>
> Am Mi., 16. Apr. 2025 um 14:57 Uhr schrieb Siddharth Vadapalli
> :
> >
> > Currently, the phy_config() API is invoked by the driver only once since it
> > has been probed. While this works in general, it doesn't all
Hi Jonas,
I haven't updated the U-Boot patches yet. Currently waiting for RP1
bindings to come into the Linux Kernel.
I see that the brcm-pci driver was updated in the latest revisions, so
it should be carefully rebased.
Other patches, including board_late_init, seem not to be a problem.
I wi
Hi Siddhardth,
Am Mi., 16. Apr. 2025 um 14:57 Uhr schrieb Siddharth Vadapalli
:
>
> Currently, the phy_config() API is invoked by the driver only once since it
> has been probed. While this works in general, it doesn't allow the driver
> to bring the PHY back to its default reset state. As a resul
Update ethernet-related files for MediaTek ARM platform
Signed-off-by: Weijie Gao
---
Changes in v4: none
Changes in v3: none
Changes in v2: none
---
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3fb163aa1db..065834246de 10064
It's important to return the actual firmware data size as some
firmware files may have no checksum and need the size as the only
way for firmware validation check.
Signed-off-by: Weijie Gao
---
Changes in v4: none
---
drivers/misc/fs_loader.c | 6 +-
include/fs_loader.h | 4 +++-
2 file
The MediaTek MT7987/MT7988 SoCs features a built-in 2.5Gb PHY
connected to GMAC1. The PHY supports 10/100/1000/2500 Mbps
full-duplex only.
The PHY requires one or two firmware files. Firmware for MT7988 has
already been added to upstream: mediatek/mt7988/i2p5ge-phy-pmb.bin.
MT7987 has two firmware
Associate PHY device with its device node specified by phy-handle
property. This makes it possible for PHY drivers to read dedicated
information to configure the PHY device.
Signed-off-by: Weijie Gao
---
Changes in v4: none
Changes in v3: none
Changes in v2: none
---
drivers/net/mtk_eth/mtk_eth.
Use cmd_process() to remove the length limit of script name used for
run_command().
Signed-off-by: Weijie Gao
---
Changes in v4: Remove unneeded const from argv[0] used for cmd_process()
---
drivers/misc/fs_loader.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/dri
Am Montag, dem 08.09.2025 um 08:33 +0200 schrieb Yannic Moog:
> OP-TEE configs are enabled by default, change the doc to no longer
> declare OP-TEE as optional.
> Further, phycore-imx8mm and imx8mm-phygate-tauri-l use different
> build
> instructions, so dissolve the common file for building OP-TEE
On 07/09/2025 16:36, Ferass El Hafidi wrote:
Supports both GXBB and GXL SoCs.
Signed-off-by: Ferass El Hafidi
---
arch/arm/include/asm/arch-meson/dram-gx.h | 341 +
arch/arm/include/asm/arch-meson/dram-gxbb.h| 168 +
arch/arm/include/asm/arch-meson/d
On 07/09/2025 16:36, Ferass El Hafidi wrote:
Add initial boilerplate for U-Boot SPL support on Amlogic.
Signed-off-by: Ferass El Hafidi
---
arch/arm/include/asm/arch-meson/clock-gx.h | 1 +
arch/arm/include/asm/arch-meson/gx.h | 36
arch/arm/mach-meson/Kconfig|
On 07/09/2025 16:36, Ferass El Hafidi wrote:
Add binman configuration to meson-gx-u-boot.dtsi to automate building
bootable images using amlimage.
Signed-off-by: Ferass El Hafidi
---
arch/arm/dts/meson-gx-u-boot.dtsi | 142 ++
1 file changed, 142 insertion
On 07/09/2025 16:36, Ferass El Hafidi wrote:
Add kconfig fragments for building SPL binaries for:
· ODROID-C2
· Videostrong KII Pro
· Libre Computer LePotato (1 GB and 2 GB variants)
Signed-off-by: Ferass El Hafidi
---
board/amlogic/p200/spl-odroid-c2.config | 37 +
On 07/09/2025 16:36, Ferass El Hafidi wrote:
It is very limited and minimal, only implements putc/puts.
This minimal driver is intended to be used in SPL, and other
size-constrained situations.
Signed-off-by: Ferass El Hafidi
---
drivers/serial/serial.c | 2 +
drivers/serial/serial_m
I am confused on where to place this information of the
configs. As the new configurations need to be added to the default
am335x_evm_defconfig, as well as some unused configs need to go to make
space; to enable falcon booting.
On 9/7/25 01:00, Marek Vasut wrote:
> The clk_register_composite() does clk_resolve_parent_clk() look up,
> which requires valid udevice pointer. Do not pass NULL, pass a valid
> device pointer to prevent hang on registering ck_usbo_48m clock on
> STM32MP13xx.
>
> Signed-off-by: Marek Vasut
>
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