From: Dalon Westergreen
Rather then modifying the devicetree to add u-boot specific
requirements, use the -u-boot.dtsi convention to allow
binman to merge the devicetree appropriately.
Signed-off-by: Dalon Westergreen
---
.../socfpga_arria10_socdk_sdmmc-u-boot.dtsi | 34
From: Dalon Westergreen
This file is no longer needed and has been replaced with
socfpga_arria10_handoff_u-boot.dtsi and a generated header.
Signed-off-by: Dalon Westergreen
---
.../socfpga_arria10_socdk_sdmmc_handoff.dtsi | 329 --
1 file changed, 329 deletions(-)
delete
From: Dalon Westergreen
Generic handoff devicetree include uses a header generated by
the qts-filter-a10.sh script in mach-socfpga. The script
creates the header based on design specific implementations
for clock and pinmux configurations.
Signed-off-by: Dalon Westergreen
---
.../dts
From: Dalon Westergreen
Add the qts-filter-a10.sh generated handoff data for the arria10
socdk sdmmc uboot devicetree.
Signed-off-by: Dalon Westergreen
---
.../dts/socfpga_arria10_socdk_sdmmc_handoff.h | 305 ++
1 file changed, 305 insertions(+)
create mode 100644 arch/arm
From: Dalon Westergreen
Update the readme to add a simple description of using
the qts-filter-a10.sh script.
Signed-off-by: Dalon Westergreen
---
doc/README.socfpga | 37 +
1 file changed, 33 insertions(+), 4 deletions(-)
diff --git a/doc/README.socfpga b
From: Dalon Westergreen
Sync devicetree from 5.2 kernel.
Signed-off-by: Dalon Westergreen
---
arch/arm/dts/socfpga_arria10.dtsi| 104 ++-
arch/arm/dts/socfpga_arria10_socdk.dtsi | 75 +++--
arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 53
From: Dalon Westergreen
Add a common u-boot devicetree include file for the SocFPGA
Arria10 device.
Signed-off-by: Dalon Westergreen
---
.../dts/socfpga_arria10-common-u-boot.dtsi| 206 ++
1 file changed, 206 insertions(+)
create mode 100644 arch/arm/dts/socfpga_arria10
From: Dalon Westergreen
This series sync the arria10 devicetree to the kernel devicetree
and cleans up the inclusion of u-boot specific requirements. It
also adds a new qts-filter-a10.sh script to allow for generation
of project specific settings required for configuration of the
device clocks
From: Dalon Westergreen
Add a script to process hps handoff data and generate a header
for inclusion in u-boot specific devicetree addons. The header
should be included in the top level u-boot.dtsi.
Signed-off-by: Dalon Westergreen
---
arch/arm/mach-socfpga/qts-filter-a10.sh | 141
From: Dalon Westergreen
CONFIG_OF_EMBED was primarily enabled to support the stratix10
spl hex file requirements. Since this option now produces a
warning during build, and the spl hex can be created using
alternate methods, CONFIG_OF_EMBED is no longer needed.
Signed-off-by: Dalon Westergreen
From: Dalon Westergreen
Stratix10 requires a hex image of the spl plus spl devicetree offset to
the Stratix10 onchip memory located at SPL_TEXT_BASE. This patch adds
a target to generate a hex file from the u-boot-spl binary including the
dtb offset at SPL_TEST_BASE.
Objcopy is used to convert
From: Dalon Westergreen
Bring cyclone5 / arria5 / arria10 in line with convention and use
u-boot.img as CONFIG_SPL_FS_LOAD_PAYLOAD_NAME.
Signed-off-by: Dalon Westergreen
---
include/configs/socfpga_common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs
From: Dalon Westergreen
Stratix10 requires a hex image of the spl plus spl devicetree offset to
the Stratix10 onchip memory located at SPL_TEXT_BASE. This patch adds
a target to generate a hex file from the u-boot-spl binary including the
dtb offset at SPL_TEST_BASE.
Objcopy is used to convert
From: Dalon Westergreen
CONFIG_OF_EMBED was primarily enabled to support the stratix10
spl hex file requirements. Since this option now produces a
warning during build, and the spl hex can be created using
alternate methods, CONFIG_OF_EMBED is no longer needed.
Signed-off-by: Dalon Westergreen
From: Dalon Westergreen
Pin configuration of the FPGA devicetree block should be done
after core configuration in the arria10 fpga driver. This fix
corrects the check of status, and ensures that the fpga pin mux
is configured on correct configuration of the core fpga image.
Signed-off-by
From: Dalon Westergreen
Bring cyclone5 / arria5 / arria10 in line with convention and use
u-boot.img as CONFIG_SPL_FS_LOAD_PAYLOAD_NAME.
Signed-off-by: Dalon Westergreen
---
include/configs/socfpga_common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs
From: Dalon Westergreen
CONFIG_OF_EMBED was primarily enabled to support the stratix10
spl hex file requirements. Since this option now produces a
warning during build, and the spl hex can be created using
alternate methods, CONFIG_OF_EMBED is no longer needed.
Signed-off-by: Dalon Westergreen
From: Dalon Westergreen
Stratix10 requires a hex image of the spl plus spl devicetree offset to
the Stratix10 onchip memory located at SPL_TEXT_BASE. This patch adds
a target to generate a hex file from the u-boot-spl binary including the
dtb offset at SPL_TEST_BASE.
Objcopy is used to convert
From: Dalon Westergreen
CONFIG_OF_EMBED was primarily enabled to support the stratix10
spl hex file requirements. Since this option now produces a
warning during build, and the spl hex can be created using
alternate methods, CONFIG_OF_EMBED is no longer needed.
Signed-off-by: Dalon Westergreen
From: Dalon Westergreen
Some architectures, Stratix10, require a hex formatted spl that combines
the spl image and dtb. This adds a target to create said hex file with
and offset of SPL_TEXT_BASE.
Signed-off-by: Dalon Westergreen
---
Changes in v2:
-> Move spl hex file generation to
From: Dalon Westergreen
CONFIG_OF_EMBED was primarily enabled to support the stratix10
spl hex file requirements. Since this option now produces a
warning during build, and the spl hex can be created using
alternate methods, CONFIG_OF_EMBED is no longer needed.
Signed-off-by: Dalon Westergreen
From: Dalon Westergreen
Some architectures, Stratix10, require a hex formatted spl that combines
the spl image and dtb. This adds a target to create said hex file with
and offset of SPL_TEXT_BASE.
Signed-off-by: Dalon Westergreen
---
Makefile | 9 +
1 file changed, 9 insertions
From: Dalon Westergreen
The sfp file is only valid for Gen5 (Cyclone5 & Arria5) and Arria10
devices. The file should only be built for these devices.
Signed-off-by: Dalon Westergreen
---
Kconfig | 3 ++-
scripts/Makefile.spl | 6 +-
2 files changed, 7 insertions(+
From: Dalon Westergreen
The sfp file is only valid for Gen5 (Cyclone5 & Arria5) and Arria10
devices. The file should only be built for these devices.
Signed-off-by: Dalon Westergreen
---
Changes from v1:
-> Remove duplicate entries for GEN5 and ARRIA10
---
Kconfig
From: Dalon Westergreen
Move the sfp file generation entirely to the root Makefile. This
means that the u-boot-spl.sfp will only be generated when required
and only for the socfpga variants that require it.
sfp generation is now entirely controlled by CONFIG_BUILD_TARGET
being set to either
From: Dalon Westergreen
Move the sfp file generation entirely to the root Makefile. This
means that the u-boot-spl.sfp will only be generated when required
and only for the socfpga variants that require it.
sfp generation is now entirely controlled by CONFIG_BUILD_TARGET
being set to either
The dtb should be embedded in the u-boot-spl image so that
the CONFIG_SPL_TARGET of spl/u-boot-spl.hex includes it.
This also affects the main u-boot image, so adjust
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot.img which now
also includes the dtb.
Signed-off-by: Dalon Westergreen
---
v2:
->
Incorrect type of size variable results in 0 being
returned for sdram sizes greater than or equal to
4GB.
Signed-off-by: Dalon Westergreen
---
v3: Fix commit message
v2: Move function type to phys_size_t to match gd->ram_size
---
arch/arm/mach-socfpga/include/mach/sdram_s10.h | 2 +-
driv
Incorrect type of size variable results in 0 being
returned for sdram sizes greater than or equal to
4GB.
v2:
-> Move function type to phys_size_t to match gd->ram_size
Signed-off-by: Dalon Westergreen
---
arch/arm/mach-socfpga/include/mach/sdram_s10.h | 2 +-
drivers/ddr/altera/sdram
Incorrect type of size variable results in 0 being
returned for sdram sizes greater than or equal to
4GB.
Signed-off-by: Dalon Westergreen
---
drivers/ddr/altera/sdram_s10.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera
Add CONFIG_SPL_TARGET "u-boot-with-spl.sfp" to common header
to generate the required u-boot-spl and u-boot combined
image.
Signed-off-by: Dalon Westergreen
---
include/configs/socfpga_common.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/socfpga_common.h
In preparation to move to using CONFIG_SPL_TARGET,
remove sfp generation targets.
Signed-off-by: Dalon Westergreen
---
scripts/Makefile.spl | 12
1 file changed, 12 deletions(-)
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 252f13826d..9314365aab 100644
--- a
Some SOCFPGA platforms require a header be added to
u-boot-spl and a combined spl / u-boot image. The
combined image consists of 4 replicated u-boot-spl
images with the afore mentioned header, and a u-boot
image cat'ed together.
Signed-off-by: Dalon Westergreen
---
Makefile | 11 +++--
Move gen5 and arria10 to use CONFIG_SPL_TARGET to
specify the required SPL output.
Dalon Westergreen (3):
spl: socfpga: remove sfp generation
socfpga: Add sfp generation targets
socfpga: common: add CONFIG_SPL_TARGET to gen5 and arria10 socfpga
header
Makefile
Stratix10 combines the u-boot-spl image into the fpga configuration
bitstream so that the SDM can load the processors memory. This
process requires a hex format of the u-boot-spl image.
CONFIG_SPL_TARGET is set to "spl/u-boot-spl.hex"
Signed-off-by: Dalon Westergreen
---
inclu
The dtb should be embedded in the u-boot-spl image so that
the CONFIG_SPL_TARGET of spl/u-boot-spl.hex includes it.
This also affects the main u-boot image, so adjust
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot,img which now
also includes the dtb.
Signed-off-by: Dalon Westergreen
---
configs
Some devices, namely Intel's stratix10 SoC, require u-boot-spl in
a hex format. This patch adds spl/u-boot-spl.hex as a possible
target.
Signed-off-by: Dalon Westergreen
---
Makefile | 5 +
1 file changed, 5 insertions(+)
diff --git a/Makefile b/Makefile
index f30dd8e9b7..133d7
This patch set adds a possible hex output of the
u-boot-spl elf and enables said output for the
Intel Stratix10 device. Stratix10 requires a hex
output of the elf for creating the secure device manager
configuration bitstream.
Dalon Westergreen (3):
common: add spl/u-boot-spl.hex target
arm
Only the Cyclone5/Arria5 and Arria10 devices require the sfp
formated image for booting. This path ensures that the file is
only generated for those devices.
Signed-off-by: Dalon Westergreen
---
scripts/Makefile.spl | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/scripts
Stratix10 requires a hex image of the spl for boot. The hex
image is added to the FPGA configuration image and loaded to
the processor memory by the configuration engine.
v2:
-> add CONFIG_OF_EMBED to include dtb in elf
-> generate hex from elf source
Signed-off-by: Dalon Weste
Only the Cyclone5/Arria5 and Arria10 devices require the sfp
formated image for booting. This path ensures that the file is
only generated for those devices.
Signed-off-by: Dalon Westergreen
---
scripts/Makefile.spl | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/scripts
Stratix10 requires a hex image of the spl for boot. The hex
image is added to the FPGA configuration image and loaded to
the processor memory by the configuration engine.
Signed-off-by: Dalon Westergreen
---
scripts/Makefile.spl | 10 ++
1 file changed, 10 insertions(+)
diff --git a
These patches add a hex output of the spl image for Stratix10
devices, and remove the sfp mkimage output for Stratix10 devices.
In Stratix10, the spl image is added to the initial FPGA configuration
bitstream. A hex file is needed to do this.
Dalon Westergreen (2):
spl: socfpga: only gen5
>
> OK, looks fine to me. I'd like T-B from either Dinh or Dalon on Gen5 and
> then I'll pick this.
>
I tested this on the DE10-Nano without issue. Thanks.
Acked-by: Dalon Westergreen
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
On Fri, 2017-04-21 at 15:31 +0200, Marek Vasut wrote:
> On 04/21/2017 03:17 PM, Dalon Westergreen wrote:
> >
> > On Fri, 2017-04-21 at 14:17 +0200, Marek Vasut wrote:
> > >
> > > On 04/21/2017 11:45 AM, Ley Foon Tan wrote:
> > > >
> >
On Fri, 2017-04-21 at 14:17 +0200, Marek Vasut wrote:
> On 04/21/2017 11:45 AM, Ley Foon Tan wrote:
> >
> > On Fri, Apr 21, 2017 at 4:00 AM, Dalon Westergreen
> > wrote:
> > >
> > > On Thu, 2017-04-20 at 07:12 -0700, Dalon Westergreen wrote:
> > &
On Thu, 2017-04-20 at 07:12 -0700, Dalon Westergreen wrote:
> On Wed, 2017-04-19 at 23:58 -0500, Dinh Nguyen wrote:
> >
> > On Wed, Apr 19, 2017 at 6:21 PM, Dalon Westergreen
> > wrote:
> > >
> > >
> > > On Wed, 2017-04-19 at 13:54 -0700, Dalon
On Wed, 2017-04-19 at 23:58 -0500, Dinh Nguyen wrote:
> On Wed, Apr 19, 2017 at 6:21 PM, Dalon Westergreen
> wrote:
> >
> > On Wed, 2017-04-19 at 13:54 -0700, Dalon Westergreen wrote:
> > >
> > > On Wed, 2017-04-19 at 15:44 -0500, Dinh Nguyen wrote:
> &
On Wed, 2017-04-19 at 13:54 -0700, Dalon Westergreen wrote:
> On Wed, 2017-04-19 at 15:44 -0500, Dinh Nguyen wrote:
> >
> > Really including Dalon
> >
> > >
> > > On Wed, Apr 19, 2017 at 3:26 PM, Dinh Nguyen wrote:
> > > CC: Dalon Westergreen
On Wed, 2017-04-19 at 15:44 -0500, Dinh Nguyen wrote:
> Really including Dalon
>
> > On Wed, Apr 19, 2017 at 3:26 PM, Dinh Nguyen wrote:
> > CC: Dalon Westergreen
> >
> > On 04/19/2017 02:49 PM, Dinh Nguyen wrote:
> > >
> > >
> > > On
Add support for the Terasic DE10-Nano board. The board
is based on the DE0-Nano-Soc board but adds a larger FPGA
and an HDMI output.
Signed-off-by: Dalon Westergreen
--
Changes in v2:
-> fix duplicate license header
---
arch/arm/dts/Makefile | 1 +
arch/arm/
On Tue, 2017-04-18 at 17:32 +0200, Marek Vasut wrote:
> On 04/18/2017 05:11 PM, Dalon Westergreen wrote:
> >
> > Add support for the Terasic DE10-Nano board. The board
> > is based on the DE0-Nano-Soc board but adds a larger FPGA
> > and an HDMI output.
> >
>
Add support for the Terasic DE10-Nano board. The board
is based on the DE0-Nano-Soc board but adds a larger FPGA
and an HDMI output.
Signed-off-by: Dalon Westergreen
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/socfpga_cyclone5_de10_nano.dts | 68 +++
arch/arm/mach
in
upstream kernel source.
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
--
Changes in v2:
- Remove unneeded CONFIG_BOOTFILE
---
configs/socfpga_cyclone5_defconfig | 3 +++
include/configs/socfpga_cyclone5_socdk.h | 32
2 files changed, 3
This removes the default environment from the de1 headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
This board does not have a devicetree in the upstream kernel
source so set devicetree to socfpga_cyclone5_de1_soc.dtb.
Signed-off-by: Dalon
This removes the default environment from the socrates headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
Change default devicetree name to match devicetree name in
upstream kernel source.
Signed-off-by: Dalon Westergreen
Acked-by: Marek
This removes the default environment from the SoCKit headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
Change default devicetree name to match devicetree name in
upstream kernel source.
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
This removes the default environment from the sr1500 header
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
This board has no upstream devicetree in the kernel source,
so set to socfpga_cyclone5_sr1500.dtb.
Signed-off-by: Dalon Westergreen
Acked
.
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
--
Changes in v3:
- Fix small typo in defconfig, missing "C"
Changes in v2:
- Remove unneeded CONFIG_BOOTFILE
- Fix dtb name
a5config test
Signed-off-by: Dalon Westergreen
---
configs/socfpga_arria5_defconfig | 3 ++
This removes the default environment from the de0 headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
In addition to the above, add support to boot from the custom
a2 type partition
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
This adds a common environment and support for distro boot
in the common socfpga header.
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
--
Changes in v5:
- Per Frank, to support OpenSuse the ENV must be after the GPT
Changes in v4:
- Move env back to being right after the MBR
Changes
Changes in v2:
- Remove unneeded CONFIG_BOOTFILE and fdt_addr
- Cleanup of socfpga_common.h
- Fixed dtb names for de1, sr1500, and arria5 boards
Dalon Westergreen (8):
arm: socfpga: Add distro boot to socfpga common header
arm: socfpga: DE0 use environment in common header
arm: socfpga: A5
On Sun, 2017-03-05 at 18:49 +0100, Marek Vasut wrote:
> On 03/05/2017 06:38 PM, Dalon Westergreen wrote:
> >
> > On Tue, 2017-02-28 at 06:45 -0800, Dalon Westergreen wrote:
> > >
> > > On Mon, 2017-02-20 at 06:35 -0800, Dalon Westergreen wrote:
> > > &g
On Tue, 2017-02-28 at 06:45 -0800, Dalon Westergreen wrote:
> On Mon, 2017-02-20 at 06:35 -0800, Dalon Westergreen wrote:
> >
> > On Mon, 2017-02-20 at 15:24 +0100, Marek Vasut wrote:
> > >
> > >
> > > On 02/20/2017 03:21 PM, Dalon Westergreen wrote:
On Sun, 2017-03-05 at 18:16 +0100, Marek Vasut wrote:
> On 03/05/2017 01:54 PM, Frank Kunz wrote:
> >
> > This allows the SPL to scan the MMC for a valid uboot image on a second
> > sector location defined by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR when
> > the default location "CONFIG_SYS_MMCSD_R
On Mon, 2017-02-20 at 06:35 -0800, Dalon Westergreen wrote:
> On Mon, 2017-02-20 at 15:24 +0100, Marek Vasut wrote:
> >
> > On 02/20/2017 03:21 PM, Dalon Westergreen wrote:
> > >
> > >
> > > On Mon, 2017-02-20 at 15:14 +0100, Marek Vasut wrote:
> &
On Tue, 2017-02-21 at 21:00 -0700, Simon Glass wrote:
> Hi Dalon,
>
> On 20 February 2017 at 07:56, Dalon Westergreen wrote:
> >
> > The implementation of boot_get_fpga only supported one fpga family.
> > This modification allows for any of the fpga devices supported
On Wed, 2017-02-22 at 14:08 +0200, Tomas Melin wrote:
> Hi Dalon,
>
> On 02/22/2017 06:00 AM, Simon Glass wrote:
> >
> > Hi Dalon,
> >
> > On 20 February 2017 at 07:56, Dalon Westergreen wrote:
> > >
> > > The implementation of boot_
On Tue, 2017-02-21 at 21:00 -0700, Simon Glass wrote:
> Hi Dalon,
>
> On 20 February 2017 at 07:56, Dalon Westergreen wrote:
> >
> > The implementation of boot_get_fpga only supported one fpga family.
> > This modification allows for any of the fpga devices supported
On Mon, 2017-02-20 at 16:16 +0100, Michal Simek wrote:
> On 20.2.2017 15:56, Dalon Westergreen wrote:
> >
> > The implementation of boot_get_fpga only supported one fpga family.
> > This modification allows for any of the fpga devices supported by
> > fpga_load to be u
The implementation of boot_get_fpga only supported one fpga family.
This modification allows for any of the fpga devices supported by
fpga_load to be used.
Signed-off-by: Dalon Westergreen
--
Changes in v3:
- Fix typos/caps in comments
Changes in v2:
- Add fitimage support for fpga-devnum and
This adds support for fpga configuration data in fitimages for
any fpga device supported by fpga_load. At this point fitimages
only support configuration of fpga images for fpga devnum 0.
Signed-off-by: Dalon Westergreen
---
common/bootm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
compatibility, do check of image size for xilinx to determine
if the image is a partial image
Dalon Westergreen (2):
common: image: update boot_get_fpga to support arbitrary fpga image
common: bootm: add support for arbitrary fgpa configuration
common/bootm.c | 2 +-
common/image-fit.c | 51
On Mon, 2017-02-20 at 09:14 +0100, Marek Vasut wrote:
> On 02/20/2017 04:35 AM, Dalon Westergreen wrote:
> >
> > The implementation of boot_get_fpga only supported one fpga family.
> > This modification allows for any of the fpga devices supported by
> > fpga_load to b
On Mon, 2017-02-20 at 15:24 +0100, Marek Vasut wrote:
> On 02/20/2017 03:21 PM, Dalon Westergreen wrote:
> >
> > On Mon, 2017-02-20 at 15:14 +0100, Marek Vasut wrote:
> > >
> > > On 02/20/2017 03:10 PM, Dalon Westergreen wrote:
> > > >
> > &g
On Sun, 2017-02-19 at 10:03 +0200, Hossameldin Eassa wrote:
> when i run the following command from u-boot console
>
> run bridge_enable_handoff;
>
>
> i have the following error
>
> Error: "bridge_enable_handoff" not defined
In mainline uboot just do
bridge enable
or
bridge disable
at le
On Mon, 2017-02-20 at 10:22 +0100, Michal Simek wrote:
> On 19.2.2017 21:58, Dalon Westergreen wrote:
> >
> > On Sun, 2017-02-19 at 21:49 +0100, Marek Vasut wrote:
> > >
> > > On 02/19/2017 09:43 PM, Dalon Westergreen wrote:
> > > >
> > &g
On Mon, 2017-02-20 at 10:24 +0100, Michal Simek wrote:
> On 19.2.2017 22:26, Marek Vasut wrote:
> >
> > On 02/19/2017 10:21 PM, Dalon Westergreen wrote:
> > >
> > > On Sun, 2017-02-19 at 22:12 +0100, Marek Vasut wrote:
> > > >
> >
On Mon, 2017-02-20 at 15:14 +0100, Marek Vasut wrote:
> On 02/20/2017 03:10 PM, Dalon Westergreen wrote:
> >
> > On Mon, 2017-02-20 at 10:07 +0100, Marek Vasut wrote:
> > >
> > > On 02/18/2017 02:34 AM, Dalon Westergreen wrote:
> > > >
> > >
On Mon, 2017-02-20 at 10:07 +0100, Marek Vasut wrote:
> On 02/18/2017 02:34 AM, Dalon Westergreen wrote:
> >
> > When CSEL=0x0 the socfpga bootrom does not touch the clock
> > configuration for the device. This can lead to a boot failure
> > on warm resets. This patc
On Sun, 2017-02-19 at 22:31 +0100, Marek Vasut wrote:
> On 02/18/2017 12:24 AM, Dalon Westergreen wrote:
> >
> > On Fri, 2017-02-17 at 22:16 +0100, Marek Vasut wrote:
> > >
> > > On 02/17/2017 07:05 PM, Dalon Westergreen wrote:
> > > >
> > &g
The implementation of boot_get_fpga only supported one fpga family.
This modification allows for any of the fpga devices supported by
fpga_load to be used.
Signed-off-by: Dalon Westergreen
--
Changes in v2:
- Add fitimage support for fpga-devnum and fpga-partial-image
- Use above in
This adds support for fpga configuration data in fitimages for
any fpga device supported by fpga_load. At this point fitimages
only support configuration of fpga images for fpga devnum 0.
Signed-off-by: Dalon Westergreen
---
common/bootm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
determine
if the image is a partial image
Dalon Westergreen (2):
common: image: update boot_get_fpga to support arbitrary fpga image
common: bootm: add support for arbitrary fgpa configuration
common/bootm.c | 2 +-
common/image-fit.c | 51
On Sun, 2017-02-19 at 22:12 +0100, Marek Vasut wrote:
> On 02/19/2017 09:58 PM, Dalon Westergreen wrote:
> >
> > On Sun, 2017-02-19 at 21:49 +0100, Marek Vasut wrote:
> > >
> > > On 02/19/2017 09:43 PM, Dalon Westergreen wrote:
> > > >
> > &g
On Sun, 2017-02-19 at 21:49 +0100, Marek Vasut wrote:
> On 02/19/2017 09:43 PM, Dalon Westergreen wrote:
> >
> > On Sun, 2017-02-19 at 21:07 +0100, Marek Vasut wrote:
> > >
> > > On 02/19/2017 08:49 PM, Dalon Westergreen wrote:
> > > >
> > &g
On Sun, 2017-02-19 at 21:07 +0100, Marek Vasut wrote:
> On 02/19/2017 08:49 PM, Dalon Westergreen wrote:
> >
> > The implementation of boot_get_fpga only supported one fpga family.
> > This modification allows for any of the fpga devices supported by
> > fpga_load to b
This removes the default environment from the sr1500 header
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
This board has no upstream devicetree in the kernel source,
so set to socfpga_cyclone5_sr1500.dtb.
Signed-off-by: Dalon Westergreen
Acked
On Sun, 2017-02-19 at 21:35 +0100, Marek Vasut wrote:
> On 02/19/2017 09:20 PM, Dalon Westergreen wrote:
> >
> > This adds a common environment and support for distro boot
> > in the common socfpga header.
> >
> > Signed-off-by: Dalon Weste
This removes the default environment from the SoCKit headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
Change default devicetree name to match devicetree name in
upstream kernel source.
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
This removes the default environment from the socrates headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
Change default devicetree name to match devicetree name in
upstream kernel source.
Signed-off-by: Dalon Westergreen
Acked-by: Marek
This removes the default environment from the de1 headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
This board does not have a devicetree in the upstream kernel
source so set devicetree to socfpga_cyclone5_de1_soc.dtb.
Signed-off-by: Dalon
in
upstream kernel source.
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
--
Changes in v2:
- Remove unneeded CONFIG_BOOTFILE
---
configs/socfpga_cyclone5_defconfig | 3 +++
include/configs/socfpga_cyclone5_socdk.h | 32
2 files changed, 3
.
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
--
Changes in v2:
- Remove unneeded CONFIG_BOOTFILE
- Fix dtb name
---
configs/socfpga_arria5_defconfig | 3 +++
include/configs/socfpga_arria5_socdk.h | 32
2 files changed, 3 insertions(+), 32
dtb names for de1, sr1500, and arria5 boards
Dalon Westergreen (8):
arm: socfpga: Add distro boot to socfpga common header
arm: socfpga: DE0 use environment in common header
arm: socfpga: A5 SoCDK use environment in common header
arm: socfpga: C5 SoCDK use environment in common header
arm
This removes the default environment from the de0 headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
In addition to the above, add support to boot from the custom
a2 type partition
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
This adds a common environment and support for distro boot
in the common socfpga header.
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
--
Changes in v4:
- Move env back to being right after the MBR
Changes in v3:
- fix spacing between asterix
- remove verify=n as a default setting
On Sun, 2017-02-19 at 20:45 +0100, Pavel Machek wrote:
> Hi!
>
> >
> > >
> > > >
> > > > >
> > > > > >
> > > > > > /* Environment for SDMMC boot */
> > > > > > #if defined(CONFIG_ENV_IS_IN_MMC) && !defined(CONFIG_ENV_OFFSET)
> > > > > > -#define CONFIG_SYS_MMC_ENV_DEV 0 /*
This adds support for fpga configuration data in fitimages for
any fpga device supported by fpga_load. At this point fitimages
only support configuration of fpga images for fpga devnum 0.
Signed-off-by: Dalon Westergreen
---
common/bootm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
The implementation of boot_get_fpga only supported one fpga family.
This modification allows for any of the fpga devices supported by
fpga_load to be used.
Signed-off-by: Dalon Westergreen
---
common/image.c | 37 ++---
1 file changed, 22 insertions(+), 15
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