Hi Dinh,
From day one of the SOCFPGA project, we(Altera's Linux/U-boot's
development team have made a pledge to upstream as much support as
possible and to be as open as possible. The thought behind rocketboards
was also a central point of information for socfpga, that would include
patches for
Hi Dinh,
Up until now I have avoided any SoC development kits as
I considered the software support to not have matured
enough. I consider mature code to be code that I can
checkout from mainline, where mainline is U-Boot via the
Denx repos, and Linux via the Kernel repos.
For Linux, we have
Hi guys,
I'm going to jump in here with an end-user's perspective,
along with an offer of assistance/contribution.
I'm interested in using Altera's SOCs in my designs.
Altera guys - if you look over on the Altera Forum,
you will see that I am very active over there
(basically answering
Hi Michael,
We know and thank you very much for price list ;)
I hope my incomplete list of vendors did not offend you.
I'm board vendor agnostic. If your company has an
Altera SoC board, I'm more than happy to look at it too.
Feel free to offer alternative options :)
Cheers,
Dave
Hi all,
Texas Instruments has recently realized that this
is the way to go, and have invested significantly
in this area - as demonstrated by Tom Rini.
TI have dedicated a page to mainlining:
http://www.ti.com/lsds/ti/tools-software/mainlinelinux.page
TI also has a very nice article in
Hi Wolfgang and Avner (and the Freescale developers),
I need bdi3000 reg file and u-boot configuration file for MPB8308RDB
Where can I find those fies?
The register files provided with the Abatron firmware are generic
enough. We used the reg8313e.def with the MPC7308RDB.
As for the config
Hi Wolfgang,
Grazing through the MPC8308 errata, there don't appear to be any
major 'gotchas' with this part. ...
... not unless you try to use USB device mode.
Ah, that is a gotcha then.
Has anyone had any bad experiences with this part, or is there
some 'feature' of the part I should be
Hi Kim,
Has anyone had any bad experiences with this part, or is there
some 'feature' of the part I should be aware of?
it has a different DMA engine than the rest of the mpc8xxx parts.
Ilya Yanok added support for it - see Linux commit ba2eea2,
drivers/dma/mpc512x_dma.c.
Thanks.
I'd noted
Hi Wolfgang,
In your opinion, is MPC8308 USB Device Mode completely broken?
Define completely...
:)
When acting as a mass storage device, we saw some ~14 MB/s throughput
to the device when the bug did not trigger; when it did, we got 1.8
MB/s and less, and many device reset messages in
I try to bring the u-boot up on the board with Cavium CN5010. When pci-init
is executed on the board_init_r, the board will hang. Did you have such a
question before? Any suggestions are welcome.
If you have a logic analyzer, try looking on the bus.
I have seen a host processor hang when
Hi Cheng,
But i consider that the write buffer and the page mode read
are quite different. BTW, i have searched the internet but got
nothing about Page Mode source code. Has anyone ever implemented it?
There is nothing to 'implement'. Page mode flash has a
timing parameter indicating the time
David Hawkins wrote:
Hi Mit Matelske,
I believe I made the changes to our FPGA that the eval's CPLD did when
the FCFG gets switched to 1 (bringing up flash enable at reset).
Since we have a smaller flash, I am putting the u-boot.bin at
0xFFE0 (0xFFF0 for the original Freescale u
Hi Mit Matelske,
I believe I made the changes to our FPGA that the eval's CPLD did when
the FCFG gets switched to 1 (bringing up flash enable at reset).
Since we have a smaller flash, I am putting the u-boot.bin at
0xFFE0 (0xFFF0 for the original Freescale u-boot), the base
address
Hi Jerry,
That being said, a weekend with a logic analyzer on a
BDI2000 JTAG connection would probably give you all the
info you need to figure out the appropriate JTAG
commands.
The problem is that it is going to be different for every processor
family and it may even change between
Hi Nikhil,
We are about to purchase a BDI3000. We need to reprogram the flash on an
MPC8540ADS board.
I am looking at this webpage:
http://ultsol.3dcartstores.com/CodeWarrior-Support_c_8.html
which sells BDI3000 bundled with other software. Can someone tell me
what additional
I see you guys talking about BDI3000 and I decided to ask a related
question.
Those who happen to own MPC8548CDS or something like this know it comes with
a small box called CodeWarrior USB TAP.
It is supposed to work with their software one has to pay for. I never used
anything but GCC
Hi,
There has been shown interest on the OpenOCD mailing list (last week
or so) to reverse engineer the PowerPC COP JTAG commands, so that
OpenOCD could support PowerPC architectures as well.
If there is a developer on that list in need of
hardware, give him my email, and I can send one
of
Hi all,
I modified the MPC8349E-MDS board and can create the
same problem we were experiencing on our boards;
CRC errors and data packets with received bytes
repeated within the receive packets.
So I am certain we have tracked the root cause of
the problem we were having with our boards.
The
Hi Dave,
Good news, Good summary!
Thanks!
This testing revealed some interesting observations;
1) The Marvell 88E PHY generates a 125MHz output
clock that is used as the PowerPC EC_GTX_CLK125MHZ
clock source on the MDS board.
The MDS board has to use the PHY output as
Hi Dave,
I'm not ready to claim success, as I need to make the
change on other boards ... but its very encouraging!
Good news, Dave.
Sure, we need to keep the impedance matching.
change the series resister.
Anyway, I strong recommand you to check if the signal
of GMII interface
Hi Dave,
The MPC8349EMDS config has had that setting since it was imported into
U-Boot. I've copied the relevant part of include/configs/MPC8349EMDS.h
below.
#define CONFIG_SYS_SICRH SICRH_TSOBI1
This seems wrong for the MPC8349EMDS board. I tried setting
the register
value to 0x0 by
Hi Wolfgang,
I've been working on a custom board, based heavily on the Freescale
MPC8349EMDS board. The only major difference is that the board has some
FPGAs connected to the local bus.
I've found that the TSEC / gianfar ethernet does not work for me in
1000mbit mode. I constantly get got
Wolfgang Denk wrote:
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 2008121325.gn15...@game.jcrosoft.org you wrote:
705 /* Terminate fs_type string. Writing past the end of vistart
706is ok - it's just the buffer. */
707 vistart-fs_type[8] = '\0';
why
Hi Alemao,
I made a port of u-boot for my board, with MPC8343.
The problem is that when i run u-boot with the BDI2000 (using reset run
command), u-boot loads normally, but when i take off the BDI nothing
appears on serial.
BDI is setting the reset configuration word, and is the same word
Hi Alemao,
Ben's comment is in addition to my comment:
The assignments for the 8349 are:
CFG_RS[0:2] = LGPL[0, 1, 3]
CFG_CLKIN_DIV = LGPL[5]
These need to be setup to tell the processor to load
from local bus flash, and then ...
To somewhat re-phrase what Dave mentioned, one common issue
Hi Elison,
I have confusion in the manner the MPC8360 loads the reset configuration
words from FLASH. According to the datasheet, it should read from the
following locations:
0x00 0x08 0x10 0x18 0x20 0x28 0x30 0x38
http://www.ovro.caltech.edu/~dwh/carma_board/powerpc_mpc8349e.pdf
p33 has
Thanks for the reply, I am not really want to support the TCP/IP ,
Wnat I do is to add the wireless network card to uboot then I can load OS
firmware from another computer(maybe through tftp wlan)
Re-read Wolfgang's response, he gave you the recommended solution:
Don't waste your time. Use
Hi Alemao,
In my MPC8360 board I have the BMS bit (from the reset configuration
word high register, CFG_HRCW_HIGH in u-boot) seted to '0', that means:
8 Mbytes at 0x_ to 0x007F_
Yep, an 8MB window starting at address zero.
The processor will jump to address 0x100 when it
Hi Yuke,
What I am doing is to try to load RTEMS
Ok, that info helps.
It has a BSP for this board.
Thats good.
All the tools I used are targeting powerpc and tailed
for this board.
and those tools came from where?
But the final executable format is .exe. I am not sure if
this format
Hi Yuke,
Sorry to ask the stupid question. I did study the RTEMS for a while and
am sure the tool set are correct (from ftp://www.rtems.com), otherwise
they will not build RTEMS. All the tools and development are done in
linux (RHLE5). I just got this board using U-boot and not sure about
Hi Yuke,
That is exactly what I want now (I need to pick up
U-boot later :-) ). I will try powerpc-linux-objcopy
and let you know.
Well, powerpc-linux-object copy will give you a binary
blob, but thats useless to you unless you know how to
use/load the blob.
I'm a little confused as to why
Hi Yuke,
After email some people in RTEMS community, I got the solutions:
--- To prepare the U-boot image for RTEMS application (with os built in
for RTMES) in host pc (RHEL5)
powerpc-rtems4.9-objcopy -O binary test.ext test.bin (the
powerpc-rtems4.9-objcopy is provided from rtems
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