From: Emanuele Ghidoli
The ARASAN MMC controller on Keystone 3 class of devices need the SDCD
line to be connected for proper functioning.
In cases where this can't be connected, add a quirk to force the
controller into test mode and set the TESTCD bit. Use the flag
"ti,fails-without-te
From: Emanuele Ghidoli
MCU_CLKOUT0 output can be driven by two different clock inputs:
one at 25 MHz and another at 50 MHz. Currently, the 25 MHz input
clock is not selectable due to a duplication of the 50 MHz clock input
in the mux configuration. This commit corrects the parent clock mux
From: Emanuele Ghidoli
Add new PID4 0090 Verdin iMX8M Mini Quad 4GB WB ET to support
the new hardware variant.
Signed-off-by: Emanuele Ghidoli
---
board/toradex/common/tdx-cfg-block.c| 1 +
board/toradex/common/tdx-cfg-block.h| 1 +
board/toradex/verdin-imx8mm/verdin-imx8mm.c
From: Emanuele Ghidoli
Add new PID4 0089 Verdin iMX95 Hexa 16GB WB IT to config block handling.
Signed-off-by: Emanuele Ghidoli
---
board/toradex/common/tdx-cfg-block.c | 1 +
board/toradex/common/tdx-cfg-block.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/board/toradex/common/tdx
From: Emanuele Ghidoli
Add new PID4 0088 Aquila AM69 Octa 32GB WB IT to config block handling.
Signed-off-by: Emanuele Ghidoli
---
board/toradex/common/tdx-cfg-block.c | 1 +
board/toradex/common/tdx-cfg-block.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/board/toradex/common/tdx
From: Emanuele Ghidoli
Add support for SKUs with higher memory sizes.
Actual memory size is auto-detected.
Signed-off-by: Emanuele Ghidoli
---
board/toradex/verdin-imx8mm/verdin-imx8mm.c | 2 +-
include/configs/verdin-imx8mm.h | 6 --
2 files changed, 5 insertions(+), 3
From: Emanuele Ghidoli
Add support for MT53E512M32D1ZW-046 IT:C memory.
This 4 GB memory has 17 row bits instead of 16 and requires 380 ns of
tRFC (tRFCab) instead of 280 ns due to increased channel density to 16 Gb.
Both modifications are retro-compatible with previous memories.
Signed-off
From: Emanuele Ghidoli
Hi,
This series adds support for 0090 PID4 Verdin iMX8M Mini Quad 4GB WB ET SKU.
It also adds two new SKUs config block support: 0088 Aquila AM69 Octa 32GB WB
IT and 0089 Verdin iMX95 Hexa 16GB WB IT.
Signed-off-by: Emanuele Ghidoli
Emanuele Ghidoli (5):
board
From: Emanuele Ghidoli
Manually, since SysConfig tool do not have the relevant option,
set PHY_LP4_WDQS_OE_EXTEND to 1.
Since WDQS control mode is required on our modules LPDDR4,
this enables WDQS control mode 1.
Signed-off-by: Emanuele Ghidoli
---
arch/arm/dts/k3-am625-verdin-lpddr4
From: Emanuele Ghidoli
Update the autogenerated LPDDR4 configuration using the latest available
SysConfig tool.
This changes are cosmetic and are made to track the last used tool version.
Signed-off-by: Emanuele Ghidoli
---
arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi | 6 --
1 file
From: Emanuele Ghidoli
Manually, since SysConfig tool do not have the relevant option,
set PHY_LP4_WDQS_OE_EXTEND to 1.
Since WDQS control mode is required on our modules LPDDR4,
this enables WDQS control mode 1.
Emanuele Ghidoli (2):
arm: dts: k3-am625-verdin: Update autogenerated LPDDR4
From: Emanuele Ghidoli
Set FSL_CAAM_JR_NTZ_ACCESS configuration since colibri-imx7
uses Freescale CAAM Job Ring linux driver
Signed-off-by: Emanuele Ghidoli
---
configs/colibri_imx7_defconfig | 1 +
configs/colibri_imx7_emmc_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git
From: Emanuele Ghidoli
Linux kernel is supposed to run in non-secure world,
fix the defconfig accordingly.
Signed-off-by: Emanuele Ghidoli
---
configs/colibri_imx7_emmc_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/configs/colibri_imx7_emmc_defconfig
b/configs
From: Emanuele Ghidoli
Add a new kconfig option to allow non-secure world access
to the CAAM Job Ring.
This is needed, for example, when running linux without
OP-TEE services, as it's done on Colibri iMX7.
Fixes: 51f1357f3428 ("Revert "drivers/crypto/fsl: assign job-rings to
non
From: Emanuele Ghidoli
This series allows using Freescale CAAM Job Ring from Linux without having
OP-TEE,
this is needed for example on Toradex Colibri iMX7 where we just have U-Boot +
Linux kernel.
To achieve this add a new config option to allow the non-secure world to access
job rings
From: Emanuele Ghidoli
Set FSL_CAAM_JR_NTZ_ACCESS configuration since colibri-imx7
uses Freescale CAAM Job Ring linux driver
Signed-off-by: Emanuele Ghidoli
---
configs/colibri_imx7_defconfig | 1 +
configs/colibri_imx7_emmc_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git
From: Emanuele Ghidoli
Linux kernel is supposed to run in non-secure world,
fix the defconfig accordingly.
Signed-off-by: Emanuele Ghidoli
---
configs/colibri_imx7_emmc_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/configs/colibri_imx7_emmc_defconfig
b/configs
From: Emanuele Ghidoli
Add a new kconfig option to allow non-secure world access
to the CAAM Job Ring.
This is needed, for example, when running linux without
OP-TEE services, as it's done on Colibri iMX7.
Fixes: 51f1357f3428 ("Revert "drivers/crypto/fsl: assign job-rings to
non
From: Emanuele Ghidoli
This series allows using Freescale CAAM Job Ring from Linux without having
OP-TEE,
this is needed for example on Toradex Colibri iMX7 where we just have U-Boot +
Linux kernel.
To achieve this add a new config option to allow the non-secure world to access
job rings
On 07/03/2024 10:26, Emanuele Ghidoli wrote:
> Hello,
>
> I'm currently facing issues with our board, Colibri-imx7,
> regarding its behavior in different boot modes:
>
> - Secure Mode (bootm_boot_mode=sec in U-Boot):
> When running Linux in secure mode, the idle
So, I am considering the utilization of OPTEE, as it seems it might address
the issues discussed in the threads.
Could this configuration potentially resolve my current issues?
Your advice would be greatly appreciated.
Kind regards,
Emanuele Ghidoli
From: Emanuele Ghidoli
verdin am62 SKUs comes in multiple memory configuration, check that
the detected memory is at least 512MB since we have some
reserved memory just before this threshold and therefore
the module cannot work with less memory.
Fixes: 7d1a10659f5b ("board: toradex: add v
From: Emanuele Ghidoli
Add update_tiboot3, update_tispl and update_uboot wrappers to update
R5 SPL, A53 SPL and A53 U-boot respectively.
Usage example:
> tftpboot ${loadaddr} tiboot3-am62x-gp-verdin.bin
> run update_tiboot3
> tftpboot ${loadaddr} tispl.bin
> run update_tispl
From: Emanuele Ghidoli
This series add boot update wrappers to Toradex Verdin AM62 SoM and
fix the minimum memory size warning.
These wrappes allow flash all U-Boot binaries:
R5 SPL, A53 SPL and A53 U-Boot proper.
Emanuele Ghidoli (2):
verdin-am62: add u-boot update wrappers
board: verdin
On 27/07/2023 13:21, Heinrich Schuchardt wrote:
> On 27.07.23 13:08, Emanuele Ghidoli wrote:
>> Efi loader module have its own memory management that flags as reserved the
>> area between ram_top to ram_end (currently where dt reserved-memory is
>> falling). uboot lmb up
Efi loader module have its own memory management that flags as reserved the
area between ram_top to ram_end (currently where dt reserved-memory is
falling). uboot lmb updates reserved-memory by adding these
efi loader module areas (see lmb_reserve_common->efi_lmb_reserve).
On our system (AM62xx
From: Emanuele Ghidoli
Fix missing declaration of fdt_del_node_path() while compiling am625_fdt.c and
missing common_fdt.h include in common_fdt.c
Fixes: 70aa5a94d451 ("arm: mach-k3: am62: Fixup CPU core, gpu and pru nodes in
fdt")
Signed-off-by: Emanuele Ghidoli
---
arch/a
From: Emanuele Ghidoli
On Cortex-R5 flushing and disabling cache is not enough to avoid
cache and memory incoherence.
In particular, when the cache is enabled after a disable, and if there
are entry in the cache the value from the cache is used instead of the
value from the memory
From: Emanuele Ghidoli
I want to propose this patch cause I experience weird behavior on AM62x
Cortex-R U-boot spl.
Seem that the stack is "restored" to the time dcache_disable was called.
The effect is that the code between dcache_disable
and dcache_enable is executed twice, but
ault value is equal to SYS_MALLOC_F_LEN, that normally is high.
Suggestions from Rasmus are precious. I adopt a rather similar approch to find
that stack / gd (global data) was overlapping DDR firmware / cfg.
Best regards,
Emanuele Ghidoli
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