On 03/28/2016 10:26 AM, Eric Nelson wrote:
> Copy device tree headers and include (.dtsi) files for
> i.MX6 Dual and Quad variants.
>
> These are copied as-is from Linux stable (4.4.1).
>
This is the only patch in the set.
Sorry for not catching the "Patch 1/9"
-by: Eric Nelson <e...@nelint.com>
---
Changes in V3:
- replace remnant of "blkcache max" from sub-command name change
Changes in V2:
- moved blkcache command into cmd/blkcache (Misc commands)
- removed invalidate sub-command - done in max command
- removed clear sub-comman
-by: Eric Nelson <e...@nelint.com>
---
Changes in V2:
- moved blkcache command into cmd/blkcache (Misc commands)
- removed invalidate sub-command - done in max command
- removed clear sub-command - done in show command
- removed dump command (was only for debug)
- removed run-time
Thanks Tom,
On 03/28/2016 07:16 AM, Tom Rini wrote:
> On Sun, Mar 27, 2016 at 12:00:13PM -0700, Eric Nelson wrote:
>
>> +++ b/drivers/block/blkcache.c
> [snip]
>> +static int trace;
>
> I see where you can toggle this at run-time. But do we really think
> th
Call blk_dread, blk_dwrite, blk_derase to ensure that the block cache is
used if enabled and to remove build breakage when CONFIG_BLK is enabled.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
cmd/sata.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/cmd/sata.c
Call blk_dread, blk_dwrite, blk_derase to ensure that the block cache is
used if enabled and to remove build breakage when CONFIG_BLK is enabled.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
cmd/mmc.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/cmd/mmc.c
-by: Eric Nelson <e...@nelint.com>
---
disk/part.c| 2 +
drivers/block/Kconfig | 20
drivers/block/Makefile | 1 +
drivers/block/blk-uclass.c | 13 +-
drivers/block/blkcache.c | 293 +
include/blk.h
0008000 /usr/lib/libGAL.so
5042083 bytes read in 251 ms (19.2 MiB/s)
Without cache:
=> blkc max 0 0
changed to max of 0 entries of 0 blocks each
=> load mmc 0:2 10008000 /usr/lib/libGAL.so
5042083 bytes read in 4638 ms (1 MiB/s)
E
Hi Peng,
On 03/27/2016 07:57 AM, Peng Fan wrote:
> On Fri, Mar 25, 2016 at 01:12:39PM -0700, Eric Nelson wrote:
>> On 03/24/2016 11:16 PM, Peng Fan wrote:
>>> Support Driver Model for fsl esdhc driver.
>>>
>>> 1. Introduce a new structure struct fsl_esdhc_priv
Hi all,
On 03/21/2016 11:31 AM, Eric Nelson wrote:
> On 03/20/2016 03:54 PM, Eric Nelson wrote:
>> On 03/20/2016 03:13 PM, Tom Rini wrote:
>>> On Sun, Mar 20, 2016 at 12:35:53PM -0700, Eric Nelson wrote:
>>>> On 03/17/2016 02:23 PM, Stephen Warren wrote:
>>>
10
> mmc[ + ]| |-- usdhc@0219
> mmc[ + ]| |-- usdhc@02194000
>
> => mmc list
> FSL_SDHC: 0 (SD)
> FSL_SDHC: 1 (SD)
> "
>
After pulling in device tree files from the mainline kernel, I was able
to test this on a SABRE
Device tree parsing of GPIO nodes is currently ignoring flags.
Add support for GPIO_ACTIVE_LOW by checking for the presence
of the flag and setting the desc->flags field to the driver
model constant GPIOD_ACTIVE_LOW.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
drivers/gpio/gpio
Hi Stephen,
On 03/23/2016 10:27 AM, Stephen Warren wrote:
> On 03/20/2016 07:45 PM, Eric Nelson wrote:
>
>> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
>
>> @@ -6,7 +6,6 @@
>>*
>>* SPDX-License-Identifier:GPL-2.0+
>>*/
>> -
On 03/23/2016 10:24 AM, Stephen Warren wrote:
> On 03/20/2016 07:45 PM, Eric Nelson wrote:
>> Allow the selection of CONFIG_BLOCK_CACHE, CONFIG_CMD_BLOCK_CACHE
>> using menuconfig.
>
> I think this should be part of patch 1.
Works for me, especially as it adds some docu
Hi Stephen,
Thanks again for the detailed review.
On 03/23/2016 10:22 AM, Stephen Warren wrote:
> On 03/20/2016 07:45 PM, Eric Nelson wrote:
>> Add a block device cache to speed up repeated reads of block devices by
>> various filesystems.
>>
>> This small amount of c
Hi Marek,
On 03/20/2016 06:59 PM, Marek Vasut wrote:
> On 03/21/2016 02:45 AM, Eric Nelson wrote:
>> Here's a more full-featured implementation of a cache for block
>> devices that uses a small linked list of cache blocks.
>
> Why do you use linked list ? You have four ent
Hi Tom,
On 03/20/2016 03:54 PM, Eric Nelson wrote:
> On 03/20/2016 03:13 PM, Tom Rini wrote:
>> On Sun, Mar 20, 2016 at 12:35:53PM -0700, Eric Nelson wrote:
>>> On 03/17/2016 02:23 PM, Stephen Warren wrote:
>>>> On 03/16/2016 03:40 PM, Eric Nelson wrote:
>&
On 03/20/2016 06:45 PM, Eric Nelson wrote:
> Add a block device cache to speed up repeated reads of block devices by
> various filesystems.
>
...
>
> Signed-off-by: Eric Nelson <e...@nelint.com>
> ---
> drivers/block/Makefile | 1 +
> dri
Hi Marek,
On 03/21/2016 09:49 AM, Marek Vasut wrote:
> On 03/21/2016 02:48 PM, Eric Nelson wrote:
>> On 03/20/2016 06:59 PM, Marek Vasut wrote:
>>> On 03/21/2016 02:45 AM, Eric Nelson wrote:
>>>> Here's a more full-featured implementation of a cache for block
>>
Hi Stephen,
On 03/20/2016 12:35 PM, Eric Nelson wrote:
> On 03/17/2016 02:23 PM, Stephen Warren wrote:
>> On 03/16/2016 03:40 PM, Eric Nelson wrote:
...
>> Do you have any stats on how many operations this saves for typical FS
>> operations such as:
>>
>> - Pa
Signed-off-by: Eric Nelson <e...@nelint.com>
---
drivers/mmc/mmc.c | 10 +-
drivers/mmc/mmc_write.c | 7 +++
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 8b2e606..956f4e1 100644
--- a/drivers/mmc/mmc.c
+++ b/d
layout.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
drivers/block/Makefile | 1 +
drivers/block/cache_block.c | 240
include/part.h | 69 +
3 files changed, 310 insertions(+)
create mode 100644 drivers
Allow the selection of CONFIG_BLOCK_CACHE, CONFIG_CMD_BLOCK_CACHE
using menuconfig.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
drivers/block/Kconfig | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index f35c4d4..6
255 ms (18.5 MiB/s)
changed to max of 8 entries of 1 blocks each
4955304 bytes read in 255 ms (18.5 MiB/s)
As mentioned earlier in this thread, the modification to the mmc
layer should probably be simpler and easier to apply to other
block subsystems.
Eric Nelson (3):
drivers: block: add block
Hi Tom,
On 03/20/2016 03:13 PM, Tom Rini wrote:
> On Sun, Mar 20, 2016 at 12:35:53PM -0700, Eric Nelson wrote:
>> Hi Stephen,
>>
>> On 03/17/2016 02:23 PM, Stephen Warren wrote:
>>> On 03/16/2016 03:40 PM, Eric Nelson wrote:
>>>> Signed-off-by: E
Thanks for the feedback Tom,
On 03/20/2016 03:13 PM, Tom Rini wrote:
> On Thu, Mar 17, 2016 at 02:33:04PM -0700, Eric Nelson wrote:
>> Thanks for the review(s) Stephen.
>>
>> On 03/17/2016 02:16 PM, Stephen Warren wrote:
>>> On 03/16/2016 03:40 PM, Eric Nelson w
Hi Stephen,
On 03/17/2016 02:23 PM, Stephen Warren wrote:
> On 03/16/2016 03:40 PM, Eric Nelson wrote:
>> Signed-off-by: Eric Nelson <e...@nelint.com>
>
> Patch description.
>
>> ---
>> drivers/mmc/mmc.c | 10 +-
>> drivers/mmc/mmc_wri
Thanks Ioan,
On 03/19/2016 08:42 AM, Ioan Nicu wrote:
> Hi Eric,
>
> On Wed, Mar 16, 2016 at 11:42:55AM -0700, EXT Eric Nelson wrote:
>> Hi all,
>>
>> I've been seeing the same sort of issues repoted by Ionut
>> and as addressed by this patch:
>>
, but this
would also be more invasive, since some cacheable blocks are currently
allocated on the stack.
Eric Nelson (2):
add block device cache
mmc: add support for block device cache
drivers/block/Makefile | 1 +
drivers/block/cache_block.c | 76
Thanks for the review(s) Stephen.
On 03/17/2016 02:16 PM, Stephen Warren wrote:
> On 03/16/2016 03:40 PM, Eric Nelson wrote:
>> Signed-off-by: Eric Nelson <e...@nelint.com>
>
> A patch description would be useful here; the cover letter wouldn't be
> checked in.
>
Ye
to fix
at the block device level rather than within the ext4
filesystem code.
That said, the 2k/4k/16k bunches above may also indicate
a simpler fix in the ext4 code.
Please chime in with your thoughts.
Regards,
Eric Nelson
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Signed-off-by: Eric Nelson <e...@nelint.com>
---
drivers/mmc/mmc.c | 10 +-
drivers/mmc/mmc_write.c | 7 +++
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 8b2e606..956f4e1 100644
--- a/drivers/mmc/mmc.c
+++ b/d
Signed-off-by: Eric Nelson <e...@nelint.com>
---
drivers/block/Makefile | 1 +
drivers/block/cache_block.c | 76 +
include/part.h | 65 ++
3 files changed, 142 insertions(+)
create mode
Hi Marek,
On 01/13/2016 07:10 PM, Marek Vasut wrote:
> On Tuesday, December 22, 2015 at 04:37:12 PM, Eric Nelson wrote:
>> Hi Marek,
>
> Hi Eric,
>
> [..]
>
>>>> This should also have parameters of mx6_ddr_sysinfo (input) and
>>>> mx6_mmdc_c
On 01/13/2016 07:50 PM, Marek Vasut wrote:
> On Thursday, January 14, 2016 at 03:37:09 AM, Eric Nelson wrote:
>> Hi Marek,
>
> Hi!
>
>> On 01/13/2016 07:10 PM, Marek Vasut wrote:
>>> On Tuesday, December 22, 2015 at 04:37:12 PM, Eric Nelson wrot
Hi Fabio,
On 01/05/2016 08:07 AM, Fabio Estevam wrote:
> Hi,
>
> Currently we have in arch/arm/cpu/armv7/mx6/ddr.c:
>
>/* MMDC Termination: rtt_nom:2 RZQ/2(120ohm), rtt_nom:1 RZQ/4(60ohm) */
>val = (sysinfo->rtt_nom == 2) ? 0x0007 : 0x0007;
>
> ,but the mx6 reference
usb2_loopback_tog;
> + u32 usb2_misc;
> + u32 usb2_misc_set;
> + u32 usb2_misc_clr;
> + u32 usb2_misc_tog;
> + u32 digprog;
> + u32 reserved1[7];
> + u32 digprog_sololite;
> };
> #endif
>
>
Otherwise, I checked these against the i.MX6DQ/SDL/SL and UL manuals
(not i.MX6SX), and
Reviewed-By: Eric Nelson <e...@nelint.com>
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Hi Peng,
On 01/03/2016 11:10 PM, Peng Fan wrote:
> Check "Figure 19-5. BUS clock generation" of i.MX 6SoloX Applications
> Processor Reference Manual and "Figure 18-5. BUS clock generation" of
> i.MX 6UltraLite Applications Processor Reference Manual. If mmdc clk
> sources from
On 01/05/2016 08:06 PM, Peng Fan wrote:
> From: Peng Fan <peng@nxp.com>
>
> Add more entries for structure mxc_ccm_reg.
>
> Signed-off-by: Peng Fan <peng@nxp.com>
> Reviewed-by: Eric Nelson <e...@nelint.com>
> Cc: Stefano Babic <sba...@denx.de
gt; index 43ce7fe..68d3fd7 100644
> --- a/include/configs/imx6_spl.h
> +++ b/include/configs/imx6_spl.h
> @@ -34,6 +34,7 @@
> #define CONFIG_SPL_SERIAL_SUPPORT
> #define CONFIG_SPL_I2C_SUPPORT
> #define CONFIG_SPL_GPIO_SUPPORT
> +#defin
Hi Marek,
On 12/21/2015 06:52 PM, Marek Vasut wrote:
> On Sunday, December 20, 2015 at 08:31:46 PM, Eric Nelson wrote:
>> On 12/16/2015 07:40 AM, Marek Vasut wrote:
...
>>> diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
>>> index 6b039e4..19
Hi Tim,
On 12/21/2015 09:13 PM, Tim Harvey wrote:
> On Sun, Dec 20, 2015 at 11:31 AM, Eric Nelson <e...@nelint.com> wrote:
>> Hi Marek,
>>
>
>> I'd recommend passing parameters of mx6_ddr_sysinfo (input) and
>> mx6_mmdc_calibration (output) to this routine.
Hi Marek,
On 12/16/2015 07:40 AM, Marek Vasut wrote:
> Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code
> fine-tunes the behavior of the MMDC controller in order to improve
> the signal integrity and memory stability.
It would be good to have a reference to AN4467 in the
Hi Marek,
On 12/16/2015 07:40 AM, Marek Vasut wrote:
> Enable the DDR calibration functionality on Novena to deal with the
> memory SoDIMM on this board.
Shouldn't this be in two patches?
> Moreover, tweak the initial DDR DRAM parameters so the
> calibration works properly.
>
> Signed-off-by:
Hi Tim,
On 12/17/2015 08:39 AM, Tim Harvey wrote:
> On Wed, Dec 16, 2015 at 7:00 AM, Eric Nelson <e...@nelint.com> wrote:
>> Hi Marek,
>>
>> On 12/16/2015 07:40 AM, Marek Vasut wrote:
>>> Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code
>
Hi Marek,
On 12/16/2015 09:50 AM, Marek Vasut wrote:
> On Wednesday, December 16, 2015 at 05:28:48 PM, Eric Nelson wrote:
>> On 12/16/2015 08:33 AM, Marek Vasut wrote:
>>> On Wednesday, December 16, 2015 at 04:00:38 PM, Eric Nelson wrote:
...
>>> I don't hav
Hi Marek,
On 12/16/2015 07:40 AM, Marek Vasut wrote:
> Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code
> fine-tunes the behavior of the MMDC controller in order to improve
> the signal integrity and memory stability.
>
I'm glad to see that others are interested in this.
Hi Marek,
On 12/16/2015 08:33 AM, Marek Vasut wrote:
> On Wednesday, December 16, 2015 at 04:00:38 PM, Eric Nelson wrote:
>> Hi Marek,
>>
>> On 12/16/2015 07:40 AM, Marek Vasut wrote:
>>> Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code
>>&
Hi Tom,
On 12/13/2015 06:21 PM, Tom Rini wrote:
> On Sat, Dec 05, 2015 at 12:32:28PM -0700, Eric Nelson wrote:
>
>> In order to support boot from multiple devices through board_boot_order,
>> it's necessary to use the block number of a device.
>>
>> The use of a hard
gt;
> This allows to load again a SPL based board
> with imx_usb_loader together with a tool
> such as kermit.
>
> Signed-off-by: Stefano Babic <sba...@denx.de>
> CC: Tim Harvey <thar...@gateworks.com>
> CC: Fabio Estevam <fabio.este...@freescale.c
On 12/11/2015 10:33 AM, Marek Vasut wrote:
> On Friday, December 11, 2015 at 03:58:35 PM, Stefano Babic wrote:
>> Hi Eric,
>>
>> On 11/12/2015 15:40, Eric Nelson wrote:
...
>>>> + /*
>>>> + * Check for BMODE if serial downloader is enabled
ONFIG_PHYLIB
> free(phydev);
> #endif
> + mdio_unregister(bus);
Ditto:
> free(bus);
> }
> return ret;
>
Otherwise,
Reviewed-by: Eric Nelson <e...@nelint.com>
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gt; + u32 speed = DIV_ROUND_UP(pclk, 500);
> + u32 hold = DIV_ROUND_UP(pclk, 1) - 1;
> #ifdef FEC_QUIRK_ENET_MAC
> speed--;
> #endif
> - speed <<= 1;
> - writel(speed, >mii_speed);
> + writel(speed << 1 | hold &l
Hi Stefano,
On 12/07/2015 02:55 AM, Stefano Babic wrote:
> Hi Eric,
>
> On 05/12/2015 21:13, Eric Nelson wrote:
>> Hi Stefano,
>>
>> On 12/04/2015 02:02 AM, Stefano Babic wrote:
>>> Check for bmode before reading the boot device
>>> to check if a
Hi Fabio,
On 12/06/2015 05:21 PM, Fabio Estevam wrote:
> Hi Eric,
>
> On Fri, Dec 4, 2015 at 8:42 PM, Eric Nelson <e...@nelint.com> wrote:
>
>> I've figured out a way to repeat this on my machine.
>>
>> If I write 0xff's to the eMMC blocks, then issue an eras
ste...@freescale.com>
Signed-off-by: Eric Nelson <e...@nelint.com>
---
drivers/mmc/mmc_write.c | 2 +-
include/mmc.h | 7 ++-
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c
index 7aea7e9..221bf30 100644
--- a/drivers/mmc
=board/freescale/mx6slevk/mx6slevk.c;hb=HEAD#l195
Signed-off-by: Eric Nelson <e...@nelint.com>
---
common/spl/spl_mmc.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index b3c2c64..cc97e47 100644
--- a/common/spl/spl
gt;
> This allows to load again a SPL based board
> with imx_usb_loader together with a tool
> such as kermit.
>
> Signed-off-by: Stefano Babic <sba...@denx.de>
> CC: Tim Harvey <thar...@gateworks.com>
> CC: Fabio Estevam <fabio.este...@freescale.com>
> CC: E
Hi Michael,
On 12/02/2015 01:00 PM, Michael Trimarchi wrote:
> Hi
>
> On Wed, Dec 2, 2015 at 8:54 PM, Fabio Estevam wrote:
>> Hi Michael,
>>
>> On Wed, Dec 2, 2015 at 5:37 PM, Michael Trimarchi
>> wrote:
>>
>>> Can you print the sysctl & 0xF? I
On 12/04/2015 10:32 AM, Eric Nelson wrote:
> The low four bits of the SYSCTL register are reserved on the USDHC
> controller on i.MX6 and i.MX7 processors, but are used for clocking
> operations on earlier models.
>
> Guard against their usage by hiding the bit mask macros on tho
On 12/04/2015 10:38 AM, Eric Nelson wrote:
> On 12/04/2015 10:32 AM, Eric Nelson wrote:
>> The low four bits of the SYSCTL register are reserved on the USDHC
>> controller on i.MX6 and i.MX7 processors, but are used for clocking
>> operations on earlier models.
>>
&
Hi Michael,
On 12/04/2015 10:40 AM, Michael Trimarchi wrote:
> On Fri, Dec 4, 2015 at 6:32 PM, Eric Nelson <e...@nelint.com> wrote:
...
>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
>> index c5054d6..1ccc576 100644
>> --- a/drivers/mmc/fsl_e
Hi Fabio,
On 12/02/2015 12:53 PM, Fabio Estevam wrote:
> On Wed, Dec 2, 2015 at 5:28 PM, Eric Nelson <e...@nelint.com> wrote:
>
...
>>
>> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
>> index 53084a7..8f5d9e1 100644
>> --- a/drivers/mmc/mmc.c
>> +
Hi all,
On 12/04/2015 09:08 AM, Eric Nelson wrote:
...
>
> I think you're onto something.
>
> According to the i.MX35 reference manual, which I think was the origin
> of this patch, the low four bits of the SYSCTL register of the SDHC5
> 3 - SDCLKEN
> 2
Hi Fabio and Hector,
On 12/04/2015 10:43 AM, Eric Nelson wrote:
> On 12/04/2015 10:38 AM, Eric Nelson wrote:
>> On 12/04/2015 10:32 AM, Eric Nelson wrote:
>>> The low four bits of the SYSCTL register are reserved on the USDHC
>>> controller on i.MX6 and i.MX7 processors
Hi all,
On 12/04/2015 09:35 AM, Eric Nelson wrote:
> Hi Fabio,
>
> On 12/02/2015 12:53 PM, Fabio Estevam wrote:
>> On Wed, Dec 2, 2015 at 5:28 PM, Eric Nelson <e...@nelint.com> wrote:
>>
> ...
>>>
>>> diff --git a/drivers/mmc/mmc.c b/dri
Thanks Hector,
On 12/04/2015 11:39 AM, Hector Palacios wrote:
> Hi,
>
> On 12/04/2015 06:32 PM, Eric Nelson wrote:
>> The low four bits of the SYSCTL register are reserved on the USDHC
>> controller on i.MX6 and i.MX7 processors, but are used for clocking
>> o
off-by: Eric Nelson <e...@nelint.com>
---
V2 uses CONFIG_FSL_USDHC instead of CONFIG_MX6 in fsl_esdhc.h
drivers/mmc/fsl_esdhc.c | 15 +--
include/fsl_esdhc.h | 2 ++
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdh
Thanks Hector,
On 12/04/2015 11:51 AM, Hector Palacios wrote:
> On 12/04/2015 07:33 PM, Eric Nelson wrote:
>> On 12/04/2015 10:43 AM, Eric Nelson wrote:
...
>> From what I can tell, the linux kernel doesn't do this test and
>> doesn't appear to have any trouble.
>>
off-by: Eric Nelson <e...@nelint.com>
---
drivers/mmc/fsl_esdhc.c | 15 +--
include/fsl_esdhc.h | 2 ++
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index c5054d6..1ccc576 100644
--- a/drivers/mmc/fsl_esdh
Hi Fabio,
On 12/02/2015 10:23 AM, Fabio Estevam wrote:
> Hi Eric,
>
> On Tue, Dec 1, 2015 at 5:05 PM, Eric Nelson <e...@nelint.com> wrote:
>
>> I've also recently seen this on two different custom boards. Both are
>> running i.MX6Q TO1.2 and both are using eMMC f
Hi Fabio,
On 12/02/2015 11:52 AM, Fabio Estevam wrote:
> Hi Eric,
>
> On Wed, Dec 2, 2015 at 4:47 PM, Eric Nelson <e...@nelint.com> wrote:
>> Sure. It's a hack, but shows where we're hitting the problem
>> (with the stop command).
>>
>> We haven't been
Hi all,
On 11/16/2015 08:30 AM, Fabio Estevam wrote:
> On Mon, Nov 16, 2015 at 1:23 PM, Fabio Estevam wrote:
>> Hi Hector,
>>
>> On Fri, Nov 13, 2015 at 12:37 PM, Fabio Estevam wrote:
>>> On Fri, Nov 13, 2015 at 10:26 AM, Palacios, Hector
>>>
Troy Kisky will be maintaining the Nitrogen6x board going forward.
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
board/boundary/nitrogen6x/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/boundary/nitrogen6x/MAINTAINERS
b/board/boundary
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
Hi Tom,
On 05/30/2015 12:25 PM, Tom Rini wrote:
On Sat, May 30, 2015 at 10:41:16AM -0700, Eric Nelson wrote:
On 05/30/2015 09:49 AM, Tom Rini wrote:
On Fri, May 29, 2015 at 11:46:40AM +0200, Vincent Stehlé
wrote:
[...]
This is an old topic
On 05/30/2015 10:24 AM, Vincent Stehlé wrote:
On 05/30/2015 06:49 PM, Tom Rini wrote:
..
The second would be trying to fake things such that for
imx_usb_loader you can pass both SPL and u-boot.img, and SPL is
run, inits memory and just exists and then u-boot.img is loaded
and run, similar
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
Hi Tom,
On 05/30/2015 09:49 AM, Tom Rini wrote:
On Fri, May 29, 2015 at 11:46:40AM +0200, Vincent Stehlé wrote:
Hi,
Is it still possible to boot u-boot on Wandboard through USB,
please?
Not directly. I've been toying with a few ideas
.
Reviewed-by: Eric Nelson eric.nel...@boundarydevices.com
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boards
to
ensure a consistent set of features. This is a first pass at moving those
options
and unifying the common options to a standard default.
snip
26 files changed, 81 insertions(+), 1232 deletions(-)
For the series:
Reviewed-by: Eric Nelson eric.nel...@boundarydevices.com
Hi all,
Heiko's recent patch set [1] to control the LDB clock on i.MX5/6 boards
makes it painfully obvious that some semblance of clock tree is needed,
even if it starts off as a shell.
We currently have routines declared in [2] that should be moved into
a more common spot:
void
Hi Heiko,
On 04/17/2015 12:53 AM, Heiko Schocher wrote:
+int ipu_set_ldb_clock(int rate);
#endif
diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c
index 1a209d4..dc054bc 100644
--- a/drivers/video/ipu_common.c
+++ b/drivers/video/ipu_common.c
@@ -1198,3 +1198,14 @@
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
include/configs/nitrogen6x.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index 8ef4b73..0ca02e9 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs
= ldb_clk,
- .rate = 6500,
+ .rate = CONFIG_SYS_LDB_CLOCK,
.usecount = 0,
};
Tested-by: Eric Nelson eric.nel...@boundarydevices.com
___
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.
+ if (g_ldb_clk == NULL)
+ return -ENOENT;
+
+ g_ldb_clk-rate = rate;
+
+ return 0;
+}
The use of g_ldb_clk seems pretty dodgy everywhere in the
IPU driver.
Otherwise:
Tested-by: Eric Nelson eric.nel...@boundarydevices.com
Hi Luca,
On 03/17/2015 03:04 AM, Luca Ellero wrote:
Hi all,
I'm trying to configure IPU on a iMX6 based platform by reading EDID
from the external monitor.
Everything seem to work fine except for the pixelclock. In particular my
monitor has a standard resolution of 1280x1024@60 (108 MHz
Hi Fabio,
On 03/17/2015 09:30 AM, Fabio Estevam wrote:
On Mon, Mar 16, 2015 at 1:50 PM, Chris Kuethe chris.kue...@gmail.com wrote:
U-Boot 2015.04-rc3-00209-ga74ef40-dirty (Mar 15 2015 - 22:04:22)
CPU: Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: WDOG
Here the reset cause is printed
Hi Fabio,
On 03/02/2015 08:33 AM, Fabio Estevam wrote:
Hi Otavio,
On Mon, Mar 2, 2015 at 11:52 AM, Otavio Salvador
ota...@ossystems.com.br wrote:
+Required software on the host PC:
+
+- imx_loader: https://github.com/warpboard/imx_usb_loader
I see no reason to link WaRP's fork. The
On 03/02/2015 08:52 AM, Fabio Estevam wrote:
Hi Eric,
On Mon, Mar 2, 2015 at 12:48 PM, Eric Nelson
eric.nel...@boundarydevices.com wrote:
It's probably best to use ours, but we're okay either way.
I wasn't aware that Warp had forked imx_usb_loader, but a quick
read shows that it's
On 02/24/2015 04:19 PM, Fabio Estevam wrote:
Hi Eric,
On Tue, Feb 24, 2015 at 8:10 PM, Eric Nelson
eric.nel...@boundarydevices.com wrote:
You might want to check this value:
#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
Thanks for the suggestion. After adding this config the error
Hi Fabio,
On 02/24/2015 03:25 PM, Fabio Estevam wrote:
On Tue, Feb 24, 2015 at 7:22 PM, Fabio Estevam feste...@gmail.com wrote:
Hi,
I am trying to get USB Mass Storage to work on mx6slevk, but I am
getting the following error:
= ums 0 mmc 1
UMS: disk start sector: 0x0, count: 0x762c00
Initial filesystem images are generally highly compressible.
Add a routine gzwrite that allows gzip-compressed images to be
written to block devices.
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
V2 removes floating point references from u64 division
include/common.h | 39
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi Tom and Marek,
On 02/16/2015 10:03 AM, Tom Rini wrote:
On Mon, Feb 16, 2015 at 05:27:59PM +0100, Marek Vasut wrote:
On Monday, February 16, 2015 at 12:16:06 AM, Eric Nelson wrote:
Initial filesystem images are generally highly compressible
Initial filesystem images are generally highly compressible.
Add a routine gzwrite that allows gzip-compressed images to be
written to block devices.
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
include/common.h | 39 +++
lib/gunzip.c | 194
sizes = 4GiB because the trailer
only contains the low 32 bits of the original file size.
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
common/cmd_unzip.c | 47 +++
1 file changed, 47 insertions(+)
diff --git a/common/cmd_unzip.c b/common
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
This patch replaces the following two patches, but only applies
to Nitrogen6x and SABRE Lite boards:
http://patchwork.ozlabs.org/patch/436972/
http://patchwork.ozlabs.org/patch/436974/
board/boundary/nitrogen6x
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
This patch set replaces http://patchwork.ozlabs.org/patch/436492/.
arch/arm/imx-common/cpu.c | 10 +-
arch/arm/include/asm/arch-imx/cpu.h | 2 ++
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch
Hi Stefano,
On 02/11/2015 02:07 AM, Stefano Babic wrote:
Hi Eric,
On 10/02/2015 18:19, Eric Nelson wrote:
Hi Stefano,
On 02/05/2015 11:49 AM, Stefano Babic wrote:
Hi Eric,
On 05/02/2015 19:22, Eric Nelson wrote:
Certainly, but it seems wrong to make a decision about where and how
Hi Stefano,
On 02/05/2015 11:49 AM, Stefano Babic wrote:
Hi Eric,
On 05/02/2015 19:22, Eric Nelson wrote:
Certainly, but it seems wrong to make a decision about where and how
this might get passed to an O/S in code.
If we want to generalize it, I'd be inclined to add commands to
query
Hi all,
On 02/05/2015 03:58 PM, Eric Nelson wrote:
The cause of a reset is generally useful, and shouldn't be
blindly cleared in the process of displaying it as a part
of the boot announcement.
snip
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 28ccd29
Hi all,
On 02/05/2015 03:57 PM, Eric Nelson wrote:
The cause of a reset is generally useful, and shouldn't be
blindly cleared in the process of displaying it as a part
of the boot announcement.
Stash the string representation in the environment variable
reset_cause.
snip
Signed-off
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