Am 2015-03-12 um 13:28 schrieb Tom Rini:
> On Thu, Mar 12, 2015 at 08:34:34AM +0100, Jan Kiszka wrote:
>> Am 2015-03-11 um 16:11 schrieb Tom Rini:
>>> On Mon, Mar 09, 2015 at 08:00:11AM +0100, Jan Kiszka wrote:
>>>
>>>> This is already invoke
Am 2015-03-11 um 16:12 schrieb Tom Rini:
> On Mon, Mar 09, 2015 at 08:00:18AM +0100, Jan Kiszka wrote:
>
>> In this case the secure code lives in RAM, and hence the memory node in
>> the device tree needs to be adjusted. This avoids that the OS will map
>> and possibl
Am 2015-03-11 um 16:11 schrieb Tom Rini:
> On Mon, Mar 09, 2015 at 08:00:11AM +0100, Jan Kiszka wrote:
>
>> This is already invoked a few cycles later in monitor mode by
>> _secure_monitor. Drop it here, it serves no purpose.
>
> For clarity, because of the vector tables
[resent with updated address of Tom]
On 2015-03-09 07:47, Jan Kiszka wrote:
> This fixes a regression of e310b93ec1, affecting Ethernet on the Jetson
> TK1, e.g.
>
> Signed-off-by: Jan Kiszka
> ---
> common/board_r.c | 11 +++
> 1 file changed, 11 insertions(+)
>
Use a per-CPU variable for saving the target PC during CPU_ON
operations. This allows us to run this service independently on targets
that have more than 2 cores and also core-local power control.
CC: Marc Zyngier
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/psci.S | 11
hough commonly done
via ACLTR, the related function can be overloaded.
CC: Marc Zyngier
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/psci.S | 77 +
arch/arm/cpu/armv7/sunxi/psci.S | 63 +
2 files changed, 78 insertions(+
.gmane.org/gmane.comp.boot-loaders.u-boot/210881. It
consists of first enabling CPU1..3 via the PMC, just to powergate them
again with the help of the Flow Controller. Once the Flow Controller is
in place, we can leave the PMC alone while processing CPU_ON and CPU_OFF
PSCI requests.
Signed-off-by: Jan Kiszka
---
an be influenced by an envvar) has been made when booting the
os.
Signed-off-by: Ian Campbell
[Jan: tiny style adjustment]
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/virt-v7.c | 5 +
arch/arm/include/asm/system.h | 1 +
arch/arm/mach-tegra/ap.c | 15 +++
3 files change
_sunxi_cpu_entry can be converted completely into a reusable
psci_cpu_entry. Tegra124 will use it as well.
As with psci_disable_smp, also the enabling is designed to be overloaded
in cased SMP is not controlled via ACTLR.
CC: Marc Zyngier
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7
We only set CNTFRQ in arch_timer_init for the boot CPU. But this has to
happen for all cores.
Fixing this resolves problems of KVM with emulating the generic
timer/counter.
Signed-off-by: Jan Kiszka
---
arch/arm/mach-tegra/psci.S | 13 +
1 file changed, 13 insertions(+)
diff --git
-boot/tree/jetson-tk1-v5.
Jan
CC: Ian Campbell
CC: Marc Zyngier
Ian Campbell (3):
tegra124: Add more registers to struct mc_ctlr
jetson-tk1: Add PSCI configuration options and reserve secure code
tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
Jan Kiszka (11):
sun7i: Remove
From: Ian Campbell
The secure world code is relocated to the MB just below the top of 4G, we
reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is
not protected in h/w. See next patch.
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/mach-tegra
Will be used for unpowergating CPUs.
Signed-off-by: Jan Kiszka
---
arch/arm/include/asm/arch-tegra/powergate.h | 1 +
arch/arm/mach-tegra/powergate.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-tegra/powergate.h
b/arch/arm/include
From: Ian Campbell
I will need mc_security_cfg0/1 in a future patch and I added the rest while
debugging, so thought I might as well commit them.
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/include/asm/arch-tegra124/mc.h | 35 +++--
1 file
This function will be used to initialize CPU power management for Tegra
SOCs. For now it does nothing.
Signed-off-by: Jan Kiszka
---
arch/arm/include/asm/arch-tegra/ap.h | 5 +
board/nvidia/common/board.c | 4
2 files changed, 9 insertions(+)
diff --git a/arch/arm/include/asm
memory from the beginning or
the end of a RAM bank as we do not want to increase their number (which
would happen if punching a hole) for simplicity reasons
This will be used in a subsequent patch for Jetson-TK1.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/virt-dt.c | 29
Will be required for obtaining the ID of the current CPU in shared PSCI
functions. The default implementation requires a dense ID space and only
supports a single cluster. Therefore, the functions can be overloaded in
cases where these assumptions do not hold.
CC: Marc Zyngier
Signed-off-by: Jan
This is already invoked a few cycles later in monitor mode by
_secure_monitor. Drop it here, it serves no purpose.
CC: Marc Zyngier
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/sunxi/psci.S | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.S b/arch/arm/cpu
This algorithm will be useful on Tegra as well, plus we will need it for
making _psci_target_pc per-CPU.
CC: Marc Zyngier
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/psci.S | 14 ++
arch/arm/cpu/armv7/sunxi/psci.S | 15 +--
2 files changed, 19 insertions
On 2015-03-08 21:08, Ian Campbell wrote:
> On Fri, 2015-02-27 at 14:27 +0100, Jan Kiszka wrote:
>
>> CC: Ian Campbell
>
> I've been running with these on my Jetson (and booting Xen on top) just
> fine. So, FWIW:
>
> Tested-by: Ian Campbell
Great, thanks! I&#x
This fixes a regression of e310b93ec1, affecting Ethernet on the Jetson
TK1, e.g.
Signed-off-by: Jan Kiszka
---
common/board_r.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/common/board_r.c b/common/board_r.c
index 38be09b..0335f6b 100644
--- a/common/board_r.c
+++ b/common
On 2015-02-12 01:40, Angelo Dureghello wrote:
> Add generic-board support for the m68k architecture.
>
> Signed-off-by: Angelo Dureghello
> ---
> arch/m68k/config.mk| 3 +++
> arch/m68k/include/asm/config.h | 3 +++
> arch/m68k/include/asm/u-boot.h | 8
> arch/m68k/lib/Ma
On 2015-03-02 11:19, Marc Zyngier wrote:
> On 02/03/15 09:40, Jan Kiszka wrote:
>> On 2015-02-28 14:56, Marc Zyngier wrote:
>>> On Fri, 27 Feb 2015 13:28:01 +0000
>>> Jan Kiszka wrote:
>>>
>>>> Handy for obtaining the ID of the current CPU. We w
On 2015-02-28 14:56, Marc Zyngier wrote:
> On Fri, 27 Feb 2015 13:28:01 +
> Jan Kiszka wrote:
>
>> Handy for obtaining the ID of the current CPU. We will have more use
>> cases.
>>
>> CC: Marc Zyngier
>> Signed-off-by: Jan Kiszka
>> ---
>>
Use a per-CPU variable for saving the target PC during CPU_ON
operations. This allows us to run this service independently on targets
that have more than 2 cores and also core-local power control.
CC: Marc Zyngier
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/psci.S | 11
This algorithm will be useful on Tegra as well, plus we will need it for
making _psci_target_pc per-CPU.
CC: Marc Zyngier
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/psci.S | 14 ++
arch/arm/cpu/armv7/sunxi/psci.S | 17 +++--
2 files changed, 21 insertions
This is already invoked a few cycles later in monitor mode by
_secure_monitor. Drop it here, it serves no purpose.
CC: Marc Zyngier
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/sunxi/psci.S | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.S b/arch/arm/cpu
On 2015-02-26 10:08, Thierry Reding wrote:
> On Wed, Feb 18, 2015 at 09:14:03AM +0100, Jan Kiszka wrote:
> [...]
>> +ENTRY(psci_cpu_off)
>> +bl psci_cpu_off_common
>> +
>> +mrc p15, 0, r1, c0, c0, 5 @ MPIDR
>> +and r1, r1, #7
On 2015-02-24 09:18, Thierry Reding wrote:
> On Tue, Feb 24, 2015 at 08:23:55AM +0100, Jan Kiszka wrote:
>> On 2015-02-20 10:36, Jan Kiszka wrote:
>>> On 2015-02-19 10:14, Thierry Reding wrote:
>>>> On Wed, Feb 18, 2015 at 09:34:53AM -0700, Stephen Warren wrote:
>
On 2015-02-20 10:36, Jan Kiszka wrote:
> On 2015-02-19 10:14, Thierry Reding wrote:
>> On Wed, Feb 18, 2015 at 09:34:53AM -0700, Stephen Warren wrote:
>>> On 02/17/2015 11:13 PM, Jan Kiszka wrote:
>>>> On 2015-02-17 22:03, Stephen Warren wrote:
>>>>
On 2015-02-19 10:14, Thierry Reding wrote:
> On Wed, Feb 18, 2015 at 09:34:53AM -0700, Stephen Warren wrote:
>> On 02/17/2015 11:13 PM, Jan Kiszka wrote:
>>> On 2015-02-17 22:03, Stephen Warren wrote:
>>>> On 02/16/2015 05:54 AM, Jan Kiszka wrote:
>>>>&g
On 2015-02-19 11:34, Thierry Reding wrote:
> On Tue, Feb 17, 2015 at 09:09:57AM +0100, Jan Kiszka wrote:
>> On 2015-02-16 16:38, Jan Kiszka wrote:
>>> On 2015-02-16 15:56, Mark Rutland wrote:
>>>> On Mon, Feb 16, 2015 at 02:31:21PM +, Jan Kiszka wrote:
>>&
On 2015-02-19 10:19, Ian Campbell wrote:
> On Thu, 2015-02-19 at 09:28 +0100, Thierry Reding wrote:
>> On Tue, Feb 17, 2015 at 11:55:24AM +, Mark Rutland wrote:
>>> [...]
>>>
>> This is getting invasive:
>>
>> If I add carveouts via adjusting memory banks, I need to account for the
an be influenced by an envvar) has been made when booting the
os.
Signed-off-by: Ian Campbell
[Jan: tiny style adjustment]
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/virt-v7.c | 5 +
arch/arm/cpu/tegra-common/ap.c | 15 +++
arch/arm/include/asm/system.h | 1 +
3 files change
From: Ian Campbell
The secure world code is relocated to the MB just below the top of 4G, we
reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is
not protected in h/w. See next patch.
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7
This function will be used to initialize CPU power management for Tegra
SOCs. For now it does nothing.
Signed-off-by: Jan Kiszka
---
arch/arm/include/asm/arch-tegra/ap.h | 5 +
board/nvidia/common/board.c | 4
2 files changed, 9 insertions(+)
diff --git a/arch/arm/include/asm
Use a per-CPU variable for saving the target PC during CPU_ON
operations. This allows us to run this service independently on targets
that have more than 2 cores and also core-local power control.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/psci.S | 8 ++--
arch/arm/cpu/armv7
memory from the beginning or
the end of a RAM bank as we do not want to increase their number (which
would happen if punching a hole) for simplicity reasons
This will be used in a subsequent patch for Jetson-TK1.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/virt-dt.c | 27
Will be used for unpowergating CPUs.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/tegra-common/powergate.c | 2 +-
arch/arm/include/asm/arch-tegra/powergate.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/tegra-common/powergate.c
b/arch/arm/cpu/tegra
oot/210881. It
consists of first enabling CPU1..3 via the PMC, just to powergate them
again with the help of the Flow Controller. Once the Flow Controller is
in place, we can leave the PMC alone while processing CPU_ON and CPU_OFF
PSCI requests.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv
This algorithm will be useful on Tegra as well, plus we will need it for
making _psci_target_pc per-CPU.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/psci.S | 14 ++
arch/arm/cpu/armv7/sunxi/psci.S | 17 +++--
2 files changed, 21 insertions(+), 10 deletions
We only set CNTFRQ in arch_timer_init for the boot CPU. But this has to
happen for all cores.
Fixing this resolves problems of KVM with emulating the generic
timer/counter.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/tegra-common/psci.S | 13 +
1 file changed, 13 insertions
_sunxi_cpu_entry can be converted completely into a reusable
psci_cpu_entry. Tegra124 will use it as well.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/psci.S | 19 +++
arch/arm/cpu/armv7/sunxi/psci.S | 21 ++---
2 files changed, 21 insertions(+), 19
configuration options and reserve secure code
tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
Jan Kiszka (9):
ARM: Factor out reusable psci_cpu_off_common
ARM: Factor out reusable psci_cpu_entry
ARM: Factor out reusable psci_get_cpu_stack_top
ARM: Put target PC for PSCI CPU_ON on
From: Ian Campbell
I will need mc_security_cfg0/1 in a future patch and I added the rest while
debugging, so thought I might as well commit them.
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/include/asm/arch-tegra124/mc.h | 35 +++--
1 file
Move parts of sunxi's psci_cpu_off into psci_cpu_off_common, namely
cache disabling and flushing, clrex and the disabling of SMP for the
dying CPU. These steps are apparently generic for ARMv7 and will be
reused for Tegra124 support.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/p
On 2015-02-17 22:05, Stephen Warren wrote:
> On 02/16/2015 05:54 AM, Jan Kiszka wrote:
>> The secure world code is relocated to the MB just below the top of 4G, we
>> reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE)
>> but it is
>> not prote
On 2015-02-17 22:06, Stephen Warren wrote:
> On 02/16/2015 05:54 AM, Jan Kiszka wrote:
>> From: Ian Campbell
>>
>> These registers can be used to prevent non-secure world from accessing a
>> megabyte aligned region of RAM, use them to protect the u-boot secure
>>
On 2015-02-17 22:03, Stephen Warren wrote:
> On 02/16/2015 05:54 AM, Jan Kiszka wrote:
>> This is based on Thierry Reding's work and uses Ian Campell's
>> preparatory patches. It comes with full support for CPU_ON/OFF PSCI
>> services. The algorithm used in this
On 2015-02-17 11:46, Mark Rutland wrote:
> On Tue, Feb 17, 2015 at 08:09:57AM +0000, Jan Kiszka wrote:
>> On 2015-02-16 16:38, Jan Kiszka wrote:
>>> On 2015-02-16 15:56, Mark Rutland wrote:
>>>> On Mon, Feb 16, 2015 at 02:31:21PM +, Jan Kiszka wrote:
>>&
On 2015-02-17 11:21, Mark Rutland wrote:
> On Tue, Feb 17, 2015 at 07:01:57AM +0000, Jan Kiszka wrote:
>> On 2015-02-16 15:02, Jan Kiszka wrote:
>>> On 2015-02-16 14:51, Mark Rutland wrote:
>>>> On Mon, Feb 16, 2015 at 01:44:36PM +, Jan Kiszka wrote:
>>&
On 2015-02-16 16:38, Jan Kiszka wrote:
> On 2015-02-16 15:56, Mark Rutland wrote:
>> On Mon, Feb 16, 2015 at 02:31:21PM +0000, Jan Kiszka wrote:
>>> On 2015-02-16 15:25, Mark Rutland wrote:
>>>> On Mon, Feb 16, 2015 at 01:51:37PM +, Jan Kiszka wrote:
>>&
On 2015-02-16 15:02, Jan Kiszka wrote:
> On 2015-02-16 14:51, Mark Rutland wrote:
>> On Mon, Feb 16, 2015 at 01:44:36PM +0000, Jan Kiszka wrote:
>>> On 2015-02-16 14:37, Mark Rutland wrote:
>>>> On Mon, Feb 16, 2015 at 12:54:49PM +, Jan Kiszka wrote:
>>>&
On 2015-02-16 15:56, Mark Rutland wrote:
> On Mon, Feb 16, 2015 at 02:31:21PM +0000, Jan Kiszka wrote:
>> On 2015-02-16 15:25, Mark Rutland wrote:
>>> On Mon, Feb 16, 2015 at 01:51:37PM +, Jan Kiszka wrote:
>>>> On 2015-02-16 14:42, Mark Rutland wrote:
>>&g
On 2015-02-16 15:25, Mark Rutland wrote:
> On Mon, Feb 16, 2015 at 01:51:37PM +0000, Jan Kiszka wrote:
>> On 2015-02-16 14:42, Mark Rutland wrote:
>>> On Mon, Feb 16, 2015 at 12:54:43PM +, Jan Kiszka wrote:
>>>> From: Ian Campbell
>>>>
>>>>
On 2015-02-16 14:51, Mark Rutland wrote:
> On Mon, Feb 16, 2015 at 01:44:36PM +0000, Jan Kiszka wrote:
>> On 2015-02-16 14:37, Mark Rutland wrote:
>>> On Mon, Feb 16, 2015 at 12:54:49PM +, Jan Kiszka wrote:
>>>> We only set CNTFRQ in arch_timer_init for
On 2015-02-16 14:49, Mark Rutland wrote:
> On Mon, Feb 16, 2015 at 12:54:48PM +0000, Jan Kiszka wrote:
>> From: Ian Campbell
>>
>> These registers can be used to prevent non-secure world from accessing a
>> megabyte aligned region of RAM, use them to protect the u-
On 2015-02-16 14:42, Mark Rutland wrote:
> On Mon, Feb 16, 2015 at 12:54:43PM +0000, Jan Kiszka wrote:
>> From: Ian Campbell
>>
>> In this case the secure code lives in RAM, and hence needs to be reserved,
>> but
>> it has been relocated, so the reservation
On 2015-02-16 14:37, Mark Rutland wrote:
> On Mon, Feb 16, 2015 at 12:54:49PM +0000, Jan Kiszka wrote:
>> We only set CNTFRQ in arch_timer_init for the boot CPU. But this has to
>> happen for all cores.
>>
>> Fixing this resolves problems of KVM with emulating t
This algorithm will be useful on Tegra as well, plus we will need it for
making _psci_target_pc per-CPU.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/psci.S | 14 ++
arch/arm/cpu/armv7/sunxi/psci.S | 17 +++--
2 files changed, 21 insertions(+), 10 deletions
Will be used for unpowergating CPUs.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/tegra-common/powergate.c | 2 +-
arch/arm/include/asm/arch-tegra/powergate.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/tegra-common/powergate.c
b/arch/arm/cpu/tegra
patch for Jetson-TK1
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/virt-dt.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c
index ad19e4c..eb95031 100644
--- a/arch/arm/cpu/armv7/virt-dt.c
+++ b
We only set CNTFRQ in arch_timer_init for the boot CPU. But this has to
happen for all cores.
Fixing this resolves problems of KVM with emulating the generic
timer/counter.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/tegra-common/psci.S | 13 +
1 file changed, 13 insertions
Move parts of sunxi's psci_cpu_off into psci_cpu_off_common, namely
cache disabling and flushing, clrex and the disabling of SMP for the
dying CPU. These steps are apparently generic for ARMv7 and will be
reused for Tegra124 support.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/p
This function will be used to initialize CPU power management for Tegra
SOCs. For now it does nothing.
Signed-off-by: Jan Kiszka
---
arch/arm/include/asm/arch-tegra/ap.h | 5 +
board/nvidia/common/board.c | 4
2 files changed, 9 insertions(+)
diff --git a/arch/arm/include/asm
an be influenced by an envvar) has been made when booting the
os.
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/virt-v7.c | 5 +
arch/arm/cpu/tegra-common/ap.c | 15 +++
arch/arm/include/asm/system.h | 1 +
3 files changed, 21 insertions(+)
diff --git a
oot/210881. It
consists of first enabling CPU1..3 via the PMC, just to powergate them
again with the help of the Flow Controller. Once the Flow Controller is
in place, we can leave the PMC alone while processing CPU_ON and CPU_OFF
PSCI requests.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv
From: Ian Campbell
I will need mc_security_cfg0/1 in a future patch and I added the rest while
debugging, so thought I might as well commit them.
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/include/asm/arch-tegra124/mc.h | 35 +++--
1 file
secure code
tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
Jan Kiszka (8):
ARM: Factor out reusable psci_cpu_off_common
ARM: Factor out reusable psci_cpu_entry
ARM: Factor out reusable psci_get_cpu_stack_top
ARM: Put target PC for PSCI CPU_ON on per-CPU stack
tegra: Make
_sunxi_cpu_entry can be converted completely into a reusable
psci_cpu_entry. Tegra124 will use it as well.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/psci.S | 19 +++
arch/arm/cpu/armv7/sunxi/psci.S | 21 ++---
2 files changed, 21 insertions(+), 19
Use a per-CPU variable for saving the target PC during CPU_ON
operations. This allows us to run this service independently on targets
that have more than 2 cores and also core-local power control.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/psci.S | 8 ++--
arch/arm/cpu/armv7
From: Ian Campbell
The secure world code is relocated to the MB just below the top of 4G, we
reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is
not protected in h/w. See next patch.
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 2015-02-15 07:29, Jan Kiszka wrote:
> On 2015-02-15 03:01, Chen-Yu Tsai wrote:
>> Hi,
>>
>> On Sun, Feb 15, 2015 at 5:28 AM, Jan Kiszka
>> wrote:
>>> From: Jan Kiszka
>>>
>>> _sunxi
On 2015-02-15 03:01, Chen-Yu Tsai wrote:
> Hi,
>
> On Sun, Feb 15, 2015 at 5:28 AM, Jan Kiszka wrote:
>> From: Jan Kiszka
>>
>> _sunxi_cpu_entry can be converted completely into a reusable
>> psci_cpu_entry. Tegra124 will use it as well.
>>
>> Signe
an be influenced by an envvar) has been made when booting the
os.
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/virt-v7.c | 5 +
arch/arm/cpu/tegra-common/ap.c | 15 +++
arch/arm/include/asm/system.h | 1 +
3 files changed, 21 insertions(+)
diff --git a
From: Jan Kiszka
This is based on Thierry Reding's work and uses Ian Campell's
preparatory patches. It comes with full support for CPU_ON/OFF PSCI
services. The algorithm used in this version for turning CPUs on and
off was proposed by Thierry Reding in
http://thread.gmane.org/gmane
From: Jan Kiszka
Will be used for unpowergating CPUs.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/tegra-common/powergate.c | 2 +-
arch/arm/include/asm/arch-tegra/powergate.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/tegra-common/powergate.c
b
From: Ian Campbell
I will need mc_security_cfg0/1 in a future patch and I added the rest while
debugging, so thought I might as well commit them.
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/include/asm/arch-tegra124/mc.h | 35 +++--
1 file
From: Jan Kiszka
This function will be used to initialize CPU power management for Tegra
SOCs. For now it does nothing.
Signed-off-by: Jan Kiszka
---
arch/arm/include/asm/arch-tegra/ap.h | 5 +
board/nvidia/common/board.c | 4
2 files changed, 9 insertions(+)
diff --git a
From: Jan Kiszka
_sunxi_cpu_entry can be converted completely into a reusable
psci_cpu_entry. Tegra124 will use it as well.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/psci.S | 19 +++
arch/arm/cpu/armv7/sunxi/psci.S | 21 ++---
2 files changed, 21
From: Ian Campbell
The secure world code is relocated to the MB just below the top of 4G, we
reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is
not protected in h/w. See next patch.
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7
patch for Jetson-TK1
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/virt-dt.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c
index ad19e4c..eb95031 100644
--- a/arch/arm/cpu/armv7/virt-dt.c
+++ b
line CPUs 1-3 as
it likes (provided CONFIG_CPU_IDLE is off).
Patches are also available here:
https://github.com/siemens/u-boot/tree/jetson-tk1
Looking forward to review.
Jan
CC: Ian Campbell
CC: Jan Kiszka
Ian Campbell (4):
tegra124: Add more registers to struct mc_ctlr
virt-dt: Allow reserva
From: Jan Kiszka
Move parts of sunxi's psci_cpu_off into psci_cpu_off_common, namely
cache disabling and flushing, clrex and the disabling of SMP for the
dying CPU. These steps are apparently generic for ARMv7 and will be
reused for Tegra124 support.
Signed-off-by: Jan Kiszka
---
arch/ar
On 2015-02-09 12:26, Mark Rutland wrote:
> [...]
>
The solution that was discussed internally would involve having the
secure monitor (U-Boot's PSCI implementation in this case) program the
flow controller appropriately, point the CPU reset vectors to a location
containing a WF
le #ifdef's for enabling v0.1 and v0.2, to allow
>> platforms to opt-in to v0.2 support.
>>
>> On Wed, 2014-12-31 at 13:46 +0100, Jan Kiszka wrote:
>>> This adds CPU offlining and PSCI v0.2 support. Changes since v2:
>>> - add more comments to psci_fiq_enter (pa
From: Jan Kiszka
This extends the PSCI support for the A20 to a dual v0.2 and v0.1
interface. Recent OSes will prefer v0.2, olders will still find the
original interface, just at v0.2 service IDs.
In addition to the existing services, v0.2 requires us to implement both
system off and reset. At
From: Jan Kiszka
"adr rX, text_end" only works if the label is close. Adding further code
to the other functions will prevent this. So move the containing
function close to label. No functional change.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/sunxi/p
This adds CPU offlining and PSCI v0.2 support. Changes since v2:
- add more comments to psci_fiq_enter (patch 1)
- rebase over u-boot-sunxi/next
See patches for further details.
Jan
Jan Kiszka (4):
sun7i: Add support for taking CPUs offline via PSCI
sun7i: Add PSCI v0.2 support
sun7i
From: Jan Kiszka
It's mandatory according to the spec, and Linux uses it for checking if
an offlined CPU is already dead. Without this implemented, we get some
warnings on the kernel console at least.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/sunxi/psci.S
From: Jan Kiszka
Based on the original version by Marc Zyngier. It adds a psci_cpu_off
implementation for the A20 SoC. The mechanism works by first preparing
the calling CPU to go offline (disable and flush cache, disable SMP),
then requesting CPU 0 to pull the plug. The request is sent as FIQ
On 2014-12-31 12:30, Ian Campbell wrote:
> On Tue, 2014-12-30 at 18:14 +0100, Jan Kiszka wrote:
>
> I had a couple of comments on v1 a few days ago (a bit late, sorry)
> which I think you may have missed? AFIACT they still stand on this
> version.
>
>> This adds CPU
On 2014-12-29 15:08, Ian Campbell wrote:
> On Mon, 2014-12-15 at 12:37 +0100, Jan Kiszka wrote:
>> +movwr8, #(GICC_BASE & 0x)
>> +movtr8, #(GICC_BASE >> 16)
>> +ldr r9, [r8, #GICC_IAR]
>> +movwr10, #0x3ff
>> +
On 2014-12-29 15:12, Ian Campbell wrote:
> On Mon, 2014-12-15 at 12:37 +0100, Jan Kiszka wrote:
>> This extends the PSCI support for the A20 to a dual v0.2 and v0.1
>> interface. Recent OSes will prefer v0.2, olders will still find the
>> original interface, just at v0.2
From: Jan Kiszka
This extends the PSCI support for the A20 to a dual v0.2 and v0.1
interface. Recent OSes will prefer v0.2, olders will still find the
original interface, just at v0.2 service IDs.
In addition to the existing services, v0.2 requires us to implement both
system off and reset. At
From: Jan Kiszka
It's mandatory according to the spec, and Linux uses it for checking if
an offlined CPU is already dead. Without this implemented, we get some
warnings on the kernel console at least.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/sunxi/psci.S
This adds CPU offlining and PSCI v0.2 support. Changes since v1:
- add AFFINITY_INFO support (mandatory for v0.2)
- rebase over master
- include "sunxi: Align PSCI stack calculation to comment" to provide
the complete queue
See patches for further details.
Jan
Jan Kiszka (5
From: Jan Kiszka
Based on the original version by Marc Zyngier. It adds a psci_cpu_off
implementation for the A20 SoC. The mechanism works by first preparing
the calling CPU to go offline (disable and flush cache, disable SMP),
then requesting CPU 0 to pull the plug. The request is sent as FIQ
From: Jan Kiszka
"adr rX, text_end" only works if the label is close. Adding further code
to the other functions will prevent this. So move the containing
function close to label. No functional change.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/sunxi/p
From: Jan Kiszka
0x400 is true 1K.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/sunxi/psci.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.S b/arch/arm/cpu/armv7/sunxi/psci.S
index b9ea78b..a84807d 100644
--- a/arch/arm/cpu/armv7/sunxi
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