other.
After all, U-Boot fails to boot on chip with memory map different from
default map,
uniphier_mem_map_init() should be moved to dram_init(), which is
called before get_page_table_size().
Signed-off-by: Kunihiko Hayashi
---
arch/arm/mach-uniphier/dram_init.c | 16 +++-
1 file
Hi Jagan,
On 2023/12/18 20:40, Jagan Teki wrote:
On Wed, Oct 25, 2023 at 1:20 PM Kunihiko Hayashi
wrote:
Currently the controller driver has maximum frequency in plat->frequency
that is specified by "spi-max-frequency" DT property in the controller
node. This is special to U-Boo
r clock. And this patch determines the maximum
frequency based on the clock rate if the controller node property isn't
specified.
Signed-off-by: Kunihiko Hayashi
---
drivers/spi/designware_spi.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/designw
Update maintainers for UniPhier SoC platform.
Signed-off-by: Kunihiko Hayashi
---
MAINTAINERS | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0a10a436bcec..281a3f81f73a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -723,7 +723,10 @@ F
, but will be cleared. As a result, the devicetree
become invalid.
To avoid this issue, should relocate it regardless of GD_FLG_SKIP_RELOC
in reloc_fdt().
Signed-off-by: Kunihiko Hayashi
---
common/board_f.c | 2 --
1 file changed, 2 deletions(-)
Changes since v1:
- Remove condition for skipping
Hi Simon,
On 2023/06/19 21:36, Simon Glass wrote:
Hi Kunihiko,
On Fri, 16 Jun 2023 at 00:59, Kunihiko Hayashi
wrote:
Hi Simon,
Thank you for your comment.
On 2023/06/13 6:17, Simon Glass wrote:
Hi Kunihiko,
On Thu, 8 Jun 2023 at 07:53, Kunihiko Hayashi
wrote:
There are cases
Hi Simon,
Thank you for your comment.
On 2023/06/13 6:17, Simon Glass wrote:
Hi Kunihiko,
On Thu, 8 Jun 2023 at 07:53, Kunihiko Hayashi
wrote:
There are cases that the devicetree blob is placed after _end, such as
fdt_find_separate() returns _end. This is in bss area cleared before
, should relocate it to the new fdt area using the
latter condition in reloc_fdt().
Signed-off-by: Kunihiko Hayashi
---
common/board_f.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/common/board_f.c b/common/board_f.c
index 51d2f3c365e9..9a245872d190 100644
--- a/common
= UCLASS_SIMPLE_BUS,
+ .of_match = dwc3_am62_match,
+ .bind = dwc3_glue_bind,
+ .probe = dwc3_glue_probe,
+ .remove = dwc3_glue_remove,
+ .plat_auto = sizeof(struct dwc3_glue_data),
+
The pointless blank line.
+};
Thank you,
---
Best Regards
Kunihiko Hayashi
I SPI flash controller driver")
Signed-off-by: Kunihiko Hayashi
---
drivers/spi/spi-sn-f-ospi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/spi-sn-f-ospi.c b/drivers/spi/spi-sn-f-ospi.c
index ebf2903d3e..e3633a5260 100644
--- a/drivers/spi/spi-sn-f-os
-by: Kunihiko Hayashi
---
arch/arm/dts/uniphier-ld11-global.dts | 4 +
arch/arm/dts/uniphier-ld11-ref.dts| 6 +-
arch/arm/dts/uniphier-ld11.dtsi | 94 ++--
arch/arm/dts/uniphier-ld20.dtsi | 129 +---
arch/arm/dts/uniphier-ld4-ref.dts | 10 +-
arch/arm
UniPhier DT applies its own USB node for U-Boot due to the USB driver
constrains. After solving this issue, u-boot allows the original USB node.
After switching USB node, synchronization of USB node with Linux becomes
possible.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/dts/uniphier-ld20
Migrate the USB node to the original node after updating dwc3-generic and
dwc3-uniphier.
https://lists.denx.de/pipermail/u-boot/2023-February/509635.html
And synchronize UniPhier devicetree with Linux v6.2.
Kunihiko Hayashi (2):
ARM: dts: uniphier: Switch USB node to the original
ARM: dts
Hi Marek,
On 2023/02/21 0:53, Marek Vasut wrote:
On 2/20/23 06:50, Kunihiko Hayashi wrote:
This series achieves refactoring of dwc3-generic.
First, dwc3-generic allows DT controller nodes to be children of glue
nodes,
but outside of glue nodes.
To achieve this goal, define a glue-specific
Add USB3 PHY driver support to control clocks and resets needed to enable
PHY. The phy_ops->init() and exit() control PHY clocks and resets only,
and clocks and resets for the controller and the parent logic are enabled
in advance.
Signed-off-by: Kunihiko Hayashi
---
drivers/phy/socion
dwc3-uniphier depends on xhci-dwc3 framework, however, it is preferable
to use dwc3-generic.
This driver calls the exported dwc3-generic functions and redefine
the SoC-dependent operations to fit dwc3-generic.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3
Replacing with dwc3-generic, no need USB_XHCI_DWC3 anymore.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
configs/uniphier_v7_defconfig | 1 -
configs/uniphier_v8_defconfig | 1 -
2 files changed, 2 deletions(-)
diff --git a/configs/uniphier_v7_defconfig b/configs
Add the size of regs property to the glue structure to correctly
specify the register region to map.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3/dwc3-generic.c | 2 +-
drivers/usb/dwc3/dwc3-generic.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff
Same as the reset cotnrol, should add a clock initialization in child DT
node, if the glue node doesn't have any clocks.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3/dwc3-generic.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3
such a controller node and binds the driver related to the node.
If this callback isn't defined, dwc_glue_bind() looks for the controller
nodes from the child nodes, as before.
Suggested-by: Marek Vasut
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3/dwc3-generic.c | 93
The USB SS-PHY needs its own clock, however, some clocks don't have
clock gates. Define missing clock entries for the PHY as reference
clock.
Signed-off-by: Kunihiko Hayashi
---
drivers/clk/uniphier/clk-uniphier-sys.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/uniphier
the controller-reset
controls "syscon-reset" instead.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/reset/reset-uniphier.c | 78 +-
1 file changed, 77 insertions(+), 1 deletion(-)
diff --git a/drivers/reset/reset-uniphier.
level node (i.MX8MP)
- in both top level node and generic subnode (Rockchip)
Cover all the possibilities here by looking into both nodes, start
with the top level node as that seems to be used in majority of DTs
to reference the clock.
Signed-off-by: Marek Vasut
Acked-by: Kunihiko Hayashi
()
- dwc3_glue_remove()
The SoC-dependent glue drivers can only define their own wrapper driver
and specify these functions. The drivers can also add their own compatible
strings and configure functions.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3/dwc3-generic.c | 18
device
- Add a patch to support USB glue reset
- Add a patch to add missing PHY clocks
- Add a patch to enable the driver to enable PHY clocks and resets
- Add a patch to fix node names and missing properties
- Add a patch to switch to the original USB node in DT
Kunihiko Hayashi (9):
usb: dwc3
Hi Marek,
On 2023/02/18 4:58, Marek Vasut wrote:
On 2/16/23 17:14, Kunihiko Hayashi wrote:
Hi Marek,
Hello Hayashi-san,
Sorry for late reply.
On 2023/02/14 6:06, Marek Vasut wrote:
On 2/13/23 04:08, Kunihiko Hayashi wrote:
Hi Marek,
Hello Hayashi-san,
[...]
I think so, however
Hi Marek,
Sorry for late reply.
On 2023/02/14 6:06, Marek Vasut wrote:
On 2/13/23 04:08, Kunihiko Hayashi wrote:
Hi Marek,
Hello Hayashi-san,
[...]
I think so, however, when I added .exit() and executed "usb stop;usb
start",
unfortunately the command got stuck.
Currently un
Hi Marek,
On 2023/02/10 23:09, Marek Vasut wrote:
On 2/8/23 10:15, Kunihiko Hayashi wrote:
[...]
+static int uniphier_usb3phy_init(struct phy *phy)
+{
+ struct uniphier_usb3phy_priv *priv = dev_get_priv(phy->dev);
+ int ret;
+
+ ret = clk_enable_bulk(>clks);
+ i
Add USB3 PHY driver support to control clocks and resets for the phy.
Signed-off-by: Kunihiko Hayashi
---
drivers/phy/socionext/Kconfig | 8 ++
drivers/phy/socionext/Makefile| 1 +
drivers/phy/socionext/phy-uniphier-usb3.c | 93 +++
3 files changed
Replacing with dwc3-generic, no need USB_XHCI_DWC3 anymore.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
configs/uniphier_v7_defconfig | 1 -
configs/uniphier_v8_defconfig | 1 -
2 files changed, 2 deletions(-)
diff --git a/configs/uniphier_v7_defconfig b/configs
Add the size of regs property to the glue structure to correctly
specify the register region to map.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3/dwc3-generic.c | 2 +-
drivers/usb/dwc3/dwc3-generic.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff
dwc3-uniphier depends on xhci-dwc3 framework, however, it is preferable
to use dwc3-generic.
This driver calls the exported dwc3-generic functions and redefine
the SoC-dependent operations to fit dwc3-generic.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3
()
- dwc3_glue_remove()
The SoC-dependent glue drivers can only define their own wrapper driver
and specify these functions. The drivers can also add their own compatible
strings and configure functions.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3/dwc3-generic.c | 18
the controller-reset
controls "syscon-reset" instead.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/reset/reset-uniphier.c | 78 +-
1 file changed, 77 insertions(+), 1 deletion(-)
diff --git a/drivers/reset/reset-uniphier.
The USB SS-PHY needs its own clock, however, some clocks don't have
clock gates. Define missing clock entries for the PHY as reference
clock.
Signed-off-by: Kunihiko Hayashi
---
drivers/clk/uniphier/clk-uniphier-sys.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/uniphier
Same as the reset cotnrol, should add a clock initialization in child DT
node, if the glue node doesn't have any clocks.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3/dwc3-generic.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3
level node (i.MX8MP)
- in both top level node and generic subnode (Rockchip)
Cover all the possibilities here by looking into both nodes, start
with the top level node as that seems to be used in majority of DTs
to reference the clock.
Signed-off-by: Marek Vasut
Acked-by: Kunihiko Hayashi
such a controller node and binds the driver related to the node.
If this callback isn't defined, dwc_glue_bind() looks for the controller
nodes from the child nodes, as before.
Suggested-by: Marek Vasut
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3/dwc3-generic.c | 93
- Add a patch to enable the driver to enable PHY clocks and resets
- Add a patch to fix node names and missing properties
- Add a patch to switch to the original USB node in DT
Kunihiko Hayashi (9):
usb: dwc3-generic: Allow different controller DT node pattern
usb: dwc3-generic: Add clock
Hi Marek,
On 2023/02/02 6:51, Marek Vasut wrote:
On 2/1/23 02:13, Kunihiko Hayashi wrote:
Add reset control support in USB glue logic. This needs to control
the external clocks and resets for the logic before accessing the
glue logic.
Signed-off-by: Kunihiko Hayashi
With the very little
Hi Marek,
On 2023/02/02 6:55, Marek Vasut wrote:
On 2/1/23 02:13, Kunihiko Hayashi wrote:
The node name should follow the generic name list in DT specification.
This moves "reset" to "reset-controller", "hs-phy" and "ss-phy" to "phy"
in the USB
Hi Marek,
Thank you for reviewing.
On 2023/02/02 6:54, Marek Vasut wrote:
On 2/1/23 02:13, Kunihiko Hayashi wrote:
Add USB3 PHY driver support to control clocks and resets for the phy.
Signed-off-by: Kunihiko Hayashi
---
configs/uniphier_v8_defconfig | 1 +
drivers/phy
UniPhier DT applies its own USB node for U-Boot due to the USB driver
constrains. After solving this issue, u-boot allows the original USB node.
After switching USB node, synchronization of USB node with Linux becomes
possible.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/dts/uniphier-ld20
()
- dwc3_glue_remove()
The SoC-dependent glue drivers can only define their own wrapper driver
and specify these functions. The drivers can also add their own compatible
strings and configure functions.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3/dwc3-generic.c | 18
The node name should follow the generic name list in DT specification.
This moves "reset" to "reset-controller", "hs-phy" and "ss-phy" to "phy"
in the USB glue node.
And the node should have reg property to define the register region.
Signed-of
Add USB3 PHY driver support to control clocks and resets for the phy.
Signed-off-by: Kunihiko Hayashi
---
configs/uniphier_v8_defconfig | 1 +
drivers/phy/socionext/Kconfig | 7 ++
drivers/phy/socionext/Makefile| 1 +
drivers/phy/socionext/phy-uniphier
Replacing with dwc3-generic, no need USB_XHCI_DWC3 anymore.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
configs/uniphier_v7_defconfig | 1 -
configs/uniphier_v8_defconfig | 1 -
2 files changed, 2 deletions(-)
diff --git a/configs/uniphier_v7_defconfig b/configs
dwc3-uniphier depends on xhci-dwc3 framework, however, it is preferable
to use dwc3-generic.
This driver calls the exported dwc3-generic functions and redefine
the SoC-dependent operations to fit dwc3-generic.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3
The USB SS-PHY needs its own clock, however, some clocks don't have
clock gates. Define missing clock entries for the PHY as reference
clock.
Signed-off-by: Kunihiko Hayashi
---
drivers/clk/uniphier/clk-uniphier-sys.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/uniphier
Add the size of regs property to the glue structure to correctly
specify the register region to map.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3/dwc3-generic.c | 2 +-
drivers/usb/dwc3/dwc3-generic.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff
Same as the reset cotnrol, should add a clock initialization in child DT
node, if the glue node doesn't have any clocks.
Signed-off-by: Kunihiko Hayashi
---
drivers/usb/dwc3/dwc3-generic.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb
Add reset control support in USB glue logic. This needs to control
the external clocks and resets for the logic before accessing the
glue logic.
Signed-off-by: Kunihiko Hayashi
---
drivers/reset/reset-uniphier.c | 78 +-
1 file changed, 77 insertions(+), 1
such a controller node and binds the driver related to the node.
If this callback isn't defined, dwc_glue_bind() looks for the controller
nodes from the child nodes, as before.
Suggested-by: Marek Vasut
Signed-off-by: Kunihiko Hayashi
---
drivers/usb/dwc3/dwc3-generic.c | 93
clocks
- Add PATCH 9 to enable the driver to enable PHY clocks and resets
- Add PATCH 10 to fix node names and missing properties
- Add PATCH 11 to switch to the original USB node in DT
Kunihiko Hayashi (11):
usb: dwc3-generic: Allow different controller DT node pattern
usb: dwc3-generic: Add
level node (i.MX8MP)
- in both top level node and generic subnode (Rockchip)
Cover all the possibilities here by looking into both nodes, start
with the top level node as that seems to be used in majority of DTs
to reference the clock.
Signed-off-by: Marek Vasut
Acked-by: Kunihiko Hayashi
Hi Marek,
On 2023/01/31 7:50, Marek Vasut wrote:
On 1/30/23 06:52, Kunihiko Hayashi wrote:
Hi Marek,
Hello Hayashi-san,
Sorry for late reply.
I was stuck in some pitfalls.
No worries, the MW closed today, but rc2 should be still OK to land
these patches.
Thank you for caring
Hi Marek,
Sorry for late reply.
I was stuck in some pitfalls.
On 2023/01/25 22:03, Marek Vasut wrote:
On 1/25/23 09:40, Kunihiko Hayashi wrote:
Hi Marek,
Hello Hayashi-san,
[...]
The idea is that the dwc3-generic.c (or dwc3-uniphier.c , placement does
not really matter) binds
Hi Marek,
On 2023/01/25 10:38, Marek Vasut wrote:
On 1/24/23 03:53, Kunihiko Hayashi wrote:
Hi Marek,
Hello Hayashi-san,
On 2023/01/24 0:49, Marek Vasut wrote:
On 1/23/23 06:01, Kunihiko Hayashi wrote:
Hi Marek,
Hello Hayashi-san,
[...]
On the other hand, the PXS2 controller
Hi Marek,
On 2023/01/24 0:49, Marek Vasut wrote:
On 1/23/23 06:01, Kunihiko Hayashi wrote:
Hi Marek,
Hello Hayashi-san,
[...]
On the other hand, the PXS2 controller for example is not a bus:
arch/arm/dts/uniphier-pxs2.dtsi:
596 _usb0: usb@65a0 {
597 compatible = "soci
Hi Marek,
On 2023/01/23 12:37, Marek Vasut wrote:
On 1/23/23 04:08, Kunihiko Hayashi wrote:
Hello Hayashi-san,
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index f010291d02..dadaa083e7 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -25,14 +25,14
Hi Marek,
Thank you for reviewing.
On 2023/01/23 10:42, Marek Vasut wrote:
On 1/23/23 01:47, Kunihiko Hayashi wrote:
The glue driver doesn't do or offer actively anything, SIMPLE_BUS is
more preferable to represent the driver.
Signed-off-by: Kunihiko Hayashi
---
drivers/usb/dwc3/Kconfig
dwc3-uniphier depends on xhci-dwc3 framework, however, it is preferable
to use dwc3-generic.
This driver calls the exported dwc3-generic functions and redefine
the SoC-dependent operations to fit dwc3-generic.
Signed-off-by: Kunihiko Hayashi
---
drivers/usb/dwc3/Kconfig | 3
Replacing with dwc3-generic, no need USB_XHCI_DWC3 anymore.
Signed-off-by: Kunihiko Hayashi
---
configs/uniphier_v7_defconfig | 1 -
configs/uniphier_v8_defconfig | 1 -
2 files changed, 2 deletions(-)
diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig
index d626968c76
Add the size of regs property to the glue structure to correctly
specify the register region to map.
Signed-off-by: Kunihiko Hayashi
---
drivers/usb/dwc3/dwc3-generic.c | 2 +-
drivers/usb/dwc3/dwc3-generic.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3
()
- dwc3_glue_remove()
The SoC-dependent glue drivers can only define their own wrapper driver
and specify these functions. The drivers can also add their own compatible
strings and configure functions.
Signed-off-by: Kunihiko Hayashi
---
drivers/usb/dwc3/dwc3-generic.c | 17 -
drivers/usb/dwc3
The glue driver doesn't do or offer actively anything, SIMPLE_BUS is
more preferable to represent the driver.
Signed-off-by: Kunihiko Hayashi
---
drivers/usb/dwc3/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
This series exports the structures and functions from the driver source
to the header, and replaces dwc3-uniphier driver to use them.
This expects dwc3-generic to prevent more SoC-dependent codes.
Kunihiko Hayashi (5):
usb: dwc3-generic: Export glue structures and functions
usb: dwc3-generic
quot;ret" comes from readl_poll_timeout() and is zero,
so the error can't be detected. It should be fixed.
Fixes: 238bd0b8ce52 ("i2c: UniPhier: add driver for UniPhier FIFO-builtin i2c
controller")
and,
Acked-by: Kunihiko Hayashi
Thank you,
---
Best Regards
Kunihiko Hayashi
operate indirect access mode and single data rate mode.
Signed-off-by: Kunihiko Hayashi
---
drivers/spi/Kconfig | 8 +
drivers/spi/Makefile| 1 +
drivers/spi/spi-sn-f-ospi.c | 686
3 files changed, 695 insertions(+)
create mode 100644 drivers
This patch defines a quirk to disable the block count
for single block transactions.
This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Jaehoon Chung
---
drivers/mmc/s
Add Socionext F_SDH30_E51 IP support. The features of this IP includes
CMD/DAT line delay and force card insertion mode for non-removable cards.
And the IP needs to add some quirks.
Signed-off-by: Kunihiko Hayashi
---
drivers/mmc/Kconfig | 4 +--
drivers/mmc/f_sdh30.c | 66
Add Reviewed-by tag
Kunihiko Hayashi (2):
mmc: sdhci: Add new quirks for SUPPORT_SINGLE
mmc: f_sdh30: Add support for F_SDH30_E51
drivers/mmc/Kconfig | 4 +--
drivers/mmc/f_sdh30.c | 66 +--
drivers/mmc/sdhci.c | 8 --
include/sdhci.h |
Hi Jaehoon,
Thank you for checking.
On 2022/09/08 20:35, Jaehoon Chung wrote:
On 9/6/22 09:39, Kunihiko Hayashi wrote:
Add Socionext F_SDH30_E51 IP support. The features of this IP includes
CMD/DAT line delay and force card insertion mode for non-removable cards.
And the IP needs to add some
Add Socionext F_SDH30_E51 IP support. The features of this IP includes
CMD/DAT line delay and force card insertion mode for non-removable cards.
And the IP needs to add some quirks.
Signed-off-by: Kunihiko Hayashi
---
drivers/mmc/Kconfig | 4 +--
drivers/mmc/f_sdh30.c | 64
This patch defines a quirk to disable the block count
for single block transactions.
This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").
Signed-off-by: Kunihiko Hayashi
---
drivers/mmc/sdhci.c | 8 +---
include/sdhci.h
This series adds a new quirk "SUPPORT_SINGLE" for single transaction to
sdhci framework and Socionext F_SDH30_E51 IP support to f_sdh30 driver.
Kunihiko Hayashi (2):
mmc: sdhci: Add new quirks for SUPPORT_SINGLE
mmc: f_sdh30: Add support for F_SDH30_E51
drivers/mmc/Kcon
Hi Michal,
On 2022/07/15 19:48, Michal Simek wrote:
On 7/13/22 03:38, Kunihiko Hayashi wrote:
Since the calulation of "bgen" is rounded down, using a higher
baudrate will result in a larger difference from the actual
baudrate. Should use DIV_ROUND_CLOSEST() like the Linux driver.
UniPhier LD20, PXs2 and PXs3 boards have ethernet phy that has RX/TX delays
of RGMII interface using pull-ups on the RXDLY and TXDLY pins.
So should set the phy-mode to "rgmii-id" to show that RX/TX delays are
enabled.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/dts/uniphier-ld2
for LD11, the driver will abort
with an error.
Signed-off-by: Kunihiko Hayashi
---
drivers/net/sni_ave.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/net/sni_ave.c b/drivers/net/sni_ave.c
index 58276a40c774..014b070d9e52 100644
--- a/drivers/net
This series adds support for RGMII-ID phy-mode for the SoCs that implement
AVE ethernet controller. Some SoCs need to enable delay pins as default.
Kunihiko Hayashi (2):
net: ave: Add capability of rgmii-id mode
ARM: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins
arch/arm
Since the calulation of "bgen" is rounded down, using a higher
baudrate will result in a larger difference from the actual
baudrate. Should use DIV_ROUND_CLOSEST() like the Linux driver.
Signed-off-by: Kunihiko Hayashi
---
drivers/serial/serial_zynq.c | 2 +-
1 file changed, 1 inser
Add the device tree for Akebi96. Akebi96 is a 96boards certified
development board based on UniPhier LD20.
( https://www.96boards.org/product/akebi96/ )
Signed-off-by: Masami Hiramatsu
Signed-off-by: Kunihiko Hayashi
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/uniphier
Add PCIe driver for UniPhier SoCs. This PCIe controller is based on
Synopsys DesignWare Core IP.
This version doesn't apply common DW functions because supported
controller doesn't have unroll version of iATU.
Signed-off-by: Kunihiko Hayashi
---
drivers/pci/Kconfig | 10 ++
drivers
Enable CONFIG_SYS_PCI_64BIT to allow 64bit access to PCI space.
Signed-off-by: Kunihiko Hayashi
---
include/configs/uniphier.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index bad4e41..12028e5 100644
--- a/include/configs
Add PCIe PHY driver support for Pro5, LD20 and PXs3 SoCs.
Signed-off-by: Kunihiko Hayashi
---
drivers/Kconfig | 2 ++
drivers/Makefile | 1 +
drivers/phy/socionext/Kconfig | 12 +++
drivers/phy/socionext/Makefile
Add reset control for PCIe controller on each SoC.
Signed-off-by: Kunihiko Hayashi
---
drivers/reset/reset-uniphier.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c
index 2694d13..c5af995 100644
--- a/drivers/reset/reset
Add clock control for PCIe controller on each SoC.
Signed-off-by: Kunihiko Hayashi
---
drivers/clk/uniphier/clk-uniphier-sys.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c
b/drivers/clk/uniphier/clk-uniphier-sys.c
index c627a4b..ff5d364 100644
.
And this series includes Akebi96 board (96boards) support that has
UniPhier LD20 SoC and PCIe interface. The controller is available for
LD20 and PXs3 SoCs, and the devicetree already supports it.
Kunihiko Hayashi (6):
clk: uniphier: Add PCIe clock entry
reset: uniphier: Add PCIe reset entry
.
Signed-off-by: Kunihiko Hayashi
---
drivers/serial/serial_zynq.c | 68
1 file changed, 68 insertions(+)
diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c
index 799d524..2f49f59 100644
--- a/drivers/serial/serial_zynq.c
+++ b
Hi Michal,
On 2021/06/23 20:15, Michal Simek wrote:
Hi Kunihiko,
On 6/23/21 12:52 PM, Kunihiko Hayashi wrote:
Hi Michal,
On 2021/06/22 21:44, Michal Simek wrote:
Hi,
On 6/22/21 6:24 AM, Kunihiko Hayashi wrote:
This adds serial parameters that include stop bit mode, parity mode
Hi Michal,
On 2021/06/22 21:44, Michal Simek wrote:
Hi,
On 6/22/21 6:24 AM, Kunihiko Hayashi wrote:
This adds serial parameters that include stop bit mode, parity mode,
and character length. Mark parity and space parity modes are not
supported.
Signed-off-by: Kunihiko Hayashi
---
drivers
This adds serial parameters that include stop bit mode, parity mode,
and character length. Mark parity and space parity modes are not
supported.
Signed-off-by: Kunihiko Hayashi
---
drivers/serial/serial_zynq.c | 64
1 file changed, 64 insertions
e added to the offset
to fix the address.
gd->env_addr
= (orig env) + ("run-vs-link" offset) + gd->reloc_off
= (orig env) + (SYS_TEXT_BASE - _start) + (gd->relocaddr - SYS_TEXT_BASE)
= (orig env) + (gd->relocaddr - _start)
Cc: Marek Vasut
Signed-off-by: Kunihiko Hayas
Hi Marek,
On 2021/06/10 10:07, Marek Vasut wrote:
On 6/8/21 9:54 AM, Kunihiko Hayashi wrote:
Hi,
[...]
I would expect that after relocation, if all you have is env_nowhere
driver, the env_nowhere_init() is called again from the first for() loop
of env_init() [1], which would set gd
Hi Marek,
On 2021/06/08 2:33, Marek Vasut wrote:
On 6/7/21 9:54 AM, Kunihiko Hayashi wrote:
Hi,
[...]
I would expect that after relocation, if all you have is env_nowhere
driver, the env_nowhere_init() is called again from the first for() loop
of env_init() [1], which would set gd
Hi Marek,
On 2021/06/07 3:08, Marek Vasut wrote:
On 6/3/21 6:15 PM, Kunihiko Hayashi wrote:
Hi Marek,
Hi,
Sorry for rate reply.
No worries, same here.
On 2021/05/25 16:35, Marek Vasut wrote:
On 5/12/21 4:09 PM, Kunihiko Hayashi wrote:
When CONFIG_ENV_IS_NOWHERE is enabled
Hi Marek,
Sorry for rate reply.
On 2021/05/25 16:35, Marek Vasut wrote:
On 5/12/21 4:09 PM, Kunihiko Hayashi wrote:
When CONFIG_ENV_IS_NOWHERE is enabled, env_nowhere_init() sets ENV_INVALID
to gd->env_valid, and sets default_environment before relocation to
gd->env_addr. After that, en
Hi Tim,
How about this fix?
You already tested Marek's patch, and I'd like to hear your comment
about this patch, or know whether it occurs the issue with
CONFIG_ENV_IS_NOWHERE if possible.
Thank you,
On 2021/05/17 2:19, Marek Vasut wrote:
On 5/12/21 4:09 PM, Kunihiko Hayashi wrote:
When
Even if only USB gadget is defined, dwc3 generic driver enables
a definition and probe/remove functions for host driver.
This enables the definition if USB_HOST is enabled only.
Signed-off-by: Kunihiko Hayashi
---
drivers/usb/dwc3/dwc3-generic.c | 3 ++-
1 file changed, 2 insertions(+), 1
557eec01cbf ("env: Fix invalid env handling in env_init()")
Signed-off-by: Kunihiko Hayashi
---
env/env.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/env/env.c b/env/env.c
index e534008..3233172 100644
--- a/env/env.c
+++ b/env/env.c
@@ -336,7 +336,8 @@
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