three bugs to be identified and resolved:
- on the DA850, UART2's clock may come from ASYNC3, unlike the DA830;
- the DA830 doesn't have a DDR2/mDDR PHY, or a PLL controller for it;
- the DSP speed reported by bdinfo was not being initialised on the DA8xx
family.
Laurence Withers (4
On the DA830, UART2's clock is derived from PLL controller 0 output 2.
On the DA850, it is in the ASYNC3 group, and may be switched between PLL
controller 0 or 1. Fix the definition of the ID to match.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Tom Rini tr...@ti.com
Cc: Prabhakar Lad
Tidy up the clock IDs defined for the DA8xx SOCs. With this new structure in
place, it is clear how to define new clock IDs, and how these map to the
numbers presented in the technical reference manual.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Tom Rini tr...@ti.com
Cc: Prabhakar
Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
definition. In addition, don't request this clock ID on DA830 hardware,
which does not have a DDR2/mDDR PHY (or associated PLL controller).
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Tom Rini tr...@ti.com
Cc
to
understand the flow of the two separate functions.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Tom Rini tr...@ti.com
Cc: Hadli, Manjunath manjunath.ha...@ti.com
Cc: Heiko Schocher h...@denx.de
---
Changes in v2:
- Re-ordered patch series to tidy up clock IDs before tidying up users
Tidy up the clock IDs defined for the DA8xx SOCs. With this new structure in
place, it is clear how to define new clock IDs, and how these map to the
numbers presented in the technical reference manual.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Prabhakar Lad prabhakar.cse
Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
definition. In addition, don't request this clock ID on DA830 hardware,
which does not have a DDR2/mDDR PHY (or associated PLL controller).
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Prabhakar Lad prabhakar.cse
On the DA830, UART2's clock is derived from PLL controller 0 output 2.
On the DA850, it is in the ASYNC3 group, and may be switched between PLL
controller 0 or 1. Fix the definition of the ID to match.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Prabhakar Lad prabhakar.cse
suggested. It made sense that this would be a separate set
of patches:
http://lists.denx.de/pipermail/u-boot/2012-July/129444.html
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software
On Mon, Jul 30, 2012 at 04:30:15PM +, Laurence Withers wrote:
Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
definition. In addition, don't request this clock ID on DA830 hardware,
which does not have a DDR2/mDDR PHY (or associated PLL controller).
Signed-off
to
understand the flow of the two separate functions.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Tom Rini tr...@ti.com
Cc: Hadli, Manjunath manjunath.ha...@ti.com
Cc: Heiko Schocher h...@denx.de
---
arch/arm/cpu/arm926ejs/davinci/cpu.c | 21 +
1 files changed, 13
Use the standard CMD_RET_* constants to clearly report errors from the
pca953x command. In addition, print error messages when I2C communication
fails.
Signed-off-by: Laurence Withers lwith...@guralp.com
---
drivers/gpio/pca953x.c | 49 ++-
1 files
Signed-off-by: Laurence Withers lwith...@guralp.com
---
drivers/gpio/pca953x.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
index 359fdee..64c7797 100644
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
, a program to talk to
the boot ROM over the UART and download some code that the boot ROM can burn
into SPI flash).
What is the advantage in allowing the SPL to flash U-Boot also?
Many thanks, and bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel
) \
static void fn(int)
INIT_FUNC(f1);
gcc immediately throws the following error:
t2.c:9: error: conflicting types for ‘f1’
t2.c:1: note: previous definition of ‘f1’ was here
which is pretty clear.
Bye for now,
--
Laurence Withers, lwith...@guralp.com
On Sun, Mar 04, 2012 at 11:58:27AM +, Laurence Withers wrote:
+#define INIT_FUNC(fn, init_name, deps) \
+static int ##fn (void); \
^^
Excuse the macro catenation operator; that shouldn't be there. Hopefully the
example made it clear.
Bye for now,
--
Laurence Withers
a prototype for the function,
so that gcc complains with a useful error message if there's a type mismatch.
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support
ever want to print are
ARM, DSP and DDR. Seems way too specific for such common code.
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: supp...@guralp.com
be:
git checkout local-branch
git fetch remote
git rebase remote/master
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: supp...@guralp.com CMG
-by: Laurence Withers lwith...@guralp.com
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: supp...@guralp.com CMG-DCM CMG-EAM CMG-NAM
joe.hershber...@gmail.com
Cc: Kim Phillips kim.phill...@freescale.com
Tested-by: Laurence Withers lwith...@guralp.com
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General
my board's single PHY.
I note this patch uses some constants introduced by your previous patch that
Mike Frysinger has NAKed, so I guess it will require some rework once you
have addressed his comments.
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com
On Mon, Sep 26, 2011 at 04:02:30PM +, Laurence Withers wrote:
In nand_davinci_readecc(), select the correct NANDFnECC register based
on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC.
This allows 1-bit hardware ECC to work with chip select other than CS2.
Note this now
, so that DA8xx boards (and
presumably other DaVinci processors) can run with Ethernet and cache enabled.
There have been a few proposals floating around to do this, but I'm not sure
whether they've stalled or are continuing quietly along.
Bye for now,
--
Laurence Withers, lwith...@guralp.com
the patch series
altogether, leaving the caches explicitly disabled, until such a time as the
EMAC driver is fixed (I guess we are mainly waiting to see if anyone wants to
tackle cache ops for the ARM926EJS) and the code has been verified with
caches enabled?
Bye for now,
--
Laurence Withers
? If the latter, it might be better to change the patch subject.
Otherwise it flags these patches as being relevant to anyone using the DA850
processor, which actually isn't the case from a quick read.
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel
the registers.
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: supp...@guralp.com CMG-DCM CMG-EAM CMG-NAM
On Wed, Oct 05, 2011 at 03:08:24PM +0200, Stefano Babic wrote:
Drop direct access to SOC's registers and use
the function of the GPIO driver for da8xx.
Dear Stefano,
The da8xx GPIO driver also configures the pinmux for you.
Bye for now,
--
Laurence Withers, lwith...@guralp.com
-...) will be a null pointer dereference.
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: supp...@guralp.com CMG-DCM CMG-EAM CMG-NAM
as if I reboot from Linux with
the PHY forced to 10BASE-T then U-Boot is no longer able to get the link up.
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries
, as it would seem wasteful
to allocate memory for 31 phy_t structures when I doubt there are any boards
that could truly take advantage of that).
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software
and
disabled etc.) with no problems at all. If you like, please feel free to add:
Tested-by: Laurence Withers lwith...@guralp.com
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: supp...@guralp.com CMG-DCM CMG-EAM CMG-NAM
___
U-Boot mailing
The generated file asm-offsets.s may be found at various depths in the
arch subdirectories, so simply ignore it throughout the tree.
Signed-off-by: Laurence Withers lwith...@guralp.com
---
.gitignore |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/.gitignore b
On Wed, Sep 28, 2011 at 12:58:45PM +0400, Sergei Shtylyov wrote:
You need to sign off your patch. Add this line to the changelog:
Signed-off-by: Laurence Withers lwith...@guralp.com
Thanks, I have reposted v2. Please ignore the posting with the unaltered
subject line; I only realised after
with
ECC intact) would always fail. With this fix, the ECC is written and
verified correctly.
Signed-off-by: Laurence Withers lwith...@guralp.com
---
Changes for v2:
Add Signed-off-by to commit message.
---
drivers/mtd/nand/davinci_nand.c | 26 +-
1 files changed, 13
with
ECC intact) would always fail. With this fix, the ECC is written and
verified correctly.
Signed-off-by: Laurence Withers lwith...@guralp.com
---
Changes for v2:
Add Signed-off-by to commit message.
---
drivers/mtd/nand/davinci_nand.c | 26 +-
1 files changed, 13
-specific peripherals */ .
This was added in commit 732590b3.
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: supp...@guralp.com CMG-DCM CMG-EAM CMG
added to commit but untracked files present (use git add to track)
We could ignore all files named asm-offsets.s , or perhaps all files under
arch ?
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643
In nand_davinci_readecc(), select the correct NANDFnECC register based
on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC.
This allows 1-bit hardware ECC to work with chip select other than CS2.
Note this now matches the usage in nand_davinci_enable_hwecc(), which
already had
. I
have seen some patches start to flow that make changes in drivers to work
correctly with caches enabled, such as
http://lists.denx.de/pipermail/u-boot/2011-August/098484.html .
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197
set.
Many thanks, and bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: supp...@guralp.com CMG-DCM CMG-EAM CMG-NAM
This adds a generic GPIO driver fulfilling the asm/gpio.h interface for the
TI DaVinci DA8xx CPU.
Laurence Withers (2):
DaVinci: rename gpio_defs.h to gpio.h
DA8xx: add generic GPIO driver
.../asm/arch-davinci/{gpio_defs.h = gpio.h} |8 +
board/davinci/dm355leopard/dm355leopard.c
to set the pin function to GPIO.
Signed-off-by: Laurence Withers lwith...@guralp.com
---
Changes for v2:
- None.
---
arch/arm/include/asm/arch-davinci/gpio.h |8 +
drivers/gpio/Makefile|1 +
drivers/gpio/da8xx_gpio.c| 281 ++
3
In preparation for a generic GPIO driver for the DA8xx processors,
rename asm/arch/gpio_defs.h to asm/arch/gpio.h and fix up all files
which include it.
Signed-off-by: Laurence Withers lwith...@guralp.com
---
Changes for v2:
- Use git format-patch -C to properly denote rename.
---
.../asm/arch
There are two main sets of LPSC constants, depending on the processor
family. The DA8xx constants were given in an enum whereas the non-DA8xx
constants were preprocessor defines. This commit switches the DA8xx
constants to defines for consistency.
Signed-off-by: Laurence Withers lwith
Signed-off-by: Laurence Withers lwith...@guralp.com
---
arch/arm/include/asm/arch-davinci/hardware.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index df3f549..d5d4211 100644
CONFIG_DRIVER_TI_EMAC
is enabled.
Signed-off-by: Laurence Withers lwith...@guralp.com
---
arch/arm/include/asm/arch-davinci/davinci_misc.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/davinci_misc.h
b/arch/arm/include/asm/arch-davinci
Some of the LPSC constants were incorrect, and some were missing. This
commit fixes the incorrect constants (which were not used anywhere in
the tree) and adds all constants for both DA830 and DA850, as per the
TI datasheets.
Signed-off-by: Laurence Withers lwith...@guralp.com
---
arch/arm
Some general cleanup patches for the DaVinci/DA8xx CPUs made in preparation
for porting to a new board based on the DA850.
This is an unchanged repost from my original, with DaVinci/DA8xx board
maintainers CCed.
Laurence Withers (4):
DaVinci EMAC: declare function for all DA8xx CPUs
DA8xx
On Sat, Jul 16, 2011 at 11:06:50AM +0200, Albert ARIBAUD wrote:
Maybe as it touches at least indirectly DA8x boards you could CC: the
board maintainers?
Hi Albert,
Thanks for the pointer, I have reposted with CCs in place.
Bye for now,
--
Laurence Withers, lwith...@guralp.com
On Sat, Jul 16, 2011 at 11:11:15AM +0200, Albert ARIBAUD wrote:
This is a rename, so use 'git mv...' and 'git format-patch -C' to let
git and readers know it is.
Hi Albert,
Thanks for the tip. I reposted a v2 with this.
Bye for now,
--
Laurence Withers, lwith...@guralp.com
any side effects
that cause problems for me.
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: supp...@guralp.com CMG-DCM CMG-EAM CMG-NAM
for the name
overflowing but BUG_ON() is IMO clearer so I switched to using it instead. I
kept strncpy() in v3, rather than just strcpy(), because it makes the code
robust against future edits. Thanks for the feedback.
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp
In miiphy_register() the new device's name was initialised by passing a
string parameter as the format string to sprintf(). As this would cause
problems if it ever contained a '%' symbol, switch to using strncpy()
instead.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Andy Fleming aflem
On Fri, Jul 15, 2011 at 09:21:45AM +, Laurence Withers wrote:
In miiphy_register() the new device's name was initialised by passing a
string parameter as the format string to sprintf(). As this would cause
problems if it ever contained a '%' symbol, switch to using strncpy()
instead.
My
In miiphy_register() the new device's name was initialised by passing a
string parameter as the format string to sprintf(). As this would cause
problems if it ever contained a '%' symbol, switch to using strncpy()
instead.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Andy Fleming aflem
Some general cleanup patches for the DaVinci/DA8xx CPUs made in preparation
for porting to a new board based on the DA850.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Some of the LPSC constants were incorrect, and some were missing. This
commit fixes the incorrect constants (which were not used anywhere in
the tree) and adds all constants for both DA830 and DA850, as per the
TI datasheets.
Signed-off-by: Laurence Withers lwith...@guralp.com
---
arch/arm
CONFIG_DRIVER_TI_EMAC
is enabled.
Signed-off-by: Laurence Withers lwith...@guralp.com
---
arch/arm/include/asm/arch-davinci/davinci_misc.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/davinci_misc.h
b/arch/arm/include/asm/arch-davinci
There are two main sets of LPSC constants, depending on the processor
family. The DA8xx constants were given in an enum whereas the non-DA8xx
constants were preprocessor defines. This commit switches the DA8xx
constants to defines for consistency.
Signed-off-by: Laurence Withers lwith
Signed-off-by: Laurence Withers lwith...@guralp.com
---
arch/arm/include/asm/arch-davinci/hardware.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index df3f549..d5d4211 100644
This adds a generic GPIO driver fulfilling the asm/gpio.h interface for the
TI DaVinci DA8xx CPU.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
In preparation for a generic GPIO driver for the DA8xx processors,
rename asm/arch/gpio_defs.h to asm/arch/gpio.h and fix up all files
which include it.
Signed-off-by: Laurence Withers lwith...@guralp.com
---
arch/arm/include/asm/arch-davinci/gpio.h | 66 +
arch
to set the pin function to GPIO.
Signed-off-by: Laurence Withers lwith...@guralp.com
---
arch/arm/include/asm/arch-davinci/gpio.h |8 +
drivers/gpio/Makefile|1 +
drivers/gpio/da8xx_gpio.c| 281 ++
3 files changed, 290 insertions
In miiphy_register() the new device's name was initialised by passing a
string parameter as the format string to sprintf(). As this would cause
problems if it ever contained a '%' symbol, switch to using strcpy()
instead.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Andy Fleming aflem
In miiphy_register() the new device's name was initialised by passing a
string parameter as the format string to sprintf(). As this would cause
problems if it ever contained a '%' symbol, switch to using strncpy()
instead.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Andy Fleming aflem
to this mail I've attached my first attempt at a patch for u-boot,
which addresses this issue.
Any feedback (esp. wrt formatting and use of the git tools etc.) is gratefully
received.
Laurence Withers (1):
DA8xx: fix LPSC numbering
arch/arm/include/asm/arch-davinci/hardware.h | 29
The DA8xx chips have two modules PSC0 and PSC1 for the local power and sleep
controllers (LPSC). Each LPSC has up to 32 submodules over which it has control,
which are enumerated by the DAVINCI_LPSC_* symbols.
This commit fixes the definitions of a number of symbols to be consistent with
both the
changes.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Sandeep Paulraj s-paul...@ti.com
---
Changes for v2:
- Fixed formatting of commit message.
---
arch/arm/include/asm/arch-davinci/hardware.h | 29 +-
1 files changed, 19 insertions(+), 10 deletions(-)
diff
in the code. I
also verified that a ./MAKEALL -s davinci gave the same results before
and after.
Many thanks for the feedback, and bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
a little inconsistent to me, but I'm happy to do it if preferred.
Or, I can do what I have done, and change only the DA8xx names.
Which is the preferred option? Or something else entirely?
Many thanks, and bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com
this a go, but I am unable to physically test the results
on any of the Davinci family except the DA850.
Bye for now,
--
Laurence Withers, lwith...@guralp.comhttp://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries
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