Dear Marek Vasut,
On Wed, 2013-05-22 at 15:04 +0200, Marek Vasut wrote:
> > Concerning the patch in question, is it possible to allow cache for ram
> > on PXA270 somehow before we have a final solution?
>
> I dont mind discussing this further and even using DCache for stack in
> board_init_f(),
Dear Marek Vasut,
On Tue, 2013-05-21 at 23:38 +0200, Marek Vasut wrote:
> > Do you mean there is no space left inside that 1K for
> > lock_cache_for_stack()?
>
> How would you do that ? You need MMU enabled to lock lines IIRC.
I see I don't know enough to continue the discussion, yet.
Concernin
Dear Marek Vasut,
On Tue, 2013-05-21 at 22:07 +0200, Marek Vasut wrote:
> The OneNAND has 1kbyte limit on code it will directly address when booting
> from
> it, you can't even make generate the MMU table there.
Do you mean there is no space left inside that 1K for
lock_cache_for_stack()?
> >
Dear Marek Vasut,
On Tue, 2013-05-21 at 21:58 +0200, Marek Vasut wrote:
> OK, applied. Thanks
Thanks for your time, too.
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PXA270 CPU has turbo mode. The mode is 2.5 times faster than the
default run mode. Activating the mode early significantly speeds
up boot process.
Signed-off-by: Sergey Yanovich
---
Changes for v3:
- make the change unconditional
Changes for v2:
- activate turbo mode and fast bus by
Dear Marek Vasut,
On Tue, 2013-05-21 at 21:25 +0200, wrote:
> So why not just make this patch into
>
> -(2)
> +(0xb)
>
> instead of adding new (and undocumented ...) macro?
Point taken. Looks like I am too careful in this case.
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Dear Marek Vasut,
On Tue, 2013-05-21 at 21:24 +0200, Marek Vasut wrote:
> I'd love to have a uniform way to do this cache thing, really ...
Requoting the spec 'The PXA27x processor cache configuration is
identical to that of the PXA255 processor'. It looks safe to configure
all PXA2XX chipsets th
Dear Marek Vasut,
On Tue, 2013-05-21 at 21:02 +0200, Marek Vasut wrote:
> > The whole 256 kB of SRAM could be used for persistent storage with the
> > patch. Without it, part of SRAM should be dedicated for U-Boot stack or
> > be overwritten on boot.
>
> This won't hold on any PXA that uses SPL,
On Tue, 2013-05-21 at 17:00 +0200, Marek Vasut wrote:
> > Yes, the patch as it is will only affects relocation speed and preserve
> > SRAM from corruption.
>
> Now this is the right (convincing) argument! What kind of corruption ? When
> does
> it occur ?
The whole 256 kB of SRAM could be used
On Tue, 2013-05-21 at 13:22 +0200, Marek Vasut wrote:
> > Actually, I wonder if Linux's cpufreq still does depend on bootloader speed
> > settings. Especially the turbo bit. Can you please check that? It'd be
> > interesting to know ...
> >
> > I'd say enable it by default ... I probably have all
Dear Marek Vasut,
On Tue, 2013-05-21 at 13:38 +0200, Marek Vasut wrote:
> Yes, it's just an in-CPU RAM.
Well, it is not 'just' RAM. It preserves its state during deep sleep and
power off modes.
> > Anyway, SRAM preserves its state when power is off. Poweroff time could
> > be in years with a bac
PXA270 CPU has turbo mode. The mode is 2.5 times faster than the
default run mode. Activating the mode early significantly speeds
up boot process.
Signed-off-by: Sergey Yanovich
---
Changes for v2:
- activate turbo mode and fast bus by default
---
arch/arm/cpu/pxa/pxa2xx.c |7
Dear Marek Vasut,
On Tue, 2013-05-21 at 12:54 +0200, Marek Vasut wrote:
> SRAM is just the in-CPU bit of fast RAM. What do you mean by "battery-backup"
> ?
Yes, you are right. It is 'for high speed code or data storage preserved
during low-power states' using a quote from PXA270 EMTS (top of pag
Dear Marek Vasut,
On Tue, 2013-05-21 at 12:55 +0200, Marek Vasut wrote:
> > Difference -- approx. 2.5 times faster system.
> >
> > Who uses it -- ex. LP-8x4x board, support for which I am trying to merge
> > in a separate patch. Any PXA27X board can use it.
>
> Why don't you enable it globally t
Dear Marek Vasut,
On Tue, 2013-05-21 at 12:35 +0200, Marek Vasut wrote:
> > PXA270 CPU has turbo mode. The mode is 2.5 times faster than the
> > default run mode. Activating the mode early significantly speeds
> > up boot process.
> What's the difference? Where does this macro get used ?
Differe
Dear Marek Vasut,
On Tue, 2013-05-21 at 12:39 +0200, Marek Vasut wrote:
> > 2.2.5.2 of Marvell PXA27x Processor Family Developers Manual says:
> > "The PXA27x processor cache configuration is identical to that of
> > the PXA255 processor."
> >
> > As a result, it is perfectly legitimate to use PX
2.2.5.2 of Marvell PXA27x Processor Family Developers Manual says:
"The PXA27x processor cache configuration is identical to that of
the PXA255 processor."
As a result, it is perfectly legitimate to use PXA25X
'lock_cache_for_stack' on PXA27X as well.
Signed-off-by: Sergey
PXA270 CPU has turbo mode. The mode is 2.5 times faster than the
default run mode. Activating the mode early significantly speeds
up boot process.
Signed-off-by: Sergey Yanovich
---
arch/arm/cpu/pxa/pxa2xx.c |7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm
-by: Sergey Yanovich
Series-to: u-boot
Series-cc: marex
---
Changes for v2:
- use get_ram_size(...) to init ram size
- fix defines
- fix formatting
- fix board GPIO settings
- initialize eth1 MAC for kernel
- use proper CONFIG_MACH_TYPE to init r1 in kernel call
- use proper
On Mon, 2013-05-06 at 17:14 +0200, Wolfgang Denk wrote:
> I have no idea what you are talking about. As far as I can tell, your
> patch was acknowledged within minutes, and made it to the mailing list
> and into the archives. Tomini replied to it, and now we are waiting
> for you to incorporate t
: Sergey Yanovich
---
arch/arm/include/asm/mach-types.h | 13 ++
board/icpdas/lp8x4x/Makefile | 41 ++
board/icpdas/lp8x4x/lp8x4x.c | 133 ++
boards.cfg|1 +
include/configs/lp8x4x.h | 272
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