On 05/31/2016 04:50 PM, Piotr Dymacz wrote:
Hello,
2016-05-31 2:51 GMT+02:00 Marek Vasut <ma...@denx.de>:
On 05/31/2016 02:35 AM, Wills Wang wrote:
[snip]
+static int usb_reset_qca953x(void __iomem *reset_regs)
+{
+void __iomem *pregs = map_physmem(AR71XX_PLL_BASE, AR71XX_PL
On 05/30/2016 11:18 PM, Marek Vasut wrote:
On 05/30/2016 04:54 PM, Wills Wang wrote:
Add code to ungate USB and ethernet controller on qca953x
Is this code coming from mainline Linux ?
No, i refer to u-boot code from QSDK.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arc
This patch reset the ethernet controller for ap143 board
Signed-off-by: Wills Wang <wills.w...@live.com>
---
board/qca/ap143/ap143.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/qca/ap143/ap143.c b/board/qca/ap143/ap143.c
index 1572472..e921ea5 100644
--- a/board/qca/ap143
Change bootm flash address and mtd partition table for 8MB flash profile.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
include/configs/ap121.h | 4 ++--
include/configs/ap143.h | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/configs/ap121.h b/i
Add code to ungate USB and ethernet controller on qca953x
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/reset.c | 50
1 file changed, 50 insertions(+)
diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach
Add AR933X_PLL_SWITCH_CLOCK_CONTROL_REG define for ar933x chip.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 +
arch/mips/mach-ath79/reset.c| 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git
This patch enable network function for ap121 board.
Signed-off-by: Wills Wang <wills.w...@live.com>
Acked-by: Marek Vasut <ma...@denx.de>
---
arch/mips/dts/ap121.dts | 5 +
arch/mips/dts/ar933x.dtsi | 4 ++--
board/qca/ap121/ap121.c | 2 ++
configs/ap121_defconfig | 9
Add a platform prefix for function name in order to make more readable,
and move it into ath79.h
Signed-off-by: Wills Wang <wills.w...@live.com>
Acked-by: Marek Vasut <ma...@denx.de>
---
arch/mips/mach-ath79/ar933x/clk.c | 4 ++--
arch/mips/mach-ath79/ar933x/ddr.c
On 05/22/2016 07:13 PM, Marek Vasut wrote:
On 05/22/2016 05:59 AM, Wills Wang wrote:
Use function "ddr_init" for ath79 platform DDR initialization,
and put it into mach/ddr.h
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/ar933x/ddr.c |
On 05/22/2016 07:08 PM, Marek Vasut wrote:
On 05/22/2016 05:59 AM, Wills Wang wrote:
Collect all reset operation on platform and move them into a uniform header
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/include/mach/ath79.h | 3 ---
arch/mips/mach
On 05/22/2016 07:15 PM, Marek Vasut wrote:
On 05/22/2016 05:59 AM, Wills Wang wrote:
GCC 5.3 report a warning: 'upper' and 'lower' may be used
uninitialized in this function [-Wmaybe-uninitialized].
Compiler might need explicit initializer.
Signed-off-by: Wills Wang <wills.w...@live.
On 05/22/2016 07:05 PM, Marek Vasut wrote:
On 05/22/2016 05:59 AM, Wills Wang wrote:
We need reset the Ethernet Switch analog part before operation,
or the build-in Ethernet PHY don't work.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
So what changed in V2 here ?
I change
This patch enable network function for ap121 board, it's based on
the coming ethernet driver ag7xxx.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/dts/ap121.dts | 5 +
arch/mips/dts/ar933x.dtsi | 4 ++--
board/qca/ap121/ap121.c | 2 ++
configs/ap121_defconfig
Add a platform prefix for function name in order to make more readable
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/ar933x/clk.c | 2 +-
arch/mips/mach-ath79/ar933x/ddr.c | 2 +-
arch/mips/mach-ath79/ar934x/clk.c | 4 ++--
arch/mips/mach
Use function "pll_init" for ath79 platform PLL initialization,
and put it into mach/clk.h
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/ar934x/clk.c | 2 +-
arch/mips/mach-ath79/include/mach/ath79.h | 2 --
arch/mips/mach-ath79/include/m
Use function "ddr_init" for ath79 platform DDR initialization,
and put it into mach/ddr.h
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/ar933x/ddr.c | 2 +-
arch/mips/mach-ath79/ar934x/ddr.c | 2 +-
arch/mips/mach-ath79/include/mach/ath
We need reset the Ethernet Switch analog part before operation,
or the build-in Ethernet PHY don't work.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 +
arch/mips/mach-ath79/reset.c| 3 ++-
2 files chan
GCC 5.3 report a warning: 'upper' and 'lower' may be used
uninitialized in this function [-Wmaybe-uninitialized].
Compiler might need explicit initializer.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/ar933x/ddr.c | 2 ++
1 file changed, 2 insertions(+)
diff
Collect all reset operation on platform and move them into a uniform header
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/include/mach/ath79.h | 3 ---
arch/mips/mach-ath79/include/mach/reset.h | 2 ++
board/tplink/wdr4300/wdr4300.c| 1 +
3 files c
On 05/22/2016 12:43 AM, Daniel Schwierzeck wrote:
2016-05-21 13:58 GMT+02:00 Wills Wang <wills.w...@live.com>:
We need reset the Ethernet Switch analog part before operation,
or the build-in Ethernet PHY don't work, openwrt kernel driver
ag71xx occur the following error:
[1.
On 05/22/2016 12:47 AM, Marek Vasut wrote:
On 05/21/2016 06:29 PM, Wills Wang wrote:
On 05/07/2016 02:10 AM, Marek Vasut wrote:
[...]
diff --git a/board/tplink/wdr4300/wdr4300.c
b/board/tplink/wdr4300/wdr4300.c
new file mode 100644
index 000..6e070fd
--- /dev/null
+++ b/board/tplink
On 05/22/2016 12:49 AM, Marek Vasut wrote:
On 05/21/2016 06:22 PM, Wills Wang wrote:
On 05/07/2016 02:10 AM, Marek Vasut wrote:
[...]
+
+static void ar934x_srif_pll_cfg(void __iomem *pll_reg_base, const u32
srif_val)
+{
+u32 reg;
+do {
+writel(0x10810f00, pll_reg_base + 0x4
On 05/07/2016 02:10 AM, Marek Vasut wrote:
[...]
diff --git a/board/tplink/wdr4300/wdr4300.c b/board/tplink/wdr4300/wdr4300.c
new file mode 100644
index 000..6e070fd
--- /dev/null
+++ b/board/tplink/wdr4300/wdr4300.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2016 Marek Vasut
+
On 05/07/2016 02:10 AM, Marek Vasut wrote:
[...]
+
+static void ar934x_srif_pll_cfg(void __iomem *pll_reg_base, const u32 srif_val)
+{
+ u32 reg;
+ do {
+ writel(0x10810f00, pll_reg_base + 0x4);
+ writel(srif_val, pll_reg_base + 0x0);
+
gcc 5.3 report a warning: 'upper' and 'lower' may be used
uninitialized in this function [-Wmaybe-uninitialized].
compiler might need explicit initializer.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/ar933x/ddr.c | 2 ++
1 file changed, 2 insertions(+)
diff
: no PHY found with phy_mask=0010
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 +
arch/mips/mach-ath79/reset.c| 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/mips/mach-ath79/includ
On 05/21/2016 01:08 AM, Marek Vasut wrote:
On 05/20/2016 06:43 PM, Wills Wang wrote:
On 05/20/2016 07:59 PM, Marek Vasut wrote:
On 05/20/2016 06:18 AM, Wills Wang wrote:
On 05/08/2016 11:22 PM, Marek Vasut wrote:
On 05/08/2016 02:58 PM, Daniel Schwierzeck wrote:
Hi!
Am 05.05.2016 um 21
On 05/21/2016 01:08 AM, Marek Vasut wrote:
On 05/20/2016 06:43 PM, Wills Wang wrote:
On 05/20/2016 07:59 PM, Marek Vasut wrote:
On 05/20/2016 06:18 AM, Wills Wang wrote:
On 05/08/2016 11:22 PM, Marek Vasut wrote:
On 05/08/2016 02:58 PM, Daniel Schwierzeck wrote:
Hi!
Am 05.05.2016 um 21
On 05/20/2016 07:59 PM, Marek Vasut wrote:
On 05/20/2016 06:18 AM, Wills Wang wrote:
On 05/08/2016 11:22 PM, Marek Vasut wrote:
On 05/08/2016 02:58 PM, Daniel Schwierzeck wrote:
Hi!
Am 05.05.2016 um 21:34 schrieb Marek Vasut:
Add ethernet driver for the AR933x and AR934x Atheros MIPS
On 05/08/2016 11:22 PM, Marek Vasut wrote:
On 05/08/2016 02:58 PM, Daniel Schwierzeck wrote:
Hi!
Am 05.05.2016 um 21:34 schrieb Marek Vasut:
Add ethernet driver for the AR933x and AR934x Atheros MIPS machines.
The driver could be easily extended to other WiSoCs.
How to make this patch
13:19 schrieb Daniel Schwierzeck:
Am 12.04.2016 um 05:09 schrieb Wills Wang:
These series of patch based on top of mips/next, it fix some defects on
the previous patch series "add support for atheros ath79 based SOCs".
Wills Wang (4):
ath79: spi: Remove the explicit pinctrl setting
use 'const' keywork to qualify readonly attribute for lookup-table member
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/cpu.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/mips/mach-ath79/cpu.c b/arch/mips/mach-ath79/cpu.c
These series of patch based on top of mips/next, it fix some defects on
the previous patch series "add support for atheros ath79 based SOCs".
Wills Wang (4):
ath79: spi: Remove the explicit pinctrl setting
ar933x: serial: Remove the explicit pinctrl setting
ath79: ar933x: use
used a uniform BIT macro for register bit-field shift
Signed-off-by: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/ar933x/ddr.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/mips/mach-ath79/ar933x/ddr.c
b/arch/mips/mach-ath79/ar933x
The correct pinctrl is handled automatically so we don't need to do it in
the driver.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
drivers/serial/serial_ar933x.c | 16 ++--
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/drivers/serial/serial_ar933x.c b/d
The correct pinctrl is handled automatically so we don't need to do it in
the driver.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
drivers/spi/ath79_spi.c | 12
1 file changed, 12 deletions(-)
diff --git a/drivers/spi/ath79_spi.c b/drivers/spi/ath79_spi.c
index 0
On Sunday, April 10, 2016 02:34 AM, Simon Glass wrote:
Hi Wills,
On 16 March 2016 at 02:59, Wills Wang <wills.w...@live.com> wrote:
This patch add support for ar933x serial.
Reviewed-by: Thomas Chou <tho...@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwie
On Thursday, March 17, 2016 11:44 AM, Marek Vasut wrote:
On 03/17/2016 04:39 AM, Wills Wang wrote:
On Thursday, March 17, 2016 05:35 AM, Marek Vasut wrote:
On 03/16/2016 09:59 AM, Wills Wang wrote:
This patch add some common code for QCA/Atheros ath79 SOCs such as
DDR tuning, chip reset
On Thursday, March 17, 2016 08:20 PM, Marek Vasut wrote:
On 03/17/2016 05:02 AM, Wills Wang wrote:
On Thursday, March 17, 2016 11:44 AM, Marek Vasut wrote:
On 03/17/2016 04:39 AM, Wills Wang wrote:
On Thursday, March 17, 2016 05:35 AM, Marek Vasut wrote:
On 03/16/2016 09:59 AM, Wills Wang
On Thursday, March 17, 2016 05:39 AM, Marek Vasut wrote:
On 03/16/2016 09:59 AM, Wills Wang wrote:
This patch enable work for qca953x SOC.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v8:
- Fix multi-line comment for qca953x
Changes in v7:
- Use CKSEGxADDR i
On Thursday, March 17, 2016 05:38 AM, Marek Vasut wrote:
On 03/16/2016 09:59 AM, Wills Wang wrote:
This patch enable work for ar933x SOC.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v8:
- Fix multi-line comment for ar933x
Changes in v7:
- Use CKSEGxADDR i
On Thursday, March 17, 2016 05:35 AM, Marek Vasut wrote:
On 03/16/2016 09:59 AM, Wills Wang wrote:
This patch add some common code for QCA/Atheros ath79 SOCs such as
DDR tuning, chip reset and CPU detection.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v8:
This patch add board-level code and base DT for AP121.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v8:
- Move board/ath79/ap121 into board/qca/ap121
- Move SYS_VENDOR into board-level for ap121
Changes in v7:
- Use KSEG1 address for debug port in ap121
Changes
This patch add a compatible spi driver for ath79 series SOC.
Reviewed-by: Thomas Chou <tho...@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v8:
- Remove ath79_spi_write/read
- U
This patch add support for ar933x serial.
Reviewed-by: Thomas Chou <tho...@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v8:
- R
This is a simple pinctrl driver, it just support uart and spi pin-mux now.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/pinctrl/K
This patch enable work for ar933x SOC.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v8:
- Fix multi-line comment for ar933x
Changes in v7:
- Use CKSEGxADDR instead of KSEGxADDR for ar933x
Changes in v6:
- Remove board.c
- Define magic value in ddr.c
Changes in v5:
This patch enable work for qca953x SOC.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v8:
- Fix multi-line comment for qca953x
Changes in v7:
- Use CKSEGxADDR instead of KSEGxADDR for qca953x
Changes in v6:
- Initial support for qca953x
Changes in v5: None
Changes in v4
This is a simple pinctrl driver, it just support uart and spi pin-mux now.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/pinctrl/K
This patch add board-level code and base DT for AP143.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v8:
- Move board/ath79/ap143 into board/qca/ap143
- Move SYS_VENDOR into board-level for ap143
Changes in v7:
- Use KSEG1 address for debug port in ap143
Changes in v6
This patch add some common code for QCA/Atheros ath79 SOCs such as
DDR tuning, chip reset and CPU detection.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v8:
- Use setbits_be32
- Use lookup-table instead of big switch statement for CPU detection
Changes in v7:
- Use setb
ips/include/asm/arch-ath79
- Check SOC type and extract common code into arch/mips/mach-ath79
- Move serial driver code into drivers/serial
- Add a compatible spi driver
- Add a reference board implemention
Wills Wang (9):
mips: add base support for QCA/Atheros ath79 SOCs
mips: ath79: add sup
On Wednesday, January 27, 2016 09:33 AM, Marek Vasut wrote:
On Saturday, January 16, 2016 at 07:13:51 PM, Wills Wang wrote:
Reviewed-by: Thomas Chou <tho...@wytron.com.tw>
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v7:
- Define spi_cs_activate/spi_cs_deactiv
On Thursday, January 28, 2016 10:53 PM, Marek Vasut wrote:
On Thursday, January 28, 2016 at 03:43:58 PM, Wills Wang wrote:
On Thursday, January 28, 2016 09:44 PM, Marek Vasut wrote:
On Thursday, January 28, 2016 at 02:31:11 PM, Wills Wang wrote:
On Thursday, January 28, 2016 07:51 AM, Marek
On Thursday, January 28, 2016 07:51 AM, Marek Vasut wrote:
The assignment const T var; var = value; is illegal, since var is
constant. Drop the const to fix the compiler warning.
Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc
to prevent such failure and potential undefined
behavior.
Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/Kconfig | 2 --
1 file changed, 2 deletions(-)
diff --git a/ar
and ap143 boards.
Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/Kconfig | 6 --
board/ath79/ap121/Kconfig| 6 ++
board/ath79/ap143/Kconfig|
On Thursday, January 28, 2016 09:44 PM, Marek Vasut wrote:
On Thursday, January 28, 2016 at 02:31:11 PM, Wills Wang wrote:
On Thursday, January 28, 2016 07:51 AM, Marek Vasut wrote:
In order to support boards with ath79 from different vendors and
thus located under /board/$VENDOR/ , we need
and ap143 boards.
Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Wills Wang <wills.w...@live.com>
---
arch/mips/mach-ath79/Kconfig | 6 --
board/ath79/ap121/Kconfig| 6 ++
board/ath79/ap143/Kconfig|
On Sunday, January 17, 2016 03:31 AM, Marek Vasut wrote:
On Saturday, January 16, 2016 at 07:13:48 PM, Wills Wang wrote:
This patch enable work for ar933x SOC.
And it adds DDR code and clock code ... which is missing from the commit
message.
These code was split in v5, the commit message
On Sunday, January 17, 2016 03:50 AM, Daniel Schwierzeck wrote:
Am Sonntag, den 17.01.2016, 02:13 +0800 schrieb Wills Wang:
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v7:
- Use KSEG1 address for debug port in ap121
Changes in v6:
- Convert SZ_XXX into hex in a
On Sunday, January 17, 2016 03:33 AM, Marek Vasut wrote:
On Saturday, January 16, 2016 at 07:13:49 PM, Wills Wang wrote:
This patch enable work for qca953x SOC.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v7:
- Use CKSEGxADDR instead of KSEGxADDR for qca953x
C
On Sunday, January 17, 2016 03:37 AM, Daniel Schwierzeck wrote:
Am Sonntag, den 17.01.2016, 02:13 +0800 schrieb Wills Wang:
Reviewed-by: Thomas Chou <tho...@wytron.com.tw>
Signed-off-by: Wills Wang <wills.w...@live.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierz...@g
On Sunday, January 17, 2016 03:19 AM, Marek Vasut wrote:
On Saturday, January 16, 2016 at 07:13:47 PM, Wills Wang wrote:
Commit message is missing.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v7:
- Use setbits_32
- Fix include path for SoC specific headers
Changes
On Saturday, January 23, 2016 11:06 AM, Marek Vasut wrote:
On Saturday, January 23, 2016 at 02:31:31 AM, Wills Wang wrote:
On Friday, January 22, 2016 10:44 PM, Marek Vasut wrote:
On Friday, January 22, 2016 at 10:02:18 AM, Wills Wang wrote:
On Sunday, January 17, 2016 03:19 AM, Marek Vasut
On Friday, January 22, 2016 10:44 PM, Marek Vasut wrote:
On Friday, January 22, 2016 at 10:02:18 AM, Wills Wang wrote:
On Sunday, January 17, 2016 03:19 AM, Marek Vasut wrote:
On Saturday, January 16, 2016 at 07:13:47 PM, Wills Wang wrote:
Commit message is missing.
Signed-off-by: Wills
On Thursday, January 21, 2016 01:35 PM, Marek Vasut wrote:
On Thursday, January 21, 2016 at 03:58:44 AM, Wills Wang wrote:
On Thursday, January 21, 2016 09:32 AM, Marek Vasut wrote:
On Sunday, January 17, 2016 at 01:21:29 PM, Wills Wang wrote:
On 01/17/2016 06:24 PM, Daniel Schwierzeck
On Thursday, January 21, 2016 09:32 AM, Marek Vasut wrote:
On Sunday, January 17, 2016 at 01:21:29 PM, Wills Wang wrote:
On 01/17/2016 06:24 PM, Daniel Schwierzeck wrote:
2016-01-17 6:49 GMT+01:00 Wills Wang <wills.w...@live.com>:
On 01/17/2016 03:05 AM, Marek Vasut wrote:
On Sa
On Thursday, January 21, 2016 09:32 AM, Marek Vasut wrote:
On Sunday, January 17, 2016 at 01:21:29 PM, Wills Wang wrote:
On 01/17/2016 06:24 PM, Daniel Schwierzeck wrote:
2016-01-17 6:49 GMT+01:00 Wills Wang <wills.w...@live.com>:
On 01/17/2016 03:05 AM, Marek Vasut wrote:
On Sa
On 01/17/2016 06:24 PM, Daniel Schwierzeck wrote:
2016-01-17 6:49 GMT+01:00 Wills Wang <wills.w...@live.com>:
On 01/17/2016 03:05 AM, Marek Vasut wrote:
On Saturday, January 16, 2016 at 07:13:46 PM, Wills Wang wrote:
These series of patch add support for atheros ath79 based SOCs in
On Saturday, January 16, 2016 01:26 PM, Marek Vasut wrote:
On Monday, January 04, 2016 at 12:06:17 PM, Wills Wang wrote:
These series of patch add support for atheros ath79 based SOCs in u-boot,
at the present moment it's just available for ar933x and qca953x chip.
Changes in v6:
- Remove
On 01/17/2016 03:05 AM, Marek Vasut wrote:
On Saturday, January 16, 2016 at 07:13:46 PM, Wills Wang wrote:
These series of patch add support for atheros ath79 based SOCs in u-boot,
at the present moment it's just available for ar933x and qca953x chip.
This patch serises is based
On Saturday, January 09, 2016 10:30 PM, Daniel Schwierzeck wrote:
Am Samstag, den 09.01.2016, 18:46 +0800 schrieb Wills Wang:
On 01/09/2016 12:23 AM, Daniel Schwierzeck wrote:
Am Montag, den 04.01.2016, 19:14 +0800 schrieb Wills Wang:
MIPS archtecture have no "in_le32/in_be32/out
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v7:
- Use KSEG1 address for debug port in ap143
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/mips/dts/Makefile| 1 +
arch/mips/dts/ap143.dts
On Saturday, January 16, 2016 11:33 PM, Marek Vasut wrote:
On Saturday, January 16, 2016 at 02:15:27 PM, Wills Wang wrote:
On Saturday, January 16, 2016 01:26 PM, Marek Vasut wrote:
On Monday, January 04, 2016 at 12:06:17 PM, Wills Wang wrote:
These series of patch add support for atheros
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v7:
- Use setbits_32
- Fix include path for SoC specific headers
Changes in v6:
- Move ar933x as separate patch
- Add get_bootstrap in reset.c
- Use map_physmem instead of KSEG1ADDR
- Add arch_cpu_init for detect SOC type for
This patch enable work for ar933x SOC.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v7:
- Use CKSEGxADDR instead of KSEGxADDR for ar933x
Changes in v6:
- Remove board.c
- Define magic value in ddr.c
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v7:
- Use KSEG1 address for debug port in ap121
Changes in v6:
- Convert SZ_XXX into hex in ap121.h
- Remove useless CONFIG_SYS_INIT_SP_OFFSET in ap121.h
- Add board_early_init_f for DDR and pin initialization
- Select UART a
This patch enable work for qca953x SOC.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v7:
- Use CKSEGxADDR instead of KSEGxADDR for qca953x
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/mips/mach-ath79/K
Reviewed-by: Thomas Chou <tho...@wytron.com.tw>
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v7:
- remove map_physmem for debug port
Changes in v6:
- Remove wait loop in putc and getc
- Use map_physmem instead of KSEG1ADDR
Changes in v5:
- remove ar933x_ser
Reviewed-by: Thomas Chou <tho...@wytron.com.tw>
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v7:
- Define spi_cs_activate/spi_cs_deactivate
- Rename MHZ to ATH79_SPI_MHZ
- Use clrsetbits_32
Changes in v6:
- Add rrw_delay in ath79_spi_priv for more accurate tim
Add a compatible spi driver
- Add a reference board implemention
Wills Wang (7):
mips: add base support for QCA/Atheros ath79 SOCs
mips: ath79: add support for AR933x SOCs
mips: ath79: add support for QCA953x SOCs
mips: ath79: add serial driver for ar933x SOC
mips: ath79: add spi drive
On 01/11/2016 06:55 PM, Purna Chandra Mandal wrote:
On 01/09/2016 10:02 PM, Daniel Schwierzeck wrote:
This patch series updates all MIPS asm header files containing
I/O code as well as processor, register and assembly definitions.
The source of the update are the MIPS asm header files of
On 01/09/2016 12:23 AM, Daniel Schwierzeck wrote:
Am Montag, den 04.01.2016, 19:14 +0800 schrieb Wills Wang:
MIPS archtecture have no "in_le32/in_be32/out_le32/out_be32" macro,
but usually define CONFIG_SYS_BIG_ENDIAN, this patch use readl/writel
for register operation in mips w
On 01/06/2016 08:16 PM, Jagan Teki wrote:
On 4 January 2016 at 16:44, Wills Wang <wills.w...@live.com> wrote:
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v6:
- Add rrw_delay in ath79_spi_priv for more accurate timing
- Remove ath79_spi_delay
- Cal
On 01/05/2016 10:45 AM, Thomas Chou wrote:
Hi Wills,
On 2016年01月04日 19:14, Wills Wang wrote:
U-boot just use the no MMU virtual address segment(KSEG0/1), this
patch enable access the uncached memory range(KSEG1) by flag
"MAP_NOCACHE", other flag for KSEG0 access.
Signed-off-by:
On 01/06/2016 05:18 AM, Daniel Schwierzeck wrote:
2016-01-04 14:07 GMT+01:00 Thomas Chou <tho...@wytron.com.tw>:
Hi Wills,
On 2016年01月04日 19:14, Wills Wang wrote:
MIPS need to use KSEG1 address for register operation, this patch
add map_physmem to convert CONFIG_DEBUG_UART_BASE for
On 01/06/2016 08:25 AM, Simon Glass wrote:
Hi WIlls,
On 24 December 2015 at 04:22, Wills Wang <wills.w...@live.com> wrote:
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v3: None
Changes in v2: None
drivers/serial/Makefile| 1 +
drivers/serial/ser
U-boot just use the no MMU virtual address segment(KSEG0/1), this
patch enable access the uncached memory range(KSEG1) by flag
"MAP_NOCACHE", other flag for KSEG0 access.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v6:
- Remove useless "else"
Changes
C type and extract common code into arch/mips/mach-ath79
- Move serial driver code into drivers/serial
- Add a compatible spi driver
- Add a reference board implemention
Wills Wang (10):
mips: implement to access the KSEG0/1 memory range in map_physmem
mips: add base support for QCA/Atheros ath79 S
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v6:
- Move ar933x as separate patch
- Add get_bootstrap in reset.c
- Use map_physmem instead of KSEG1ADDR
- Add arch_cpu_init for detect SOC type for early
Changes in v5:
- Add independent Kconfig
- Use SRAM for initial stack
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v6:
- Remove wait loop in putc and getc
- Use map_physmem instead of KSEG1ADDR
Changes in v5:
- remove ar933x_serial_platdata
- Import document "qca,ar9330-uart.txt" from kernel
- Add support for debug UART
Chang
This patch enable work for qca953x SOC.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/mips/mach-ath79/Kconfig | 10 +
arch/mips/mach-ath79/Ma
This patch enable work for ar933x SOC.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v6:
- Remove board.c
- Define magic value in ddr.c
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/mips/mach-ath79/Kconfig| 10 +
MIPS need to use KSEG1 address for register operation, this patch
add map_physmem to convert CONFIG_DEBUG_UART_BASE for debug UART.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
d
MIPS archtecture have no "in_le32/in_be32/out_le32/out_be32" macro,
but usually define CONFIG_SYS_BIG_ENDIAN, this patch use readl/writel
for register operation in mips when define CONFIG_SYS_NS16550_MEM32.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v6: No
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/mips/dts/Makefile| 1 +
arch/mips/dts/ap143.dts | 37 +++
arch/mips/dts/qca953x.dtsi
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v6:
- Convert SZ_XXX into hex in ap121.h
- Remove useless CONFIG_SYS_INIT_SP_OFFSET in ap121.h
- Add board_early_init_f for DDR and pin initialization
- Select UART and SPI in ap121_defconfig
Changes in v5:
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes in v6:
- Add rrw_delay in ath79_spi_priv for more accurate timing
- Remove ath79_spi_delay
- Calculate delay in ath79_spi_set_speed
Changes in v5:
- remove ar933x_spi_platdata
- Import document "spi-ath79.txt" from ke
On 01/04/2016 09:07 PM, Thomas Chou wrote:
Hi Wills,
On 2016年01月04日 19:14, Wills Wang wrote:
MIPS need to use KSEG1 address for register operation, this patch
add map_physmem to convert CONFIG_DEBUG_UART_BASE for debug UART.
Signed-off-by: Wills Wang <wills.w...@live.com>
---
Changes
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