-Boot binary will be located on this SRAM at
location 0xBFF4 with entry point as 0xBFFC.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
Signed-off-by: Aneesh Bansal aneesh.ban...@freescale.com
---
Changes in v6:
Changed the version in Patchset.
Are we closed
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, March 10, 2015 10:34 PM
To: Bansal Aneesh-B39320
Cc: u-boot@lists.denx.de; Sun York-R58495; Gupta Ruchika-R66431;
Kushwaha Prabhakar-B32579
Subject: Re: [U-Boot, 1/2, v4] powerpc/mpc85xx: SECURE BOOT- NAND
secure boot
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, March 10, 2015 11:29 PM
To: Bansal Aneesh-B39320
Cc: u-boot@lists.denx.de; Sun York-R58495; Gupta Ruchika-R66431;
Kushwaha Prabhakar-B32579
Subject: Re: [U-Boot, 1/2, v4] powerpc/mpc85xx: SECURE BOOT- NAND
secure boot
-Original Message-
From: Wood Scott-B07421
Sent: Thursday, March 05, 2015 10:38 PM
To: Bansal Aneesh-B39320
Cc: u-boot@lists.denx.de; Sun York-R58495; Gupta Ruchika-R66431
Subject: Re: [U-Boot, 1/2, v4] powerpc/mpc85xx: SECURE BOOT- NAND
secure boot target for P3041
On Thu,
-Original Message-
From: Wood Scott-B07421
Sent: Thursday, March 05, 2015 2:41 AM
To: Bansal Aneesh-B39320
Cc: u-boot@lists.denx.de; Sun York-R58495; Gupta Ruchika-R66431
Subject: Re: [U-Boot, 1/2, v4] powerpc/mpc85xx: SECURE BOOT- NAND
secure boot target for P3041
On Thu,
-Original Message-
From: Wood Scott-B07421
Sent: Thursday, February 26, 2015 3:43 AM
To: Bansal Aneesh-B39320
Cc: u-boot@lists.denx.de; Sun York-R58495; Gupta Ruchika-R66431
Subject: Re: [U-Boot, 1/2, v4] powerpc/mpc85xx: SECURE BOOT- NAND
secure boot target for P3041
[Reposting
-Original Message-
From: Wood Scott-B07421
Sent: Friday, February 27, 2015 10:22 AM
To: Bansal Aneesh-B39320
Cc: u-boot@lists.denx.de; Sun York-R58495; Gupta Ruchika-R66431
Subject: Re: [U-Boot, 1/2, v4] powerpc/mpc85xx: SECURE BOOT- NAND
secure boot target for P3041
On Thu,
-Original Message-
From: Sun York-R58495
Sent: Tuesday, March 11, 2014 5:31 AM
To: Wood Scott-B07421
Cc: Bansal Aneesh-B39320; u-boot@lists.denx.de; Gupta Ruchika-R66431
Subject: Re: [PATCH][v4] powerpc/mpc85xx: SECURE BOOT- Add secure boot
target for B4860QDS
On 03/10/2014 04:55
-off-by: Aneesh Bansal aneesh.ban...@freescale.com
---
README | 4
arch/powerpc/cpu/mpc85xx/cpu_init.c| 27
++-
arch/powerpc/cpu/mpc85xx/start.S | 3 ++-
arch/powerpc/include/asm/fsl_secure_boot.h | 6
-Original Message-
From: Sun York-R58495
Sent: Saturday, March 08, 2014 12:31 AM
To: Bansal Aneesh-B39320
Cc: Wood Scott-B07421; Wolfgang Denk; u-boot@lists.denx.de; Gupta
Ruchika-R66431
Subject: Re: [U-Boot] [PATCH 1/3] powerpc/p1010rdb: SECURE BOOT-
define CONFIG_SYS_RAMBOOT for
-Original Message-
From: Wood Scott-B07421
Sent: Wednesday, March 05, 2014 11:30 PM
To: Bansal Aneesh-B39320
Cc: Sun York-R58495; Wolfgang Denk; u-boot@lists.denx.de; Gupta
Ruchika-R66431
Subject: Re: [U-Boot] [PATCH 1/3] powerpc/p1010rdb: SECURE BOOT-
define CONFIG_SYS_RAMBOOT for
-Original Message-
From: Sun York-R58495
Sent: Tuesday, March 04, 2014 10:42 PM
To: Wolfgang Denk; Bansal Aneesh-B39320
Cc: Wood Scott-B07421; u-boot@lists.denx.de; Gupta Ruchika-R66431
Subject: Re: [U-Boot] [PATCH 1/3] powerpc/p1010rdb: SECURE BOOT-
define CONFIG_SYS_RAMBOOT for
A003399
On Mon, 2014-01-20 at 14:57 +0530, Aneesh Bansal wrote:
The workaround for IFC errata A003399 was not enabled in case of
secure boot. So, secure boot from NOR was not working.
Signed-off-by: Aneesh Bansal aneesh.ban...@freescale.com
---
include/configs
was causing random crashes.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
Signed-off-by: Aneesh Bansal aneesh.ban...@freescale.com
---
README | 4
arch/powerpc/cpu/mpc85xx/cpu_init.c| 27
++-
arch/powerpc
@lists.denx.de; Sun York-R58495
Subject: Re: [U-Boot] [PATCH 1/3] powerpc/p1010rdb: SECURE BOOT- define
CONFIG_SYS_RAMBOOT for NAND boot
Dear aneesh.ban...@freescale.com,
In message
680c371d651d49a08b33ddd4d01fb...@dm2pr03mb415.namprd03.prod.outlook.com
you wrote:
In case of secure boot, boot
-Original Message-
From: Wolfgang Denk [mailto:w...@denx.de]
Sent: Monday, January 27, 2014 7:42 PM
To: Bansal Aneesh-B39320
Cc: u-boot@lists.denx.de; Gupta Ruchika-R66431
Subject: Re: [U-Boot] [PATCH 1/2] SECURE BOOT: add version info for ISBC
Dear Aneesh,
In message
Bansal aneesh.ban...@freescale.com
---
README| 3 +++
arch/powerpc/include/asm/config_mpc85xx.h | 9 +
2 files changed, 12 insertions(+)
diff --git a/README b/README
index aea82be..6c3a8d1 100644
--- a/README
+++ b/README
@@ -423,6 +423,9
CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
Single Source Clock is clocking mode present in some of FSL
SoC's.
In this mode, a single differential clock is used to supply
You already have all relevant information present in the current
configuration.
The workaround for IFC errata A003399 was not enabled
in case of secure boot. So, secure boot from NOR was not
working.
Signed-off-by: Aneesh Bansal aneesh.ban...@freescale.com
---
include/configs/P1010RDB.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/include
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h
b/arch/powerpc/include/asm/fsl_secure_boot.h
index 4c7f0b1..db124df 100644
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -15,5 +15,11 @@
#endif
#define
In case of secure boot, boot from NAND is ramboot.
It was removed by some other commit. So defining it again.
In case of not-secure-boot, it's not ramboot.
What user of CONFIG_SYS_RAMBOOT are you concerned about? Many of them
look like this:
#elif !defined(CONFIG_SYS_RAMBOOT)
ISBC creates a LAW 0 entry for non PBL platforms, which is not
disabled before transferring the control to uboot.
The LAW 0 entry has to be disabled.
Signed-off-by: Aneesh Bansal aneesh.ban...@freescale.com
---
arch/powerpc/cpu/mpc85xx/start.S | 58
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