On Tue, Jan 28, 2020 at 5:39 AM Sean Anderson wrote:
>
> The add instruction on risc-v can have any three sources and targets, so there
> is no need for an intermediate mov.
>
> Signed-off-by: Sean Anderson
> ---
> arch/riscv/cpu/start.S | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(
> From: Sean Anderson [mailto:sean...@gmail.com]
> Sent: Tuesday, January 28, 2020 5:40 AM
> To: U-Boot Mailing List
> Cc: Bin Meng; Lukas Auer; anup.pa...@wdc.com; Rick Jian-Zhi Chen(陳建志)
> Subject: [PATCH] riscv: Remove unnecessary instruction
>
> The add instruction on risc
The add instruction on risc-v can have any three sources and targets, so there
is no need for an intermediate mov.
Signed-off-by: Sean Anderson
---
arch/riscv/cpu/start.S | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
inde
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