On Tue, Jul 16, 2024 at 3:59 AM Leo Liang wrote:
>
> On Thu, Jul 11, 2024 at 12:55:05PM -0700, E Shattow wrote:
> > [EXTERNAL MAIL]
> >
> > Ping. This regression still exists and is now in stable release.
> > Should we revert this change or how must it be fixed?
> >
> > -E
> >
>
> Hi all,
>
> I t
On Thu, Jul 11, 2024 at 12:55:05PM -0700, E Shattow wrote:
> [EXTERNAL MAIL]
>
> Ping. This regression still exists and is now in stable release.
> Should we revert this change or how must it be fixed?
>
> -E
>
Hi all,
I think I could revert this commit for now
if we cannot find the root caus
Ping. This regression still exists and is now in stable release.
Should we revert this change or how must it be fixed?
-E
On Sat, Apr 20, 2024 at 3:56 AM E Shattow wrote:
>
> On Fri, Apr 19, 2024 at 5:51 PM Bo Gan wrote:
> >
> ...snip...
> >
> > If without the change (reverted), can you read/wr
On Fri, Apr 19, 2024 at 5:51 PM Bo Gan wrote:
>
...snip...
>
> If without the change (reverted), can you read/write the same SD media in
> U-boot
> proper? (U-boot proper will switch BUS_ROOT to PLL2).
I tested again this change in commit e6b7aeef, before this change in
parent commit e6b7aeef~,
On 4/16/24 9:59 PM, E Shattow wrote:
On Tue, Apr 9, 2024 at 11:44 PM Bo Gan wrote:
On 4/9/24 6:55 PM, E Shattow wrote:
Original speed class SD cards fail with this change "unable to change mode".
The BUS_ROOT clock will have to be switched to PLL2 anyway in U-Boot proper or
in Linux, becau
On Tue, Apr 9, 2024 at 11:44 PM Bo Gan wrote:
>
> On 4/9/24 6:55 PM, E Shattow wrote:
> > Original speed class SD cards fail with this change "unable to change mode".
> >
>
> The BUS_ROOT clock will have to be switched to PLL2 anyway in U-Boot proper or
> in Linux, because it's the parent or grand
On 4/9/24 6:55 PM, E Shattow wrote:
Original speed class SD cards fail with this change "unable to change mode".
On Tue, Mar 12, 2024 at 4:12 AM Hal Feng wrote:
On 06.03.24 11:00, Bo Gan wrote:
Previously PLL node was missing from SPL dts. This caused BUS_ROOT to stay on
OSC clock (24Mhz).
Original speed class SD cards fail with this change "unable to change mode".
On Tue, Mar 12, 2024 at 4:12 AM Hal Feng wrote:
>
> > On 06.03.24 11:00, Bo Gan wrote:
> >
> > Previously PLL node was missing from SPL dts. This caused BUS_ROOT to stay
> > on
> > OSC clock (24Mhz). As a result, all pe
> On 06.03.24 11:00, Bo Gan wrote:
>
> Previously PLL node was missing from SPL dts. This caused BUS_ROOT to stay on
> OSC clock (24Mhz). As a result, all peripherals have to run at a much lower
> frequency, and loading from sdcard/emmc is slow.
> Thus, enabling PLL node in dts to fix this.
>
> S
On Tue, Mar 05, 2024 at 07:00:11PM -0800, Bo Gan wrote:
> Previously PLL node was missing from SPL dts. This caused BUS_ROOT
> to stay on OSC clock (24Mhz). As a result, all peripherals have to
> run at a much lower frequency, and loading from sdcard/emmc is slow.
> Thus, enabling PLL node in dts t
Previously PLL node was missing from SPL dts. This caused BUS_ROOT
to stay on OSC clock (24Mhz). As a result, all peripherals have to
run at a much lower frequency, and loading from sdcard/emmc is slow.
Thus, enabling PLL node in dts to fix this.
Signed-off-by: Bo Gan
---
arch/riscv/dts/jh7110-u
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