Hi Jerome,
Thanks for your review comments,
On Mon, 3 Feb 2020 at 23:14, Jerome Brunet wrote:
>
>
> On Mon 03 Feb 2020 at 17:38, Anand Moon wrote:
>
> > Hi Jerome,
> >
> > Thanks for your review,
> >
> > On Mon, 3 Feb 2020 at 21:11, Jerome Brunet wrote:
> >>
> >>
> >> On Mon 03 Feb 2020 at
On Mon 03 Feb 2020 at 17:38, Anand Moon wrote:
> Hi Jerome,
>
> Thanks for your review,
>
> On Mon, 3 Feb 2020 at 21:11, Jerome Brunet wrote:
>>
>>
>> On Mon 03 Feb 2020 at 16:13, Anand Moon wrote:
>>
>> > As per mainline line kernel fix the clk tuning phase for mmc,
>> > set Core=180,
Hi Jerome,
Thanks for your review,
On Mon, 3 Feb 2020 at 21:11, Jerome Brunet wrote:
>
>
> On Mon 03 Feb 2020 at 16:13, Anand Moon wrote:
>
> > As per mainline line kernel fix the clk tuning phase for mmc,
> > set Core=180, Tx=180, Rx=0 clk phase for mmc initialization.
> > As per S905, S905X,
On Mon 03 Feb 2020 at 16:13, Anand Moon wrote:
> As per mainline line kernel fix the clk tuning phase for mmc,
> set Core=180, Tx=180, Rx=0 clk phase for mmc initialization.
> As per S905, S905X, AGX and S922X datasheet set the default
> values for clk tuning.
>
> Signed-off-by: Anand Moon
>
As per mainline line kernel fix the clk tuning phase for mmc,
set Core=180, Tx=180, Rx=0 clk phase for mmc initialization.
As per S905, S905X, AGX and S922X datasheet set the default
values for clk tuning.
Signed-off-by: Anand Moon
---
arch/arm/include/asm/arch-meson/sd_emmc.h | 28
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