On 09/12/2017 10:56 AM, Joakim Tjernlund wrote:
> Most FSL PCIe controllers expects 333 MHz PCI reference clock.
> This clock is derived from the CCB but in many cases the ref.
> clock is not 333 MHz and a divisor needs to be configured.
>
> This adds PEX_CCB_DIV #define which can be defined for e
On 08/02/2018 03:38 PM, Joakim Tjernlund wrote:
> York, did this go anywhere?
No, I didn't hear from Mingkai. I am OK with this patch and will merge it.
York
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York, did this go anywhere?
Jocke
On Tue, 2018-02-27 at 19:54 +, York Sun wrote:
>
> On 02/27/2018 11:52 AM, Joakim Tjernlund wrote:
> > On Tue, 2018-02-27 at 19:30 +, York Sun wrote:
> > >
> > > On 11/21/2017 10:20 AM, Joakim Tjernlund wrote:
> > > > On Tue, 2017-11-21 at 18:04 +,
On 02/27/2018 11:52 AM, Joakim Tjernlund wrote:
> On Tue, 2018-02-27 at 19:30 +, York Sun wrote:
>>
>> On 11/21/2017 10:20 AM, Joakim Tjernlund wrote:
>>> On Tue, 2017-11-21 at 18:04 +, York Sun wrote:
On 11/21/2017 09:52 AM, Joakim Tjernlund wrote:
> On Tue, 2017-11-21 a
On Tue, 2018-02-27 at 19:30 +, York Sun wrote:
>
> On 11/21/2017 10:20 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-11-21 at 18:04 +, York Sun wrote:
> > >
> > >
> > > On 11/21/2017 09:52 AM, Joakim Tjernlund wrote:
> > > > On Tue, 2017-11-21 at 17:45 +, York Sun wrote:
> > > > >
>
On 11/21/2017 10:20 AM, Joakim Tjernlund wrote:
> On Tue, 2017-11-21 at 18:04 +, York Sun wrote:
>>
>>
>> On 11/21/2017 09:52 AM, Joakim Tjernlund wrote:
>>> On Tue, 2017-11-21 at 17:45 +, York Sun wrote:
On 11/21/2017 09:41 AM, Joakim Tjernlund wrote:
> On Tue, 2017-11-21 at
On 11/21/2017 10:40 AM, Joakim Tjernlund wrote:
> On Tue, 2017-11-21 at 18:35 +, York Sun wrote:
>> CAUTION: This email originated from outside of the organization. Do not
>> click links or open attachments unless you recognize the sender and know the
>> content is safe.
>>
>>
>> On 11/21/201
On Tue, 2017-11-21 at 18:35 +, York Sun wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On 11/21/2017 10:20 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-1
On 11/21/2017 10:20 AM, Joakim Tjernlund wrote:
> On Tue, 2017-11-21 at 18:04 +, York Sun wrote:
>>
>>
>> On 11/21/2017 09:52 AM, Joakim Tjernlund wrote:
>>> On Tue, 2017-11-21 at 17:45 +, York Sun wrote:
On 11/21/2017 09:41 AM, Joakim Tjernlund wrote:
> On Tue, 2017-11-21 at
On Tue, 2017-11-21 at 18:04 +, York Sun wrote:
>
>
> On 11/21/2017 09:52 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-11-21 at 17:45 +, York Sun wrote:
> > >
> > > On 11/21/2017 09:41 AM, Joakim Tjernlund wrote:
> > > > On Tue, 2017-11-21 at 17:32 +, York Sun wrote:
> > > > > CAUTION
On 11/21/2017 09:52 AM, Joakim Tjernlund wrote:
> On Tue, 2017-11-21 at 17:45 +, York Sun wrote:
>>
>> On 11/21/2017 09:41 AM, Joakim Tjernlund wrote:
>>> On Tue, 2017-11-21 at 17:32 +, York Sun wrote:
CAUTION: This email originated from outside of the organization. Do not
click
On Tue, 2017-11-21 at 17:45 +, York Sun wrote:
>
> On 11/21/2017 09:41 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-11-21 at 17:32 +, York Sun wrote:
> > > CAUTION: This email originated from outside of the organization. Do not
> > > click links or open attachments unless you recognize th
On Tue, 2017-11-21 at 17:32 +, York Sun wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On 11/21/2017 09:29 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-1
On 11/21/2017 09:41 AM, Joakim Tjernlund wrote:
> On Tue, 2017-11-21 at 17:32 +, York Sun wrote:
>> CAUTION: This email originated from outside of the organization. Do not
>> click links or open attachments unless you recognize the sender and know the
>> content is safe.
>>
>>
>> On 11/21/201
On 11/21/2017 09:29 AM, Joakim Tjernlund wrote:
> On Tue, 2017-11-21 at 17:23 +, York Sun wrote:
>> CAUTION: This email originated from outside of the organization. Do not
>> click links or open attachments unless you recognize the sender and know the
>> content is safe.
>>
>>
>> On 11/21/201
On Tue, 2017-11-21 at 17:23 +, York Sun wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On 11/21/2017 09:18 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-0
On 11/21/2017 09:18 AM, Joakim Tjernlund wrote:
> On Tue, 2017-09-12 at 19:56 +0200, Joakim Tjernlund wrote:
>> Most FSL PCIe controllers expects 333 MHz PCI reference clock.
>> This clock is derived from the CCB but in many cases the ref.
>> clock is not 333 MHz and a divisor needs to be configure
On Tue, 2017-09-12 at 19:56 +0200, Joakim Tjernlund wrote:
> Most FSL PCIe controllers expects 333 MHz PCI reference clock.
> This clock is derived from the CCB but in many cases the ref.
> clock is not 333 MHz and a divisor needs to be configured.
>
> This adds PEX_CCB_DIV #define which can be de
> -Original Message-
> From: York Sun
> Sent: Friday, September 15, 2017 5:15 AM
> To: Joakim Tjernlund ; Mingkai Hu
> ; u-boot @ lists . denx . de ;
> Roy Zang
> Subject: Re: [PATCH] FSL PCI: Configure PCIe reference ratio
>
> On 09/12/2017 10:56 AM, Joakim Tjernlund wrote:
> > Most FS
On 09/12/2017 10:56 AM, Joakim Tjernlund wrote:
> Most FSL PCIe controllers expects 333 MHz PCI reference clock.
> This clock is derived from the CCB but in many cases the ref.
> clock is not 333 MHz and a divisor needs to be configured.
>
> This adds PEX_CCB_DIV #define which can be defined for e
Most FSL PCIe controllers expects 333 MHz PCI reference clock.
This clock is derived from the CCB but in many cases the ref.
clock is not 333 MHz and a divisor needs to be configured.
This adds PEX_CCB_DIV #define which can be defined for each
type of CPU/platform.
Signed-off-by: Joakim Tjernlund
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