Re: [U-Boot] [PATCH] config: peach: Correct memory layout environment settings

2015-04-06 Thread Minkyu Kang
On 26/03/15 19:11, Sjoerd Simons wrote: On Wed, 2015-03-25 at 16:49 -0400, Tom Rini wrote: On Wed, Mar 25, 2015 at 08:54:16PM +0100, Sjoerd Simons wrote: On Wed, 2015-03-25 at 12:58 -0400, Tom Rini wrote: On Wed, Mar 25, 2015 at 09:32:45AM +0100, Sjoerd Simons wrote: On Wed, 2015-03-25 at

Re: [U-Boot] [PATCH] config: peach: Correct memory layout environment settings

2015-03-26 Thread Sjoerd Simons
On Wed, 2015-03-25 at 16:49 -0400, Tom Rini wrote: On Wed, Mar 25, 2015 at 08:54:16PM +0100, Sjoerd Simons wrote: On Wed, 2015-03-25 at 12:58 -0400, Tom Rini wrote: On Wed, Mar 25, 2015 at 09:32:45AM +0100, Sjoerd Simons wrote: On Wed, 2015-03-25 at 01:11 -0400, Tom Rini wrote: On

Re: [U-Boot] [PATCH] config: peach: Correct memory layout environment settings

2015-03-25 Thread Sjoerd Simons
On Wed, 2015-03-25 at 01:11 -0400, Tom Rini wrote: On Mon, Mar 23, 2015 at 03:04:48PM -0600, Simon Glass wrote: Hi Sjoerd, On 12 March 2015 at 15:33, Sjoerd Simons sjoerd.sim...@collabora.co.uk wrote: The peach boards have their SDRAM start address at 0x2000 instead of

Re: [U-Boot] [PATCH] config: peach: Correct memory layout environment settings

2015-03-25 Thread Tom Rini
On Wed, Mar 25, 2015 at 09:32:45AM +0100, Sjoerd Simons wrote: On Wed, 2015-03-25 at 01:11 -0400, Tom Rini wrote: On Mon, Mar 23, 2015 at 03:04:48PM -0600, Simon Glass wrote: Hi Sjoerd, On 12 March 2015 at 15:33, Sjoerd Simons sjoerd.sim...@collabora.co.uk wrote: The peach

Re: [U-Boot] [PATCH] config: peach: Correct memory layout environment settings

2015-03-25 Thread Sjoerd Simons
On Wed, 2015-03-25 at 12:58 -0400, Tom Rini wrote: On Wed, Mar 25, 2015 at 09:32:45AM +0100, Sjoerd Simons wrote: On Wed, 2015-03-25 at 01:11 -0400, Tom Rini wrote: On Mon, Mar 23, 2015 at 03:04:48PM -0600, Simon Glass wrote: Hi Sjoerd, On 12 March 2015 at 15:33, Sjoerd Simons

Re: [U-Boot] [PATCH] config: peach: Correct memory layout environment settings

2015-03-25 Thread Tom Rini
On Wed, Mar 25, 2015 at 08:54:16PM +0100, Sjoerd Simons wrote: On Wed, 2015-03-25 at 12:58 -0400, Tom Rini wrote: On Wed, Mar 25, 2015 at 09:32:45AM +0100, Sjoerd Simons wrote: On Wed, 2015-03-25 at 01:11 -0400, Tom Rini wrote: On Mon, Mar 23, 2015 at 03:04:48PM -0600, Simon Glass wrote:

Re: [U-Boot] [PATCH] config: peach: Correct memory layout environment settings

2015-03-24 Thread Simon Glass
Hi Sjoerd, On 24 March 2015 at 01:46, Sjoerd Simons sjoerd.sim...@collabora.co.uk wrote: Hey Simon, On Mon, 2015-03-23 at 15:04 -0600, Simon Glass wrote: Hi Sjoerd, On 12 March 2015 at 15:33, Sjoerd Simons sjoerd.sim...@collabora.co.uk wrote: The peach boards have their SDRAM

Re: [U-Boot] [PATCH] config: peach: Correct memory layout environment settings

2015-03-24 Thread Tom Rini
On Mon, Mar 23, 2015 at 03:04:48PM -0600, Simon Glass wrote: Hi Sjoerd, On 12 March 2015 at 15:33, Sjoerd Simons sjoerd.sim...@collabora.co.uk wrote: The peach boards have their SDRAM start address at 0x2000 instead of 0x4000 which seems common for all other exynos5 based boards.

Re: [U-Boot] [PATCH] config: peach: Correct memory layout environment settings

2015-03-24 Thread Sjoerd Simons
Hey Simon, On Mon, 2015-03-23 at 15:04 -0600, Simon Glass wrote: Hi Sjoerd, On 12 March 2015 at 15:33, Sjoerd Simons sjoerd.sim...@collabora.co.uk wrote: The peach boards have their SDRAM start address at 0x2000 instead of 0x4000 which seems common for all other exynos5 based

Re: [U-Boot] [PATCH] config: peach: Correct memory layout environment settings

2015-03-23 Thread Simon Glass
Hi Sjoerd, On 12 March 2015 at 15:33, Sjoerd Simons sjoerd.sim...@collabora.co.uk wrote: The peach boards have their SDRAM start address at 0x2000 instead of 0x4000 which seems common for all other exynos5 based boards. This means the layout set in exynos5-common.h causes the kernel be

[U-Boot] [PATCH] config: peach: Correct memory layout environment settings

2015-03-12 Thread Sjoerd Simons
The peach boards have their SDRAM start address at 0x2000 instead of 0x4000 which seems common for all other exynos5 based boards. This means the layout set in exynos5-common.h causes the kernel be loaded more then 128MB (at 0x4200) away from memory start which breaks booting kernels