> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Monday, January 21, 2019 7:49 PM
> To: Anup Patel ; Rick Chen ;
> Bin Meng ; Joe Hershberger
> ; Lukas Auer ;
> Masahiro Yamada ; Simon Glass
>
> Cc: Palmer Dabbelt ; Paul Walmsley
> ; Atish Patra ;
> Christoph He
On 01/18/2019 07:14 AM, Anup Patel wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, January 17, 2019 11:51 PM
To: Anup Patel ; Rick Chen ;
Bin Meng ; Joe Hershberger
; Lukas Auer ;
Masahiro Yamada ; Simon Glass
Cc: Palmer Dabbelt ; Paul Walmsley
; A
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Thursday, January 17, 2019 11:51 PM
> To: Anup Patel ; Rick Chen ;
> Bin Meng ; Joe Hershberger
> ; Lukas Auer ;
> Masahiro Yamada ; Simon Glass
>
> Cc: Palmer Dabbelt ; Paul Walmsley
> ; Atish Patra ;
> Christoph
On 01/17/2019 11:39 AM, Anup Patel wrote:
This patch adds fixed-factor clock driver which derives clock
rate by dividing (div) and multiplying (mult) fixed factors
to a parent clock.
Signed-off-by: Anup Patel
Signed-off-by: Atish Patra
---
drivers/clk/Makefile | 4 +-
drivers/clk
This patch adds fixed-factor clock driver which derives clock
rate by dividing (div) and multiplying (mult) fixed factors
to a parent clock.
Signed-off-by: Anup Patel
Signed-off-by: Atish Patra
---
drivers/clk/Makefile | 4 +-
drivers/clk/clk_fixed_factor.c | 74 +
From: Anup Patel
This patch adds fixed-factor clock driver which derives clock
rate by dividing (div) and multiplying (mult) fixed factors
to a parent clock.
Signed-off-by: Anup Patel
Signed-off-by: Atish Patra
---
drivers/clk/Makefile | 4 +-
drivers/clk/clk_fixed_factor.c | 74 ++
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