On Thursday, March 9, 2017 at 12:36:31 AM UTC+1, Jernej Škrabec wrote:
>
> Designware HDMI controller and phy are used in other SoCs as well. Split
> out platform independent code.
>
> DW HDMI has 8 bit registers but they can be represented as 32 bit
> registers as well. Add support to select
On 8 March 2017 at 16:34, Jernej Skrabec wrote:
> Designware HDMI controller and phy are used in other SoCs as well. Split
> out platform independent code.
>
> DW HDMI has 8 bit registers but they can be represented as 32 bit
> registers as well. Add support to select access mode.
>
> EDID reading
Hi Nickey,
Dne petek, 10. marec 2017 ob 03:19:44 CET je Nickey.Yang napisal(a):
> Hi Jernej,
>
> 在 2017年03月09日 07:34, Jernej Skrabec 写道:
> > Designware HDMI controller and phy are used in other SoCs as well. Split
> > out platform independent code.
> >
> > DW HDMI has 8 bit registers but they ca
Hi Jernej,
在 2017年03月09日 07:34, Jernej Skrabec 写道:
Designware HDMI controller and phy are used in other SoCs as well. Split
out platform independent code.
DW HDMI has 8 bit registers but they can be represented as 32 bit
registers as well. Add support to select access mode.
EDID reading code
Designware HDMI controller and phy are used in other SoCs as well. Split
out platform independent code.
DW HDMI has 8 bit registers but they can be represented as 32 bit
registers as well. Add support to select access mode.
EDID reading code use reading by blocks which is not supported by other
S
5 matches
Mail list logo