Hi,
I notice there is u-boot for x86 architecture in the denx site. I wonder
whether the u-boot-x86 has the legacy BIOS services, such as dispatching
PCI/PCIE device option rom such as video, SATA, etc. Does it have int13,
int15 etc. services for x86 Linux to call during booting phase.
Thanks,
SK
Hi,
I would like to run U-boot on x86 emulated QEMU-based environment. I found some
info regarding coreboot + U-boot integration, using U-boot as payload, etc. but
I was unable to start U-boot.
I'm using the 32-bits i686-pc-linux-gnu toolchain and I successfully
cross-compiled coreboot and star
Hello,
I've been digging a bit in X86 bootstart asm code and found possibly wrong
code, as far as I understand:
In u-boot/arch/x86/cpu/start.S, there is piece of code to disable caches:
/* Turn of cache (this might require a 486-class CPU) */
movl%cr0, %eax
orl $(X86_CR0_NW |
Hi SK,
On 20/08/10 17:42, sk ong wrote:
> Hi,
>
> I notice there is u-boot for x86 architecture in the denx site. I wonder
> whether the u-boot-x86 has the legacy BIOS services, such as dispatching
> PCI/PCIE device option rom such as video, SATA, etc. Does it have int13,
> int15 etc. services fo
On Sat, Aug 21, 2010 at 11:42:31AM +1000, Graeme Russ wrote:
> It sounds like you might be looking at using U-Boot for booting a x86
> PC. If this is the case, maybe you should take a look at coreboot
> (http://www.coreboot.org/)
For what it's worth: we have a beginning of x86 support in Barebox
Hi Sk,
Please keep the Cc list intact (specifically U-Boot Users). Although some
of these questions are a little off-topic for the list, there is much
confusion about U-Boot as an embedded boot loader, CoreBoot as a BIOS
replacement which can boot the Linux kernel directly and x86 'Bootloaders'
su
Graeme,
Thanks for the information. Now I know I need to take a look at coreboot
too.
Do you know anyone has or plan to do porting for Intel Atom based uboot or
coreboot or other boot loader?
Thanks,
SK
On Wed, Aug 25, 2010 at 7:16 PM, Graeme Russ wrote:
> Hi Sk,
>
> Please keep the Cc list
Sk,
On 25/08/10 23:49, sk ong wrote:
> Graeme,
>
> Thanks for the information. Now I know I need to take a look at coreboot
> too.
>
> Do you know anyone has or plan to do porting for Intel Atom based uboot
> or coreboot or other boot loader?
Not specifically however I understand that the Ato
Graeme,
I am not familiar with device driver for embedded Linux, but
I think the Linux device driver for Atom currently still use the BIOS alike
support at least in the booting phase.
I think there may be a challenge to port the device driver (video, SATA,
ethernet, etc.) to use in uboot from one
Hi Graeme,
> I notice there is a work in progress for coreboot on only one Intel Atom
> motherboard (the D945GCLF) - Not a lot of support there.
I would imagine that it is _very_ difficult to get at the information
one needs to write such low-level software. During private talks I got
the impres
Hi all,
I am using u-boot from git://git.denx.de/u-boot-x86.git
I build u-boot by:
make coreboot-x86_config
make
u-boot is then set as a payload for coreboot.
I then run coreboot as a bios for qemu:
qemu-system-i386 -bios ./build/coreboot.rom -m 1g -nographic -s -S
the sy
> To: u-boot@lists.denx.de
> Subject: [U-Boot] U-boot & x86 & coreboot
>
> Hi,
>
> I would like to run U-boot on x86 emulated QEMU-based environment. I
> found some info regarding coreboot + U-boot integration, using U-boot as
> payload, etc. but I was unable to start U
Hi Rossier,
On Wed, Jul 17, 2013 at 2:29 AM, Rossier Daniel
wrote:
> Hi,
>
> I would like to run U-boot on x86 emulated QEMU-based environment. I found
> some info regarding coreboot + U-boot integration, using U-boot as payload,
> etc. but I was unable to start U-boot.
> I'm using the 32-bits i6
ecific stuff.
>
> > -Original Message-
> > From: u-boot-boun...@lists.denx.de [mailto:u-boot-
> > boun...@lists.denx.de] On Behalf Of Rossier Daniel
> > Sent: mercredi 17 juillet 2013 10:29
> > To: u-boot@lists.denx.de
> > Subject: [U-Boot] U-boot & x86 & cor
boot/qemu/x86. Great! In a near future,
I will also enable saveenv in order to preserve the environment in a flash file.
Cheers
Daniel
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: mercredi 17 juillet 2013 23:56
> To: R
Hi Daniel,
On Fri, Jul 19, 2013 at 1:49 AM, Rossier Daniel
wrote:
> Hi Simon,
> (My first name is Daniel ;-)
>
> I finally succeeded in booting u-boot on QEMU/x86 and even using tftp with
> networking.
> And thanks for your tips.
> First, I changed my version of qemu (from git back to 1.4.50) whi
Hi All,
I figured it might be best to start a new, clean thread dealing with the
technical design aspects of bootstrapping U-Boot from coreboot.
I am extremely excited about this as the x86 U-Boot maintainer, but even
more so by the idea of two very mature and respected FLOSS projects
potentially
On Friday, September 30, 2011 01:06:04 PM Ondra Kupka wrote:
> Hello,
>
> I've been digging a bit in X86 bootstart asm code and found possibly wrong
> code, as far as I understand:
>
> In u-boot/arch/x86/cpu/start.S, there is piece of code to disable caches:
>
> /* Turn of cache (this might
Hi Ondrej Kupka
On 30/09/11 21:06, Ondra Kupka wrote:
> Hello,
>
> I've been digging a bit in X86 bootstart asm code and found possibly wrong
> code, as far as I understand:
>
> In u-boot/arch/x86/cpu/start.S, there is piece of code to disable caches:
>
> /* Turn of cache (this might re
Hi Jose,
On 28 January 2014 12:17, José Marinho wrote:
> Hi all,
> I am using u-boot from git://git.denx.de/u-boot-x86.git
> I build u-boot by:
> make coreboot-x86_config
> make
>
> u-boot is then set as a payload for coreboot.
>
> I then run coreboot as a bios for qemu:
>
Hi,
I use Coreboot with u-boot-x86 as payload to bring-up my Intel Atom C2000
platform, but I cannot make my SPI flash(w25q128fv) to work.
Actually the SPI was detected under coreboot with correct ID, but in u-boot “sf
probe” command, it just always failed.
After tracing and code dump, I found i
+Jian, Simon, ML, this info might be useful for other guys on the ML.
Hi Christian,
On Mon, Jul 18, 2016 at 11:02 PM, Christian Gmeiner
wrote:
> Hi Bin,
>
>
> 2016-06-28 3:15 GMT+02:00 Bin Meng :
>> Hi Christian,
>>
>> On Mon, Jun 27, 2016 at 8:37 PM, Christian Gmeiner
>> wrote:
>>> Hi Bin
>>>
Hi Bin
>>
>> For the moment I have no answer to this question. I need to dive into
>> the vxworks code, which
>> is not what I like to do now (but needs to be done)-
>>
>
> Yes, please do track it down. The interrupt line register configured
> by U-Boot should be enough for VxWorks to function und
Hi Jian,
On Tue, Jul 19, 2016 at 4:03 PM, Jian Luo wrote:
> Hallo Christian,
>
>
> On 19.07.2016 08:02, Christian Gmeiner wrote:
>
> Hi Bin
>
> For the moment I have no answer to this question. I need to dive into
> the vxworks code, which
> is not what I like to do now (but needs to be done)-
>
Hi Bin,
On 19.07.2016 10:10, Bin Meng wrote:
Hi Jian,
On Tue, Jul 19, 2016 at 4:03 PM, Jian Luo wrote:
Hallo Christian,
On 19.07.2016 08:02, Christian Gmeiner wrote:
Hi Bin
For the moment I have no answer to this question. I need to dive into
the vxworks code, which
is not what I like to
Hi Jian,
>
> For the moment I have no answer to this question. I need to dive into
> the vxworks code, which
> is not what I like to do now (but needs to be done)-
>
> Yes, please do track it down. The interrupt line register configured
> by U-Boot should be enough for VxWorks to function under PI
Hi Christian,
I took some time to recall what I did by patching FSP:
- search in every PE32 and TE image section for binary sequence
81c900018908c6460e01
and change to
81c9000102008908c6460e00
- then replace them in-place
The difference can be better understand if disassemblies are compare
Hi Jian,
>
> I took some time to recall what I did by patching FSP:
>
> - search in every PE32 and TE image section for binary sequence
> 81c900018908c6460e01
> and change to
> 81c9000102008908c6460e00
>
In the meantime I started by patching out every access to the uart bar, with
the same res
Hi Christian,
On 20.07.2016 10:22, Christian Gmeiner wrote:
Hi Jian,
I took some time to recall what I did by patching FSP:
- search in every PE32 and TE image section for binary sequence
81c900018908c6460e01
and change to
81c9000102008908c6460e00
In the meantime I started by patching o
Dear Graeme Russ,
In message <4dc94cd4.2050...@gmail.com> you wrote:
>
> So coreboot and U-Boot are a good complement to each other so bringing
> U-Boot to x86 PC mainboards via coreboot looks like a good idea - Now the
> politics ;)
> - The U-Boot source 'must' be self contained - No external l
Hi Wolfgang
On Wed, May 11, 2011 at 4:03 AM, Wolfgang Denk wrote:
> Dear Graeme Russ,
>
> In message <4dc94cd4.2050...@gmail.com> you wrote:
>>
>> So coreboot and U-Boot are a good complement to each other so bringing
>> U-Boot to x86 PC mainboards via coreboot looks like a good idea - Now the
>>
Dear Graeme Russ,
In message you wrote:
>
> >> - Is it worth playing around with segment registers to 'relocate' U-Boot
> >
> > That's a U-Boot question, right? Let's solve this independently.
>
> Not really - If we want coreboot to place U-Boot at top-of-RAM then
> coreboot would have to figur
Hello All,
I'm trying to determine if U-Boot is a suitable choice for my
particular motherboard which is a Jetway / Via C7 (i686) mini-ITX
board with a IDE flash drive, and a Realtek 8169 PHY. I am running an
embedded Linux app on this board.
I have been using Grub2 for the past year and have re
Hi,
On Tue, May 31, 2016 at 6:14 PM, Hilbert Tu(杜睿哲_Pegatron)
wrote:
> Hi,
>
> I use Coreboot with u-boot-x86 as payload to bring-up my Intel Atom C2000
> platform, but I cannot make my SPI flash(w25q128fv) to work.
> Actually the SPI was detected under coreboot with correct ID, but in u-boot
>
]
Sent: Wednesday, June 01, 2016 11:36 AM
To: Hilbert Tu(杜睿哲_Pegatron)
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] u-boot-x86 sf probe fail
Hi,
On Tue, May 31, 2016 at 6:14 PM, Hilbert Tu(杜睿哲_Pegatron)
wrote:
> Hi,
>
> I use Coreboot with u-boot-x86 as payload to bring-up my Intel Atom
Hi Hilbert,
On Thu, Jun 2, 2016 at 11:46 AM, Hilbert Tu(杜睿哲_Pegatron)
wrote:
> Hi Bin,
>
> Sorry for the late.
>
> I have checked with Intel's support and following is their response:
>
>>>On the other hand, for the question about ICH7 or ICH9. Unfortunately, the
>>>Bios Writers Guides (BWGs) or
Hi Hilbert,
On 2 June 2016 at 19:40, Bin Meng wrote:
> Hi Hilbert,
>
> On Thu, Jun 2, 2016 at 11:46 AM, Hilbert Tu(杜睿哲_Pegatron)
> wrote:
>> Hi Bin,
>>
>> Sorry for the late.
>>
>> I have checked with Intel's support and following is their response:
>>
On the other hand, for the question abo
Hi Simon,
I have checked the SPI base address in coreboot and u-boot. They are different.
I am not sure is it due to the memory remapping.
In coreboot, the SPI address is 0xfed0100
In u-boot, the SPI address is 0x7fc36e00
Do you have any comments? Thanks.
Regards,
Hilbert
This e-mail and its att
Hi Hilbert,
On Wed, Jun 15, 2016 at 2:30 PM, Hilbert Tu(杜睿哲_Pegatron)
wrote:
> Hi Simon,
>
> I have checked the SPI base address in coreboot and u-boot. They are
> different. I am not sure is it due to the memory remapping.
> In coreboot, the SPI address is 0xfed0100
> In u-boot, the SPI address
+Simon
On Wed, Jun 15, 2016 at 4:42 PM, Hilbert Tu(杜睿哲_Pegatron)
wrote:
> Hi Bin,
>
> Thanks for your information.
>
> The SPI address I mentioned was dumped from pch_get_spi_base(). But I have no
> idea where to check my memory mapping.
You need check your SoC datasheet.
> It is possible that
Hi Bin,
Sorry for the top-posting.
After check the datasheet, I think my SPI address was wrong due to null
ops->read_config in pci_bus_read_config().
My dts file:
spi: spi {
#address-cells = <1>;
#size-cells = <0>;
Hi Hilbert,
On Thu, Jun 16, 2016 at 3:46 PM, Hilbert Tu(杜睿哲_Pegatron)
wrote:
> Hi Bin,
>
> Sorry for the top-posting.
>
> After check the datasheet, I think my SPI address was wrong due to null
> ops->read_config in pci_bus_read_config().
I don't think pci_bus_read_config() has null ops->read_c
Hi Bin
Thanks for your help.
Following is my dts file for your reference. I use qemu-x86_q35 in u-boot as
dts template. Orginally I think the ops->read_config should maps to
pci_x86_read_config(), but the dump result is it failed in the logic "if
(!ops->read_config)" in pci_bus_read_config()
Hello.
I have a similar problem with U-Boot on Intel Atom C2000.
And I have found that the issue with the SPI flash is caused by a file
x86/cpu/coreboot/pci.c which contains an empty driver claiming to be
compatible with intel,pch7 and intel,pch9. After commenting it out the SPI
flash is being pro
On Wed, Jun 22, 2016 at 1:19 PM, Yaroslav wrote:
> Hello.
>
> I have a similar problem with U-Boot on Intel Atom C2000.
> And I have found that the issue with the SPI flash is caused by a file
> x86/cpu/coreboot/pci.c which contains an empty driver claiming to be
> compatible with intel,pch7 and i
Hi Hilbert,
On Wed, Jun 22, 2016 at 2:24 PM, Hilbert Tu(杜睿哲_Pegatron)
wrote:
> Hi Bin,
>
> As the earlier post, do you have any comments? Thanks.
>
Can you try this patch [1] and let me know if it fixes the issue?
[1]: http://patchwork.ozlabs.org/patch/639039/
Regards,
Bin
Hi Bin,
As the earlier post, do you have any comments? Thanks.
Regards,
Hilbert
This e-mail and its attachment may contain PEGATRON Corp information that is
confidential or privileged, and are solely for the use of the individual to
whom this e-mail is addressed. If you are not the intended rec
Hi Bin,
Sorry for the late.
I applied the patch and it seems to work. I'll do more tests. Thanks.
Regards,
Hilbert
This e-mail and its attachment may contain PEGATRON Corp information that is
confidential or privileged, and are solely for the use of the individual to
whom this e-mail is addres
Hello,
I'm trying to get u-boot working on QEMU so I understand how it works
before moving to an embedded system.
After following the instructions here:
https://lists.nongnu.org/archive/html/qemu-devel/2015-05/msg04835.html
U-Boot is always crashing, even when omitting the network stuff. Belo
http://kboot.sourceforge.net/
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
On Mon, Nov 21, 2016 at 03:31:43PM -0600, Eric Neblock wrote:
> Hello,
> I'm trying to get u-boot working on QEMU so I understand how it works
> before moving to an embedded system.
>
> After following the instructions here:
> https://lists.nongnu.org/archive/html/qemu-devel/2015-05/msg04835.h
On 11/22/2016 08:21 AM, Tom Rini wrote:
> On Mon, Nov 21, 2016 at 03:31:43PM -0600, Eric Neblock wrote:
>> Hello,
>> I'm trying to get u-boot working on QEMU so I understand how it works
>> before moving to an embedded system.
>>
>> After following the instructions here:
>> https://lists.nongnu
On Wed, Nov 23, 2016 at 11:04:29AM -0600, Eric Neblock wrote:
> On 11/22/2016 08:21 AM, Tom Rini wrote:
> > On Mon, Nov 21, 2016 at 03:31:43PM -0600, Eric Neblock wrote:
> >> Hello,
> >> I'm trying to get u-boot working on QEMU so I understand how it works
> >> before moving to an embedded system
On 11/23/2016 11:35 AM, Tom Rini wrote:
> On Wed, Nov 23, 2016 at 11:04:29AM -0600, Eric Neblock wrote:
>> On 11/22/2016 08:21 AM, Tom Rini wrote:
>>> On Mon, Nov 21, 2016 at 03:31:43PM -0600, Eric Neblock wrote:
Hello,
I'm trying to get u-boot working on QEMU so I understand how it wor
Hi All,
Please note that the 'next' branch of u-boot-x86 has been rebased against
u-boot/next published to git://git.denx.de/u-boot-x86.git via a forced push
If you have cloned u-boot-x86/next, please be aware that you will need to
update your local repo
Regards,
Graeme
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