chips connected to CS1
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap4/emif.c | 47 +-
arch/arm/cpu/armv7/omap4/sdram_elpida.c | 24
arch/arm/include/asm/arch-omap4/emif.h |5 +--
3 files changed, 22 insertions(+), 54
Tuning some IO settings for better performance and power.
And consolidate all such IO settings at one place.
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap4/board.c| 57 +++
arch/arm/cpu/armv7/omap4/emif.c | 25
Factor out common parts from omap4_sdp4430.h and omap4_panda.h
into a new file omap4_common.h
Signed-off-by: Aneesh V ane...@ti.com
---
include/configs/omap4_common.h | 275 +++
include/configs/omap4_panda.h | 245
Hi Anton,
On Tuesday 09 August 2011 10:09 PM, Anton Staaf wrote:
I'm not sure what the larger context of this change is, but it seems
like a bad idea to me. There are a lot of locations in U-Boot that
Please see this thread for the context.
On Wednesday 10 August 2011 11:41 PM, Anton Staaf wrote:
On Tue, Aug 9, 2011 at 11:48 PM, Aneesh Vane...@ti.com wrote:
Hi Anton,
On Tuesday 09 August 2011 10:09 PM, Anton Staaf wrote:
I'm not sure what the larger context of this change is, but it seems
like a bad idea to me. There are a
Hi Albert, Hong,
On Wednesday 10 August 2011 12:06 PM, Albert ARIBAUD wrote:
Hi Hong Xu,
Le 10/08/2011 08:17, Hong Xu a écrit :
There are some ARM926 specific code in arch/arm/lib/cache.c; So I also
put the stuff there. ;-) I think Albert Aribaud or the original
contributor of cache part
set-way operations need a DSB after them to ensure the
operation is complete. DMB may not be enough. Use DSB
after all operations instead of DMB.
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/cache_v7.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff
documentation for cache usage in ARM.
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
Updated with additional guidelines in the README.
---
arch/arm/lib/board.c |8 ++
arch/arm/lib/cache.c | 12 +++
doc/README.arm-caches | 51
Remove the flush of boundary cache-lines done as part
of invalidate on a non cache-line boundary aligned
buffer
Also, print a warning when this situation is recognized.
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
* New in V2
V3:
* error notification instead of warning on un-aligned invalidate
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap3/board.c |8
arch/arm/cpu/armv7/omap4/board.c |8
2 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..2c3d7f3
.
V3:
* Improve the error message on un-aligned invalidate
Aneesh V (4):
arm: do not force d-cache enable on all boards
omap: enable caches at system start-up
armv7: stronger barrier for cache-maintenance operations
armv7: cache: remove flush on un-aligned invalidate
arch/arm/cpu/armv7
Hi Albert, Sandeep
On Thursday 04 August 2011 10:34 PM, Albert ARIBAUD wrote:
Hi Wolfgang,
Here is my pull request for u-boot-arm/master, from which I did remove
the wrongly applied commits that you indicated and in which all patches
submitted before the merge window closure are taken into
On Friday 12 August 2011 01:54 PM, Lukasz Majewski wrote:
This commit adds support for reading the D cache line size for armv7
architecture.
The get_dcache_line_size() function is supposed to work in conjunction
with memalign call to provide D cache aligned DMA buffers.
Signed-off-by:
Hi Albert, Lukasz,
On Friday 12 August 2011 02:28 PM, Albert ARIBAUD wrote:
Hi Lukasz,
On 12/08/2011 10:24, Lukasz Majewski wrote:
This commit adds support for reading the D cache line size for armv7
architecture.
The get_dcache_line_size() function is supposed to work in conjunction
with
/109199/ made by Aneesh V)
I'm currently using the u-boot/master branch,
SHA1: d26a82023af5771462f7223241ed18cfb7965f71
After some research I can say that flush_dcache_all() and
invalidate_dcache_all() are working(at least on my target).
However I'm planning to use the range versions
Hi Lukasz,
On Friday 12 August 2011 05:11 PM, Lukasz Majewski wrote:
Hi Aneesh,
On Fri, 12 Aug 2011 16:29:25 +0530
Aneesh V ane...@ti.com wrote:
Hi Lukasz,
On Tuesday 09 August 2011 08:11 PM, Lukasz Majewski wrote:
Dear all,
As we know dcache is now enabled in u-boot.
I'm trying
Hi Albert,
On Friday 12 August 2011 06:53 PM, Albert ARIBAUD wrote:
Hi all,
I *think* I've finished getting in all patches that should have gone in
from the merge window, and also bugfixes.
However, I seem to remember a mail asking me to consider some patches
I'd missed, but I could
documentation for cache usage in ARM.
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
* Updated with additional guidelines in the README.
V3:
* No change
V4:
* Fix typo in README
---
arch/arm/lib/board.c |8 ++
arch/arm/lib/cache.c | 12 +++
doc/README.arm-caches | 51
Hi Albert,
On Monday 15 August 2011 12:52 PM, V, Aneesh wrote:
Hi Albert,
On Fri, Aug 12, 2011 at 11:39 PM, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
Hi Aneesh,
Le 12/08/2011 16:06, Aneesh V a écrit :
Hi Albert,
On Friday 12 August 2011 06:53 PM, Albert ARIBAUD wrote:
Hi all
Signed-off-by: Aneesh V ane...@ti.com
Signed-off-by: Sebastien Jan s-...@ti.com
Signed-off-by: David Anders x0132...@ti.com
---
board/ti/panda/panda_mux_data.h | 41 --
board/ti/sdp4430/sdp4430_mux_data.h |9 ++-
2 files changed, 22 insertions(+), 28
Hi Hong,
On Friday 19 August 2011 02:53 PM, Hong Xu wrote:
Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations
into this file.
How about converting as much as possible of these to armv5/armv6 generic
code as I mentioned in this thread:
Hi Albert,
On Friday 19 August 2011 03:39 AM, Albert ARIBAUD wrote:
Hi all,
This week-end I intend to go through the board removal patch set and
apply those patches in it that still fail to compile with the current
u-boot-arm/master tree. So:
1) if there are any pull requests to
Hi Marek,
On Friday 19 August 2011 03:16 PM, Marek Vasut wrote:
On Friday, August 19, 2011 11:37:29 AM Aneesh V wrote:
Hi Hong,
On Friday 19 August 2011 02:53 PM, Hong Xu wrote:
Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations
into this file.
How about converting
On Friday 19 August 2011 06:25 PM, Marek Vasut wrote:
On Friday, August 19, 2011 12:43:30 PM Aneesh V wrote:
Hi Marek,
On Friday 19 August 2011 03:16 PM, Marek Vasut wrote:
On Friday, August 19, 2011 11:37:29 AM Aneesh V wrote:
Hi Hong,
On Friday 19 August 2011 02:53 PM, Hong Xu wrote
Hi Hong,
On Friday 19 August 2011 02:53 PM, Hong Xu wrote:
Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations
into this file.
Signed-off-by: Hong Xu hong...@atmel.com
Tested-by: Elen Song elen.s...@atmel.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Since V1
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/include/asm/arch-omap4/clocks.h | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/arch-omap4/clocks.h
b/arch/arm/include/asm/arch-omap4/clocks.h
index 374e064..45c947d 100644
--- a/arch/arm
Hi Jaya Kumar,
On Wednesday 24 August 2011 05:39 PM, Jaya Kumar wrote:
Hi guys,
I cloned top of tree and tried to build beagleboard. Fails right at
the end with:
make[1]: Entering directory
`/home/beaglexm/clean_code_for_bootstuff/u-boot/board/ti/beagle'
beagle.c:41:27: error:
Hi Wolfgang,
On Friday 26 August 2011 05:06 PM, Wolfgang Denk wrote:
Dear Simon,
...
As all this is about preparing for a SPL boot, I suggest we name the
new command spl; the resulting user interface could be like this:
spl export img addr [args ...]
How about skipping the spl
Hi Albert,
On Wednesday 31 August 2011 03:43 PM, Albert ARIBAUD wrote:
Hi Woldfgang,
[snip ...]
aneeshv (3):
Wonder why my name is not appearing correctly. Looks like this has
started happening after I created a patchworks account with user-name
'aneeshv'.
I couldn't find a way to set
Hi Mike,
On Tuesday 30 August 2011 09:14 PM, Mike Frysinger wrote:
On Thursday, August 25, 2011 05:34:00 Wolfgang Denk wrote:
CONFIG_SYS_CACHELINE_SIZE is a mandatory #define, and it's OK that a
build breaks when it's missing. On the other hand I don;t se why this
macro needs top be removed
Hi Albert,
On Sunday 04 September 2011 12:56 AM, Albert ARIBAUD wrote:
Hi Aneesh,
Le 01/09/2011 10:59, Aneesh V a écrit :
Hi Albert,
On Wednesday 31 August 2011 03:43 PM, Albert ARIBAUD wrote:
Hi Woldfgang,
[snip ...]
aneeshv (3):
Wonder why my name is not appearing correctly. Looks
Hi Albert,
On Sunday 04 September 2011 02:31 PM, Albert ARIBAUD wrote:
Le 04/09/2011 10:44, Aneesh V a écrit :
Hi Albert,
On Sunday 04 September 2011 12:56 AM, Albert ARIBAUD wrote:
Hi Aneesh,
Le 01/09/2011 10:59, Aneesh V a écrit :
Hi Albert,
On Wednesday 31 August 2011 03:43 PM
Hi Albert,
On Sunday 04 September 2011 02:42 PM, Albert ARIBAUD wrote:
Le 04/09/2011 11:02, Aneesh V a écrit :
Hi Albert,
On Sunday 04 September 2011 02:31 PM, Albert ARIBAUD wrote:
Le 04/09/2011 10:44, Aneesh V a écrit :
Hi Albert,
On Sunday 04 September 2011 12:56 AM, Albert ARIBAUD
Tuning some IO settings for better performance and power.
And consolidate all such IO settings at one place.
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
* Add one more IO setting(in CONTROL_LPDDR2IOi_3) that was
missing in the V1
* Move all LPDDR2IO regs related defines to omap4.h from
chips connected to CS1
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
* Rebased on latest HEAD of u-boot-ti master
---
arch/arm/cpu/armv7/omap4/emif.c | 47 +-
arch/arm/cpu/armv7/omap4/sdram_elpida.c | 24
arch/arm/include/asm/arch-omap4
Factor out common parts from omap4_sdp4430.h and omap4_panda.h
into a new file omap4_common.h
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
* Rebased on latest HEAD of u-boot-ti master
---
include/configs/omap4_common.h | 275 +++
include/configs
chips connected to CS1
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
* Rebased on latest HEAD of u-boot-ti master
---
arch/arm/cpu/armv7/omap4/emif.c | 47 +-
arch/arm/cpu/armv7/omap4/sdram_elpida.c | 24
arch/arm/include/asm/arch-omap4
Tuning some IO settings for better performance and power.
And consolidate all such IO settings at one place.
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
* Add one more IO setting(in CONTROL_LPDDR2IOi_3) that was
missing in the V1
* Move all LPDDR2IO regs related defines to omap4.h from
Factor out common parts from omap4_sdp4430.h and omap4_panda.h
into a new file omap4_common.h
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
* Rebased on latest HEAD of u-boot-ti master
V3:
* Fixed checkpatch error
---
include/configs/omap4_common.h | 275
Hi Albert,
On Tuesday 06 September 2011 05:13 PM, Albert ARIBAUD wrote:
(splitting this discussion between the patch question and longer term
[snip ...]
To sum it up, we would have
arch/arm/isa/armv5 (where ARMv5t ISA common code would reside, including
cache ops)
Hi Christopher,
On Wednesday 02 November 2011 06:33 PM, Lalancette, Christopher wrote:
Hello,
I've recently been playing around with u-boot on a pandaboard Rev A1.
The rest of my environment is an MLO built from x-loader git hash
c4289f1bee035dea41536c5ba5e1bc36c7d493c4, and booting
Hi Daniel, Wolfgang,
On Thursday 03 November 2011 08:55 PM, Daniel Schwierzeck wrote:
Hi Wolfgang,
[snip ..]
Conclusion:
- complete build time reduced from 1m11s to 20s
- incremental rebuild time reduced from 20s to 3s
- cc-option calls reduced from 3024 to 8
- execve calls reduced from
Hi Jon,
On Friday 04 November 2011 04:30 AM, Scott Wood wrote:
On 11/03/2011 05:20 PM, jonsm...@gmail.com wrote:
Looks like I am not seeing some mails in this thread. I didn't get your
first mail, neither Tom Rini's mails.
My primary SPL image needs the size of the secondary image built into
spl/u-boot-spl.bin
if you want to build only spl
Cc: Wolfgang Denk w...@denx.de
Signed-off-by: Aneesh V ane...@ti.com
---
Makefile |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/Makefile b/Makefile
index 82de62b..7ae8b22 100644
--- a/Makefile
+++ b/Makefile
@@ -481,7
version.
Tested-by: Aneesh V ane...@ti.com
br,
Aneesh
Signed-off-by: Daniel Schwierzeckdaniel.schwierz...@googlemail.com
---
Changes for v2:
- move cache file to $(obj)/include/generated
- reworked completely
- cache also non-working gcc options
- remove CACHE_CC_OPTIONS config
Hi Wolfgang,
On Saturday 05 November 2011 01:13 PM, Aneesh V wrote:
Wolfgang's patch for build time improvement is bringing
out issues due to missing dependencies in the top-level
Makefile. I get errors such as the below while building
with many threads.
make[1]: /home/a0393566local/u-boot
On Friday 11 November 2011 07:21 AM, Mike Frysinger wrote:
On Thursday 10 November 2011 18:45:30 Loïc Minier wrote:
On Thu, Nov 10, 2011, Mike Frysinger wrote:
+ifneq ($(CONFIG_IMX_CONFIG),)
+ALL-y += $(obj)u-boot.imx
+endif
why won't this work:
ALL-$(CONFIG_IMX_CONFIG) += $(obj)u-boot.mix
Dear Wolfgang,
On Tuesday 18 January 2011 03:25 AM, Wolfgang Denk wrote:
Dear Aneesh V,
In message4d2b1a90.9030...@ti.com you wrote:
+struct __attribute__ ((__packed__)) emu_hal_params {
+ u32 num_params;
+ u32 param1;
+};
Why exactly do we need the __attribute__ ((__packed__)) here
Dear Wolfgang,
On Tuesday 01 February 2011 01:25 PM, Wolfgang Denk wrote:
Dear Aneesh V,
In message4d4798e2.3050...@ti.com you wrote:
I had been working on creating an MMC SPL for OMAP4. OMAP boards
typically support booting from the FAT partition of a removable SD/MMC
card. So, we need
Hi Vaibhav,
On Tuesday 01 February 2011 12:22 PM, Bedia, Vaibhav wrote:
Hi Aneesh,
On Tuesday, February 01, 2011 10:54 AM, Aneesh V wrote:
Dear Wolfgang,
I had been working on creating an MMC SPL for OMAP4. OMAP boards
typically support booting from the FAT partition of a removable
SD/MMC
Hi Albert,
On Tuesday 01 February 2011 12:41 PM, Albert ARIBAUD wrote:
Le 01/02/2011 08:04, Albert ARIBAUD a écrit :
I'd like to make sure I understand the issue. Do these three BSS
variables occupy space in the U-Boot binary? If they do, then *that*
must be fixed rather than allocating a
Hello Wolfgang, Albert,
On Tuesday 01 February 2011 03:33 PM, Wolfgang Denk wrote:
Dear Aneesh V,
In message4d47c1c9.1020...@ti.com you wrote:
Why would that be necessary? Just put the BSS segment in SDRAM, and
everything is fine, isn't it?
SDRAM is initialized by the SPL. So, bss can
Hi Albert,
On Wednesday 02 February 2011 07:07 PM, Albert ARIBAUD wrote:
Hi Aneesh,
Le 02/02/2011 14:17, Aneesh V a écrit :
Hello Wolfgang, Albert,
On Tuesday 01 February 2011 03:33 PM, Wolfgang Denk wrote:
Dear Aneesh V,
In message4d47c1c9.1020...@ti.com you wrote:
Why would
Hello Graeme,
On Thursday 03 February 2011 02:31 AM, Graeme Russ wrote:
[snip ..]
Yes. These are variables that otherwise would go to BSS. I do this
because I need them before SDRAM initialization. One of this is the gd
structure. I allocate gd structure in .data that is in IRAM.
Why I need
Hello Sughosh,
On Thursday 03 February 2011 12:19 PM, sughosh ganu wrote:
hi Aneesh,
On Wed, Feb 2, 2011 at 7:31 PM, Aneesh V ane...@ti.com
mailto:ane...@ti.com wrote:
Yes. These are variables that otherwise would go to BSS. I do this
because I need them before SDRAM initialization
Hello Albert,
On Wednesday 02 February 2011 08:44 PM, Albert ARIBAUD wrote:
[snip ..]
However, there is one minor issue that I would like to report.
Making .bss disjoint from the rest of the image may break the
relocation code in start.S. Currently the assumption is that
'__bss_start'
Hello Wolfgang, Albert,
On Saturday 05 February 2011 12:28 PM, Albert ARIBAUD wrote:
Hi Aneesh,
Le 03/02/2011 11:38, Aneesh V a écrit :
On second thoughts I would like to keep the entire bss in SDRAM. With
MMC and FAT support, the SPL is already nearing the IRAM budget in
OMAP3. It helps
Hi Albert,
On Friday 11 February 2011 12:09 PM, Albert ARIBAUD wrote:
Hi Aneesh,
Le 11/02/2011 07:28, Aneesh V a écrit :
Hello Wolfgang, Albert,
On Saturday 05 February 2011 12:28 PM, Albert ARIBAUD wrote:
Hi Aneesh,
Le 03/02/2011 11:38, Aneesh V a écrit :
On second thoughts I would
On Friday 11 February 2011 01:45 PM, Albert ARIBAUD wrote:
[snip..]
Also, any thoughts on the name for the new label.
_end_of_relocated_image is all I can think of?
Current practice has _end appended to whatever the labels delimit --
same as for _start.
Besides, the relocated part would be
Hi Albert,
On Wednesday 09 February 2011 02:20 AM, Albert ARIBAUD wrote:
Le 08/02/2011 21:18, stefano babic a écrit :
Am 08.02.2011 20:26, schrieb Magnus Lilja:
Patch reposted as a separate mail a couple of minutes ago.
As I mention in the patch I think Fabio's patch has to be applied first.
On Friday 11 February 2011 06:16 PM, Albert ARIBAUD wrote:
[snip...]
Note also that there was a recent patch to ARM926's start.S (replacing
'adr r1, _start' with 'ldr r1, _TEXT_BASE' at line 284). The same should
be done on arm1136.
Is this going to happen for armv7 too? What is the real
Hi Ulf,
On Saturday 12 February 2011 02:46 AM, Ulf Samuelsson wrote:
2011-02-01 09:26, Aneesh V skrev:
Hi Vaibhav,
On Tuesday 01 February 2011 12:22 PM, Bedia, Vaibhav wrote:
Hi Aneesh,
On Tuesday, February 01, 2011 10:54 AM, Aneesh V wrote:
Dear Wolfgang,
I had been working on creating
Hello Ran,
On Tuesday 15 February 2011 04:05 PM, Albert ARIBAUD wrote:
Le 15/02/2011 09:21, Ran a écrit :
Albert ARIBAUDalbert.aribaudat free.fr writes:
Hi Ran,
Le 15/02/2011 07:35, Ran Shalit a écrit :
Hello,
I'm working on OMAPL138 EVM board, with the U-BOOT.
I'm trying to access
-loader) that support booting from
multiple media.
- Also, there is no harm in keeping SPLs specific to a particular media
also under this directory. In fact it makes sense to merge all the
different spl directories into this one.
Signed-off-by: Aneesh V ane...@ti.com
---
Makefile
* Modular apporach to enable future addition of support for all OMAP3/4
platforms
Aneesh V (21):
omap: add miscellaneous utility macros for bit-field operations
omap4: add OMAP4430 revision check
armv7: start.S: provide a hook for saving boot params
omap4: save parameters passed by ROM code
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap4/board.c| 35 +++
arch/arm/include/asm/arch-omap4/omap4.h | 17 +-
arch/arm/include/asm/armv7.h| 31 +++
3 files changed, 77 insertions(+), 6
.
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/cpu.c |7 +++
arch/arm/cpu/armv7/start.S |1 +
2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index a01e0d6..54533fc 100644
--- a/arch/arm/cpu/armv7/cpu.c
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/include/asm/omap_common.h | 51
1 files changed, 51 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/omap_common.h
diff --git a/arch/arm/include/asm/omap_common.h
b/arch/arm/include
.
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap4/board.c| 14
arch/arm/cpu/armv7/omap4/lowlevel_init.S| 31 +++
arch/arm/include/asm/arch-omap4/omap4.h |8 +++
arch/arm/include/asm/arch-omap4/sys_proto.h |1
Adapted from: nand_spl/board/samsung/smdk6400/Makefile
- Add the SPL makefile for OMAP4430 SDP
- Add the necessary CONFIG flags in the board config file
Signed-off-by: Aneesh V ane...@ti.com
---
board/ti/sdp4430/config.mk |3 +-
include/configs/omap4_sdp4430.h | 19 ++
spl/board
Add the basic spl framework and linker script common for OMAP3/4
platforms.
Signed-off-by: Aneesh V ane...@ti.com
---
spl/board/ti/spl-omap.c | 47 ++
spl/board/ti/spl-omap.lds | 62 +
2 files changed, 109
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap4/board.c |3 ++
arch/arm/include/asm/omap_common.h |1 +
spl/board/ti/sdp4430/Makefile | 40
spl/board/ti/spl-omap.c| 10 +
4 files changed, 54 insertions
From: John Rigby john.ri...@linaro.org
Signed-off-by: John Rigby john.ri...@linaro.org
---
common/image.c|1 +
include/image.h |1 +
tools/Makefile|2 +
tools/mkimage.c |2 +
tools/mkimage.h |1 +
tools/omapimage.c | 229
Changes for supporting SPL
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/start.S | 36 +---
1 files changed, 25 insertions(+), 11 deletions(-)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 8215d26..f5f08d9 100644
of the
image copied during relocation and use it appropriately in
start.S.
Also, add a new label to indicate the end of flash image.
This will be useful in identifying the size of flash image
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/start.S|6 +-
arch/arm/cpu/armv7/u
sync up mux settings with the latest in x-loader
Signed-off-by: Aneesh V ane...@ti.com
---
board/ti/panda/panda_mux_data.h | 89 ++-
board/ti/sdp4430/sdp4430_mux_data.h | 29 ++-
2 files changed, 61 insertions(+), 57 deletions(-)
diff --git
initialization gets done depends on this
context. Add a utility function to find this context.
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/include/asm/arch-omap4/sys_proto.h | 47 +++
arch/arm/include/asm/omap_common.h |6 +++
2 files changed, 53 insertions(+), 0
Embed the u-boot flash image size at a known offset from the
start of u-boot so that SPL can use it while loading u-boot
from a non-XIP media.
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/start.S |6 +-
spl/board/ti/spl-omap.lds |1 +
2 files changed, 6 insertions
devices used on Panda and SDP the default timings
are both safe and optimal.
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap4/emif.c | 177 +-
arch/arm/cpu/armv7/omap4/sdram_elpida.c |9 +-
include/configs/omap4_sdp4430.h |1 +
3
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/start.S |1 +
arch/arm/include/asm/omap_common.h |4 +
include/configs/omap4_sdp4430.h|7 ++-
spl/board/ti/sdp4430/Makefile | 35 +++
spl/board/ti/spl-omap.c| 112
. This helps in having single SPL
that works for Panda and SDP.
- Non-essential part is what is set by u-boot for kernel to
function correctly
- Ideally non-essential part should be phased out eventually
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap4/board.c | 53
Add support for:
1. DPLL locking
2. Initialization of clock domains and clock modules
This work draws upon previous work done for x-loader mainly by:
Santosh Shilimkar santosh.shilim...@ti.com
Rajendra Nayak rna...@ti.com
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu
Signed-off-by: Aneesh V ane...@ti.com
---
include/configs/omap4_sdp4430.h |1 +
spl/board/ti/sdp4430/Makefile |8
spl/board/ti/spl-omap.c | 22 ++
3 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/include/configs/omap4_sdp4430.h b
Add support for the SDRAM controller (EMIF).
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap4/Makefile |3 +
arch/arm/cpu/armv7/omap4/board.c|2 +-
arch/arm/cpu/armv7/omap4/emif.c | 281 +++
arch/arm/cpu/armv7/omap4
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/include/asm/arch-omap4/emif.h | 10 +-
include/configs/omap4_panda.h | 24
spl/board/ti/panda/Makefile| 219
3 files changed, 248 insertions(+), 5 deletions(-)
create mode 100644
the device data sheet as input
and the driver will automatically calculate the register values.
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap-common/Makefile |1 +
arch/arm/cpu/armv7/omap-common/utils.c | 61 ++
arch/arm/cpu/armv7/omap4/Makefile |1
Hello Hatim,
On Saturday 26 February 2011 05:04 PM, Hatim Ali wrote:
Hello,
I was trying to understand how NAND-SPL works. What I could understand after
seeing the code is that
1) NAND-SPL is a standalone application which will load the U-boot in the
main memory.
2) After doing the clock
Hi Vaibhav,
On Tuesday 01 March 2011 07:54 PM, Bedia, Vaibhav wrote:
Aneesh,
On Monday, February 28, 2011 5:16 PM, V, Aneesh wrote:
From: John Rigbyjohn.ri...@linaro.org
Signed-off-by: John Rigbyjohn.ri...@linaro.org
---
common/image.c|1 +
include/image.h |1 +
Hi Vaibhav,
On Friday 04 March 2011 10:57 AM, Bedia, Vaibhav wrote:
Aneesh,
On Tuesday, March 01, 2011 8:34 PM, Bedia, Vaibhav wrote:
On Tuesday, March 01, 2011 8:20 PM, V, Aneesh wrote:
For OMAP4:
1. An 8 byte GP header is enough for booting from external
MMC FAT partition
2. A
On Tuesday 08 March 2011 03:42 PM, Po-Yu Chuang wrote:
Hi Aneesh,
[snip ..]
+ __flash_image_end = .;
+
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
There is a patch series which makes _end as end of image and
has been applied
make default implementation of cache_flush() weakly linked so that
sub-architectures can override it
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/lib/cache.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index
signature of flush_cache in cache.c
* More descriptive commit message for the PL310 support patch
* C struct for PL310 register accesses
* Fixed white space issues
Aneesh V (10):
arm: make default implementation of cache_flush() weakly linked
armv7: add miscellaneous utility macros
armv7: cache
add utility macros for:
* bit field operations
* log2n functions
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/include/asm/utils.h | 80 ++
1 files changed, 80 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/utils.h
diff
adapt s5pc1xx to the new layered cache maintenance framework
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/s5pc1xx/cache.S| 88 ++---
arch/arm/include/asm/arch-s5pc1xx/sys_proto.h |3 -
2 files changed, 7 insertions(+), 84 deletions(-)
diff
issues.
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/lib/cache-cp15.c |9 +++--
arch/arm/lib/cache.c | 11 +++
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index fd97c45..b1ccc3c 100644
--- a/arch/arm
- Enable I-cache on bootup
- Enable MMU and D-cache immediately after relocation
- Do necessary initialization before enabling d-cache and MMU
- Changes to cleanup_before_linux()
- Make changes according to the new framework
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu
replace all occurences of CONFIG_L2_OFF with a more appropriate
CONFIG_SYS_NO_L2CACHE
CONFIG_SYS_NO_L2CACHE has been chosen to be in line with
CONFIG_SYS_NO_ICACHE and CONFIG_SYS_NO_DCACHE
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/cpu.c|6 +-
include
adapt omap3 to the new layered cache maintenance framework
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap3/Makefile |1 -
arch/arm/cpu/armv7/omap3/board.c| 138 --
arch/arm/cpu/armv7/omap3/cache.S| 263
:
- Invalidate entire I-cache
- Add maintenance functions for TLB, branch predictor array etc.
- Enable -march=armv7-a so that armv7 assembly instructions can be
used
Signed-off-by: Aneesh V ane...@ti.com
---
README|5 +
arch/arm/cpu/armv7/Makefile |2
adapt omap4 to the new layered cache maintenance framework
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap4/lowlevel_init.S| 18 ++
arch/arm/include/asm/arch-omap4/sys_proto.h |1 -
include/configs/omap4_panda.h |8 +---
include
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