sync up mux settings with the latest in x-loader

Signed-off-by: Aneesh V <ane...@ti.com>
---
 board/ti/panda/panda_mux_data.h     |   89 ++++++++++++++++++-----------------
 board/ti/sdp4430/sdp4430_mux_data.h |   29 ++++++-----
 2 files changed, 61 insertions(+), 57 deletions(-)

diff --git a/board/ti/panda/panda_mux_data.h b/board/ti/panda/panda_mux_data.h
index 8bb7fe5..16cc0ad 100644
--- a/board/ti/panda/panda_mux_data.h
+++ b/board/ti/panda/panda_mux_data.h
@@ -23,11 +23,9 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
+#ifndef _SDP4430_MUX_DATA_H
+#define _SDP4430_MUX_DATA_H
 
-#ifndef _PANDA_MUX_DATA_H_
-#define _PANDA_MUX_DATA_H_
-
-#include <asm/io.h>
 #include <asm/arch/mux_omap4.h>
 
 const struct pad_conf_entry core_padconf_array_non_essential[] = {
@@ -45,7 +43,7 @@ const struct pad_conf_entry 
core_padconf_array_non_essential[] = {
        {GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},        /* 
kpd_row7 */
        {GPMC_A20, (IEN | M3)},                                         /* 
gpio_44 */
        {GPMC_A21, (M3)},                                               /* 
gpio_45 */
-       {GPMC_A22, (M3)},                                               /* 
gpio_46 */
+       {GPMC_A22, (OFF_EN | OFF_PD | OFF_IN | M1)},                    /* 
kpd_col6 */
        {GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)},                    /* 
kpd_col7 */
        {GPMC_A24, (PTD | M3)},                                         /* 
gpio_48 */
        {GPMC_A25, (PTD | M3)},                                         /* 
gpio_49 */
@@ -59,9 +57,9 @@ const struct pad_conf_entry 
core_padconf_array_non_essential[] = {
        {GPMC_NBE0_CLE, (M3)},                                          /* 
gpio_59 */
        {GPMC_NBE1, (PTD | M3)},                                        /* 
gpio_60 */
        {GPMC_WAIT0, (PTU | IEN | M3)},                                 /* 
gpio_61 */
-       {GPMC_WAIT1,  (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},      /* 
gpio_62 */
+       {GPMC_WAIT1, (IEN | M3)},                                       /* 
gpio_62 */
        {C2C_DATA11, (PTD | M3)},                                       /* 
gpio_100 */
-       {C2C_DATA12, (PTU | IEN | M3)},                                 /* 
gpio_101 */
+       {C2C_DATA12, (M1)},                                             /* 
dsi1_te0 */
        {C2C_DATA13, (PTD | M3)},                                       /* 
gpio_102 */
        {C2C_DATA14, (M1)},                                             /* 
dsi2_te0 */
        {C2C_DATA15, (PTD | M3)},                                       /* 
gpio_104 */
@@ -86,14 +84,14 @@ const struct pad_conf_entry 
core_padconf_array_non_essential[] = {
        {CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},            /* 
cam_shutter */
        {CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},             /* 
cam_strobe */
        {CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},  /* 
gpio_83 */
-       {USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* 
usbb1_ulpiphy_clk */
-       {USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)},               /* 
usbb1_ulpiphy_stp */
-       {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},     /* 
usbb1_ulpiphy_dir */
-       {USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},     /* 
usbb1_ulpiphy_nxt */
-       {USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat0 */
-       {USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat1 */
-       {USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat2 */
-       {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat3 */
+       {USBB1_ULPITLL_CLK, (IEN | OFF_EN | OFF_IN | M1)},              /* 
hsi1_cawake */
+       {USBB1_ULPITLL_STP, (IEN | OFF_EN | OFF_IN | M1)},              /* 
hsi1_cadata */
+       {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_IN | M1)},              /* 
hsi1_caflag */
+       {USBB1_ULPITLL_NXT, (OFF_EN | M1)},                             /* 
hsi1_acready */
+       {USBB1_ULPITLL_DAT0, (OFF_EN | M1)},                            /* 
hsi1_acwake */
+       {USBB1_ULPITLL_DAT1, (OFF_EN | M1)},                            /* 
hsi1_acdata */
+       {USBB1_ULPITLL_DAT2, (OFF_EN | M1)},                            /* 
hsi1_acflag */
+       {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_IN | M1)},             /* 
hsi1_caready */
        {USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat4 */
        {USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat5 */
        {USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat6 */
@@ -106,8 +104,8 @@ const struct pad_conf_entry 
core_padconf_array_non_essential[] = {
        {ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)},             /* 
abe_mcbsp2_dr */
        {ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)},                   /* 
abe_mcbsp2_dx */
        {ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},        /* 
abe_mcbsp2_fsx */
-       {ABE_MCBSP1_CLKX, (IEN | M1)},                                  /* 
abe_slimbus1_clock */
-       {ABE_MCBSP1_DR, (IEN | M1)},                                    /* 
abe_slimbus1_data */
+       {ABE_MCBSP1_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},       /* 
abe_mcbsp1_clkx */
+       {ABE_MCBSP1_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)},             /* 
abe_mcbsp1_dr */
        {ABE_MCBSP1_DX, (OFF_EN | OFF_OUT_PTD | M0)},                   /* 
abe_mcbsp1_dx */
        {ABE_MCBSP1_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},        /* 
abe_mcbsp1_fsx */
        {ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* 
abe_pdm_ul_data */
@@ -143,7 +141,7 @@ const struct pad_conf_entry 
core_padconf_array_non_essential[] = {
        {MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},      /* 
mcspi4_cs0 */
        {UART4_RX, (IEN | M0)},                                         /* 
uart4_rx */
        {UART4_TX, (M0)},                                               /* 
uart4_tx */
-       {USBB2_ULPITLL_CLK, (IEN | M3)},                                /* 
gpio_157 */
+       {USBB2_ULPITLL_CLK, (PTD | IEN | M3)},                          /* 
gpio_157 */
        {USBB2_ULPITLL_STP, (IEN | M5)},                                /* 
dispc2_data23 */
        {USBB2_ULPITLL_DIR, (IEN | M5)},                                /* 
dispc2_data22 */
        {USBB2_ULPITLL_NXT, (IEN | M5)},                                /* 
dispc2_data21 */
@@ -157,12 +155,12 @@ const struct pad_conf_entry 
core_padconf_array_non_essential[] = {
        {USBB2_ULPITLL_DAT7, (IEN | M5)},                               /* 
dispc2_data11 */
        {USBB2_HSIC_DATA, (PTD | OFF_EN | OFF_OUT_PTU | M3)},           /* 
gpio_169 */
        {USBB2_HSIC_STROBE, (PTD | OFF_EN | OFF_OUT_PTU | M3)},         /* 
gpio_170 */
-       {UNIPRO_TX0, (PTD | IEN | M3)},                                 /* 
gpio_171 */
+       {UNIPRO_TX0, (OFF_EN | OFF_PD | OFF_IN | M1)},                  /* 
kpd_col0 */
        {UNIPRO_TY0, (OFF_EN | OFF_PD | OFF_IN | M1)},                  /* 
kpd_col1 */
        {UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)},                  /* 
kpd_col2 */
        {UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)},                  /* 
kpd_col3 */
-       {UNIPRO_TX2, (PTU | IEN | M3)},                                 /* 
gpio_0 */
-       {UNIPRO_TY2, (PTU | IEN | M3)},                                 /* 
gpio_1 */
+       {UNIPRO_TX2, (OFF_EN | OFF_PD | OFF_IN | M1)},                  /* 
kpd_col4 */
+       {UNIPRO_TY2, (OFF_EN | OFF_PD | OFF_IN | M1)},                  /* 
kpd_col5 */
        {UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},      /* 
kpd_row0 */
        {UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},      /* 
kpd_row1 */
        {UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},      /* 
kpd_row2 */
@@ -173,13 +171,13 @@ const struct pad_conf_entry 
core_padconf_array_non_essential[] = {
        {USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},          /* 
usba0_otg_dp */
        {USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},          /* 
usba0_otg_dm */
        {FREF_CLK1_OUT, (M0)},                                          /* 
fref_clk1_out */
-       {FREF_CLK2_OUT, (PTU | IEN | M3)},                              /* 
gpio_182 */
+       {FREF_CLK2_OUT, (M0)},                                          /* 
fref_clk2_out */
        {SYS_NIRQ1, (PTU | IEN | M0)},                                  /* 
sys_nirq1 */
-       {SYS_NIRQ2, (PTU | IEN | M0)},                                  /* 
sys_nirq2 */
+       {SYS_NIRQ2, (M7)},                                              /* 
sys_nirq2 */
        {SYS_BOOT0, (PTU | IEN | M3)},                                  /* 
gpio_184 */
        {SYS_BOOT1, (M3)},                                              /* 
gpio_185 */
        {SYS_BOOT2, (PTD | IEN | M3)},                                  /* 
gpio_186 */
-       {SYS_BOOT3, (M3)},                                              /* 
gpio_187 */
+       {SYS_BOOT3, (PTD | IEN | M3)},                                  /* 
gpio_187 */
        {SYS_BOOT4, (M3)},                                              /* 
gpio_188 */
        {SYS_BOOT5, (PTD | IEN | M3)},                                  /* 
gpio_189 */
        {DPM_EMU0, (IEN | M0)},                                         /* 
dpm_emu0 */
@@ -205,25 +203,28 @@ const struct pad_conf_entry 
core_padconf_array_non_essential[] = {
 };
 
 const struct pad_conf_entry wkup_padconf_array_non_essential[] = {
-       {PAD0_SIM_IO, (IEN | M0)},                                      /* 
sim_io */
-       {PAD1_SIM_CLK, (M0)},                                           /* 
sim_clk */
-       {PAD0_SIM_RESET, (M0)},                                         /* 
sim_reset */
-       {PAD1_SIM_CD, (PTU | IEN | M0)},                                /* 
sim_cd */
-       {PAD0_SIM_PWRCTRL, (M0)},                                       /* 
sim_pwrctrl */
-       {PAD1_FREF_XTAL_IN, (M0)},                                      /* # */
-       {PAD0_FREF_SLICER_IN, (M0)},                                    /* 
fref_slicer_in */
-       {PAD1_FREF_CLK_IOREQ, (M0)},                                    /* 
fref_clk_ioreq */
-       {PAD0_FREF_CLK0_OUT, (M2)},                                     /* 
sys_drm_msecure */
-       {PAD1_FREF_CLK3_REQ, (M3)},                                     /* 
gpio_wk30 */
-       {PAD0_FREF_CLK3_OUT, (M0)},                                     /* 
fref_clk3_out */
-       {PAD1_FREF_CLK4_REQ, (PTU | OFF_EN | OFF_OUT_PTU | M3)},        /* led 
status_1 */
-       {PAD0_FREF_CLK4_OUT, (PTU | OFF_EN | OFF_OUT_PTU | M3)},        /* led 
status_2 */
-       {PAD0_SYS_NRESPWRON, (M0)},                                     /* 
sys_nrespwron */
-       {PAD1_SYS_NRESWARM, (M0)},                                      /* 
sys_nreswarm */
-       {PAD0_SYS_PWR_REQ, (PTU | M0)},                                 /* 
sys_pwr_req */
-       {PAD1_SYS_PWRON_RESET, (M3)},                                   /* 
gpio_wk29 */
-       {PAD0_SYS_BOOT6, (IEN | M3)},                                   /* 
gpio_wk9 */
-       {PAD1_SYS_BOOT7, (IEN | M3)},                                   /* 
gpio_wk10 */
+       {PAD0_SIM_IO, (IEN | M0)},              /* sim_io */
+       {PAD1_SIM_CLK, (M0)},                   /* sim_clk */
+       {PAD0_SIM_RESET, (M0)},                 /* sim_reset */
+       {PAD1_SIM_CD, (PTU | IEN | M0)},        /* sim_cd */
+       {PAD0_SIM_PWRCTRL, (M0)},               /* sim_pwrctrl */
+       {PAD1_FREF_XTAL_IN, (M0)},              /* # */
+       {PAD0_FREF_SLICER_IN, (M0)},            /* fref_slicer_in */
+       {PAD1_FREF_CLK_IOREQ, (M0)},            /* fref_clk_ioreq */
+       {PAD0_FREF_CLK0_OUT, (M2)},             /* sys_drm_msecure */
+       {PAD1_FREF_CLK3_REQ, (PTU | IEN | M0)}, /* # */
+       {PAD0_FREF_CLK3_OUT, (M0)},             /* fref_clk3_out */
+       {PAD1_FREF_CLK4_REQ, (PTU | IEN | M0)}, /* # */
+       {PAD0_FREF_CLK4_OUT, (M0)},             /* # */
+       {PAD0_SYS_NRESPWRON, (M0)},             /* sys_nrespwron */
+       {PAD1_SYS_NRESWARM, (M0)},              /* sys_nreswarm */
+       {PAD0_SYS_PWR_REQ, (PTU | M0)},         /* sys_pwr_req */
+       {PAD1_SYS_PWRON_RESET, (M3)},           /* gpio_wk29 */
+       {PAD0_SYS_BOOT6, (IEN | M3)},           /* gpio_wk9 */
+       {PAD1_SYS_BOOT7, (IEN | M3)},           /* gpio_wk10 */
+       {PAD1_FREF_CLK3_REQ, (M3)},             /* gpio_wk30 */
+       {PAD1_FREF_CLK4_REQ, (M3)},             /* gpio_wk7 */
+       {PAD0_FREF_CLK4_OUT, (M3)},             /* gpio_wk8 */
 };
 
-#endif /* _PANDA_MUX_DATA_H_ */
+#endif /* _SDP4430_MUX_DATA_H */
diff --git a/board/ti/sdp4430/sdp4430_mux_data.h 
b/board/ti/sdp4430/sdp4430_mux_data.h
index e6081dc..16cc0ad 100644
--- a/board/ti/sdp4430/sdp4430_mux_data.h
+++ b/board/ti/sdp4430/sdp4430_mux_data.h
@@ -84,14 +84,14 @@ const struct pad_conf_entry 
core_padconf_array_non_essential[] = {
        {CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},            /* 
cam_shutter */
        {CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},             /* 
cam_strobe */
        {CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},  /* 
gpio_83 */
-       {USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* 
usbb1_ulpiphy_clk */
-       {USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)},               /* 
usbb1_ulpiphy_stp */
-       {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},     /* 
usbb1_ulpiphy_dir */
-       {USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},     /* 
usbb1_ulpiphy_nxt */
-       {USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat0 */
-       {USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat1 */
-       {USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat2 */
-       {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat3 */
+       {USBB1_ULPITLL_CLK, (IEN | OFF_EN | OFF_IN | M1)},              /* 
hsi1_cawake */
+       {USBB1_ULPITLL_STP, (IEN | OFF_EN | OFF_IN | M1)},              /* 
hsi1_cadata */
+       {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_IN | M1)},              /* 
hsi1_caflag */
+       {USBB1_ULPITLL_NXT, (OFF_EN | M1)},                             /* 
hsi1_acready */
+       {USBB1_ULPITLL_DAT0, (OFF_EN | M1)},                            /* 
hsi1_acwake */
+       {USBB1_ULPITLL_DAT1, (OFF_EN | M1)},                            /* 
hsi1_acdata */
+       {USBB1_ULPITLL_DAT2, (OFF_EN | M1)},                            /* 
hsi1_acflag */
+       {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_IN | M1)},             /* 
hsi1_caready */
        {USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat4 */
        {USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat5 */
        {USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},    /* 
usbb1_ulpiphy_dat6 */
@@ -104,8 +104,8 @@ const struct pad_conf_entry 
core_padconf_array_non_essential[] = {
        {ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)},             /* 
abe_mcbsp2_dr */
        {ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)},                   /* 
abe_mcbsp2_dx */
        {ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},        /* 
abe_mcbsp2_fsx */
-       {ABE_MCBSP1_CLKX, (IEN | M1)},                                  /* 
abe_slimbus1_clock */
-       {ABE_MCBSP1_DR, (IEN | M1)},                                    /* 
abe_slimbus1_data */
+       {ABE_MCBSP1_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},       /* 
abe_mcbsp1_clkx */
+       {ABE_MCBSP1_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)},             /* 
abe_mcbsp1_dr */
        {ABE_MCBSP1_DX, (OFF_EN | OFF_OUT_PTD | M0)},                   /* 
abe_mcbsp1_dx */
        {ABE_MCBSP1_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},        /* 
abe_mcbsp1_fsx */
        {ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* 
abe_pdm_ul_data */
@@ -141,7 +141,7 @@ const struct pad_conf_entry 
core_padconf_array_non_essential[] = {
        {MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},      /* 
mcspi4_cs0 */
        {UART4_RX, (IEN | M0)},                                         /* 
uart4_rx */
        {UART4_TX, (M0)},                                               /* 
uart4_tx */
-       {USBB2_ULPITLL_CLK, (IEN | M3)},                                /* 
gpio_157 */
+       {USBB2_ULPITLL_CLK, (PTD | IEN | M3)},                          /* 
gpio_157 */
        {USBB2_ULPITLL_STP, (IEN | M5)},                                /* 
dispc2_data23 */
        {USBB2_ULPITLL_DIR, (IEN | M5)},                                /* 
dispc2_data22 */
        {USBB2_ULPITLL_NXT, (IEN | M5)},                                /* 
dispc2_data21 */
@@ -173,11 +173,11 @@ const struct pad_conf_entry 
core_padconf_array_non_essential[] = {
        {FREF_CLK1_OUT, (M0)},                                          /* 
fref_clk1_out */
        {FREF_CLK2_OUT, (M0)},                                          /* 
fref_clk2_out */
        {SYS_NIRQ1, (PTU | IEN | M0)},                                  /* 
sys_nirq1 */
-       {SYS_NIRQ2, (PTU | IEN | M0)},                                  /* 
sys_nirq2 */
+       {SYS_NIRQ2, (M7)},                                              /* 
sys_nirq2 */
        {SYS_BOOT0, (PTU | IEN | M3)},                                  /* 
gpio_184 */
        {SYS_BOOT1, (M3)},                                              /* 
gpio_185 */
        {SYS_BOOT2, (PTD | IEN | M3)},                                  /* 
gpio_186 */
-       {SYS_BOOT3, (M3)},                                              /* 
gpio_187 */
+       {SYS_BOOT3, (PTD | IEN | M3)},                                  /* 
gpio_187 */
        {SYS_BOOT4, (M3)},                                              /* 
gpio_188 */
        {SYS_BOOT5, (PTD | IEN | M3)},                                  /* 
gpio_189 */
        {DPM_EMU0, (IEN | M0)},                                         /* 
dpm_emu0 */
@@ -222,6 +222,9 @@ const struct pad_conf_entry 
wkup_padconf_array_non_essential[] = {
        {PAD1_SYS_PWRON_RESET, (M3)},           /* gpio_wk29 */
        {PAD0_SYS_BOOT6, (IEN | M3)},           /* gpio_wk9 */
        {PAD1_SYS_BOOT7, (IEN | M3)},           /* gpio_wk10 */
+       {PAD1_FREF_CLK3_REQ, (M3)},             /* gpio_wk30 */
+       {PAD1_FREF_CLK4_REQ, (M3)},             /* gpio_wk7 */
+       {PAD0_FREF_CLK4_OUT, (M3)},             /* gpio_wk8 */
 };
 
 #endif /* _SDP4430_MUX_DATA_H */
-- 
1.7.0.4

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