On Friday 14 March 2008, Dave Littell wrote:
> I'm working on an AMCC PPC440EPx platform that is similar to the AMCC
> Sequoia under U-Boot 1.3.1. I've copied the Sequoia board and
> configuration as a starting point, but I've run into a problem with the
> size of the flash-based portion of U-Boot
Hello,
Your following question has been entered into our system with SR#1-427611553
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-Original Message-
From: 郭劲 [mailto:[EMAIL PROTECTED]
Sent: 2008年3月14日 9:41 AM
To: Grant Likely
Cc: Support Cu
Hi,friends,
I¡¡made follow define on my MPC8360EMDS.h file. Is it enough? The uboot still
did
not fill the zero frequency on dtb. I think the ft_cpu_setup and ft_board_setup
function have been run.
/* pass open firmware flat tree */
#define CONFIG_OF_FLAT_TREE 1
#define CONFIG_OF_B
Hi all,
I'm working on an AMCC PPC440EPx platform that is similar to the AMCC
Sequoia under U-Boot 1.3.1. I've copied the Sequoia board and
configuration as a starting point, but I've run into a problem with the
size of the flash-based portion of U-Boot. I've added code to
initdram() that result
Hello,
I am new to u-boot code, but there seem to be different versions
of "udc_endpoint_write" in drivers/usb/usbdcore_mpc8xx.c and drivers/usb/
usbdcore_omap1510.c.
Trying the configuration for OMAP 1510 with USB tty, the compiler
complains 'usbtty.c:1057: error: void value not ignored as it o
On 08:53 Thu 28 Feb , Tor Krill wrote:
> Signed-off-by: Tor Krill <[EMAIL PROTECTED]>
> ---
> README|1 +
> drivers/rtc/Makefile |1 +
> drivers/rtc/isl1208.c | 176
> +
> 3 files changed, 178 insertions(+), 0 deletions
hi5 Freunde-Anfrage von Veronica Lee
Hallo h,
Ich möchte, dass du an meinem hi5 Freunde-Netzwerk teilnimmst. Du musst bestätigen, dass wir Freunde sind, dann können wir beide neue Leute kennen lernen. Bitte nimm meine Anfrage an oder lehne sie ab, indem du die hi5 We
Yes i am where that there is no NAND controller so did that already and i
see stuff happing on my scope. I thought that i was missing something for
this flash chip.
I am attaching my nand controllor code could any body tell me if i am
missing something for the 405EP i am new to the 405EP processor
On Thursday 13 March 2008, Pawel Pastuszak wrote:
> I trying to get nand flashing working for powerpc 405ep, i am currently
> having some problem with read and writing to the flash. I was wondering if
> anybody got the MT29F2G08 flash working.
Sure. It's working on multiple 405EP implementation I
On Thu, Mar 13, 2008 at 9:31 AM, 郭劲 <[EMAIL PROTECTED]> wrote:
> Hi,friends,
>
> I make all the frequency(timebase-frequency;bus-frequency;clock-frequency)
> value
> on device tree file equal to zero, I think those frequency will filled by
> u-boot
> during bootm, but in fact, the u-boot did n
Hi Guys,
I trying to get nand flashing working for powerpc 405ep, i am currently
having some problem with read and writing to the flash. I was wondering if
anybody got the MT29F2G08 flash working.
Pawel.
-
This SF.net email
On Thu, Mar 13, 2008 at 11:05 AM, Andre Schwarz
<[EMAIL PROTECTED]> wrote:
>
> it fails - but not silently. If you don't care for the error messages on
> the console you don't need it.
> I don't like _any_ error message :-)
>
> After all it's not a board specific #ifdef ...
Okay then.
Acked-by
Grant Likely schrieb:
On Thu, Mar 13, 2008 at 6:50 AM, André Schwarz
<[EMAIL PROTECTED]> wrote:
include fec specific nodes in ft_cpu_setup only if CONFIG_MPC5xxx_FEC is
defined. Systems without FEC, i.e. no fec node in dtb, should be possible.
Signed-off-by: Andre Schwarz <[EMAIL PROTECTE
On Thu, Mar 13, 2008 at 6:50 AM, André Schwarz
<[EMAIL PROTECTED]> wrote:
> include fec specific nodes in ft_cpu_setup only if CONFIG_MPC5xxx_FEC is
> defined. Systems without FEC, i.e. no fec node in dtb, should be possible.
>
> Signed-off-by: Andre Schwarz <[EMAIL PROTECTED]>
Hmm; if there is
In message <[EMAIL PROTECTED]> you wrote:
>
> > /* return dramsize + dramsize2; */
> Do we need to keep it?
Probably not on the current hardware configuration; maybe the next one
will use two banks of RAM.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk &
>
> And what's your MAC address ("ethaddr" variable) ?
>
> Best regards,
>
> Wolfgang Denk
>
It's the default value "00:e0:0c:bc:e5:60". I also tried "setenv ethaddr
00:cf:52:72:c3:01", and got the same result.
FYI,
-> printenv
bootdelay=5
baudrate=19200
netmask=255.255.255.0
hostname=M5272C
On Thu, 2008-03-13 at 10:54, Richard Parsons wrote:
> Hi All,
>
> I have the MPC8323EMDS board and trying to get the FDT working - well
> trying to understand it.
>
> After all the loading, u-boot gives the error and then resets.
>
> WARNING: could not set linux,stdout-path FDT_ERR_NOTFOUND
>
>
On 14:33 Thu 13 Mar , Wolfgang Denk wrote:
> Signed-off-by: Wolfgang Denk <[EMAIL PROTECTED]>
> ---
> board/hmi1001/hmi1001.c | 18 ++
> 1 files changed, 18 insertions(+), 0 deletions(-)
>
> diff --git a/board/hmi1001/hmi1001.c b/board/hmi1001/hmi1001.c
> index 9fa0e74..3ecb
On 16:44 Thu 13 Mar , Anton Vorontsov wrote:
> On Wed, Mar 12, 2008 at 11:54:39PM +0100, Jean-Christophe PLAGNIOL-VILLARD
> wrote:
> > On 18:07 Fri 07 Mar , Anton Vorontsov wrote:
> > > This patch adds few routines to configure serdes on 837x targets.
> > >
> > > Signed-off-by: Anton Voro
Hi All,
I have the MPC8323EMDS board and trying to get the FDT working - well
trying to understand it.
After all the loading, u-boot gives the error and then resets.
WARNING: could not set linux,stdout-path FDT_ERR_NOTFOUND
The mpc8323xemds config file show that this is linked to an /aliases
so
On Sun, 09 Mar 2008 18:07:58 +0100
Wolfgang Denk <[EMAIL PROTECTED]> wrote:
> Developers with the most changesets
> Haavard Skinnemoen 28 (3.3%)
> Top changeset contributors by employer
> DENX 295 (34.4%)
> Freescale 208 (24.2%)
> (Unknown)
Hi,friends,
I make all the frequency(timebase-frequency;bus-frequency;clock-frequency) value
on device tree file equal to zero, I think those frequency will filled by u-boot
during bootm, but in fact, the u-boot did not fill any frequency. after bootm,
crashed. Why?
Why so many document point out
In message <[EMAIL PROTECTED]> you wrote:
> Hi, I built u-boot 1.3.2 for my new M5272C3.
> Everything looks fine. I can program the u-boot image
> into M5272C3, and then boot into u-boot, but I cannot
> see the Ethernet interface working. I set the
> environment variables of U-Boot as below,
>
> -
Hi, I built u-boot 1.3.2 for my new M5272C3.
Everything looks fine. I can program the u-boot image
into M5272C3, and then boot into u-boot, but I cannot
see the Ethernet interface working. I set the
environment variables of U-Boot as below,
-> setenv ipaddr 192.168.1.22
-> setenv serverip 192.168.
On Wed, Mar 12, 2008 at 11:54:39PM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
> On 18:07 Fri 07 Mar , Anton Vorontsov wrote:
> > This patch adds few routines to configure serdes on 837x targets.
> >
> > Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
> > ---
> > cpu/mpc83xx/Makefile |
Signed-off-by: Wolfgang Denk <[EMAIL PROTECTED]>
---
board/hmi1001/hmi1001.c | 18 ++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/board/hmi1001/hmi1001.c b/board/hmi1001/hmi1001.c
index 9fa0e74..3ecb74a 100644
--- a/board/hmi1001/hmi1001.c
+++ b/board/hmi1001/
This board never used a MGT5100 processor.
Signed-off-by: Wolfgang Denk <[EMAIL PROTECTED]>
---
board/tqm5200/tqm5200.c | 56 ---
1 files changed, 0 insertions(+), 56 deletions(-)
diff --git a/board/tqm5200/tqm5200.c b/board/tqm5200/tqm5200.c
index 3
Bartlomiej Sieka wrote:
> Daniel Hellstrom wrote:
>
>> This patch adds support for SPARC u-boot images to bootm. The
>> IH_CPU_SPARC
>> indentifier in the image header is recognized. The IH_CPU_SPARC
>> indentifier
>> has already been implemented in mkimage.
>
>
> Hello Daniel,
>
> Could you pro
Wolfgang Denk wrote:
>In message <[EMAIL PROTECTED]> you wrote:
>
>
>>This patch adds an U-Boot command, ambapp, which prints a summary
>>of AMBA Bus Plug & Play information.
>>
>>
>...
>
>
>>diff --git a/common/Makefile b/common/Makefile
>>index a88d1ef..3d369ff 100644
>>--- a/common/Make
include fec specific nodes in ft_cpu_setup only if CONFIG_MPC5xxx_FEC is
defined. Systems without FEC, i.e. no fec node in dtb, should be possible.
Signed-off-by: Andre Schwarz <[EMAIL PROTECTED]>
---
MATRIX VISION GmbH, Talstraße 16, DE-71570 Oppenweiler - Registergericht:
Amtsgericht Stut
On 10:39 Thu 13 Mar , Daniel Hellstrom wrote:
> This patch adds an U-Boot command, ambapp, which prints a summary
> of AMBA Bus Plug & Play information.
>
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 0211
On 10:39 Thu 13 Mar , Daniel Hellstrom wrote:
> GRETH is an Ethernet 10/100 or 10/100/1000 MAC with out without
> a debug link (EDCL). The GRETH core is documented in GRIP.pdf
> available at www.gaisler.com.
>
> If the GRETH has GigaBit support (GBIT, Scatter gather, checksum
> offloading etc.
On 2/28/2008, "Tor Krill" <[EMAIL PROTECTED]> wrote:
>Signed-off-by: Tor Krill <[EMAIL PROTECTED]>
>---
> README|1 +
> drivers/rtc/Makefile |1 +
> drivers/rtc/isl1208.c | 176
---8<---
Any comments? Maybe i sent it before the merge window opened and thus got
no fe
Daniel Hellstrom wrote:
> This patch adds support for SPARC u-boot images to bootm. The IH_CPU_SPARC
> indentifier in the image header is recognized. The IH_CPU_SPARC indentifier
> has already been implemented in mkimage.
Hello Daniel,
Could you provide a patch that adds IH_CPU_SPARC support in t
In message <[EMAIL PROTECTED]> you wrote:
> This patch adds support for three LEON3 boards:
> * GR-XC3S-1500 (Low cost Xilinx Spartan FPGA board)
> * GR-CPCI-AX2000 (AX system with switchable AX FPGA)
> * ALTERA NIOS Development board, Stratix II edition
>
> The simulators GRSIM and TSIM for LE
In message <[EMAIL PROTECTED]> you wrote:
> GRETH is an Ethernet 10/100 or 10/100/1000 MAC with out without
> a debug link (EDCL). The GRETH core is documented in GRIP.pdf
> available at www.gaisler.com.
>
> If the GRETH has GigaBit support (GBIT, Scatter gather, checksum
> offloading etc.) can be
In message <[EMAIL PROTECTED]> you wrote:
> This patch makes SPARC/LEON processors able to read and write
> to the SMC9 chip using the chip external I/O bus of the memory
> controller. This patchs defines the standard in and out macros
> expected by the SMC9111 driver.
>
> To access that I/O b
In message <[EMAIL PROTECTED]> you wrote:
> This patch adds support for the U-Boot command 'bdinfo' for SPARC boards,
> the output is as shown below.
...
> diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
> index bbb0192..838c103 100644
> --- a/common/cmd_bdinfo.c
> +++ b/common/cmd_bdinfo.c
In message <[EMAIL PROTECTED]> you wrote:
> This patch adds an U-Boot command, ambapp, which prints a summary
> of AMBA Bus Plug & Play information.
...
> diff --git a/common/Makefile b/common/Makefile
> index a88d1ef..3d369ff 100644
> --- a/common/Makefile
> +++ b/common/Makefile
> @@ -91,6 +91,7
In message <[EMAIL PROTECTED]> you wrote:
> This patch adds support for SPARC/LEON2 and SPARC/LEON3 to
> U-Boot. LEON2/3 boards are added with an extra patch, this
> patch must be applied first (before 8_sparc_boards.patch).
All your code needs a major coding style cleanup.
There are tons of trai
In message <[EMAIL PROTECTED]> you wrote:
> For current SPARC architectures (LEON2 and LEON3) each read from the
> FLASH must lead to a cache miss. This is because FLASH can not be set
> non-cacheable since program code resides there, and alternatively disabling
> cache is poor from performance vie
Locker room envy is a thing of the past - with this you'll be the new Alpha Male
http://www.Fantastifives.com/
Hung loose and large-
This SF.net email is sponsored by: Microsoft
Defy all challenges. Microsoft(R) Visual Studio
This patch adds support for three LEON3 boards:
* GR-XC3S-1500 (Low cost Xilinx Spartan FPGA board)
* GR-CPCI-AX2000 (AX system with switchable AX FPGA)
* ALTERA NIOS Development board, Stratix II edition
The simulators GRSIM and TSIM for LEON2 and LEON3 has
been added as a board. A separate bo
GRETH is an Ethernet 10/100 or 10/100/1000 MAC with out without
a debug link (EDCL). The GRETH core is documented in GRIP.pdf
available at www.gaisler.com.
If the GRETH has GigaBit support (GBIT, Scatter gather, checksum
offloading etc.) can be determined by a bit in the control register.
The GBIT
This patch makes SPARC/LEON processors able to read and write
to the SMC9 chip using the chip external I/O bus of the memory
controller. This patchs defines the standard in and out macros
expected by the SMC9111 driver.
To access that I/O bus one must set up the memory controller
(MCTRL or FTM
This patch adds an U-Boot command, ambapp, which prints a summary
of AMBA Bus Plug & Play information.
AMBA is a bus specified by ARM. AMBA with Plug and Play information
is a Gaisler extension to that bus. See www.gaisler.com.
##
U-Boot 1.3.2-g6bc2ec61-dirty (Mar 12 2008 - 21
This patch adds support for the U-Boot command 'bdinfo' for SPARC boards,
the output is as shown below.
##
U-Boot 1.3.2-gb42c95ff-dirty (Mar 12 2008 - 21:07:56)Gaisler GRSIM
CPU: LEON3
Board: GRSIM/TSIM
Using default environment
In:serial
Out: serial
Err: serial
Net:
This patch adds support for SPARC/LEON2 and SPARC/LEON3 to
U-Boot. LEON2/3 boards are added with an extra patch, this
patch must be applied first (before 8_sparc_boards.patch).
This patch does not support LEON3 SMP system.
Linux for SPARC assumes that there is a Sun Boot prom
available. The boot
For current SPARC architectures (LEON2 and LEON3) each read from the
FLASH must lead to a cache miss. This is because FLASH can not be set
non-cacheable since program code resides there, and alternatively disabling
cache is poor from performance view, or doing a cache flush between each
read
is ev
This patch adds support for SPARC u-boot images to bootm. The IH_CPU_SPARC
indentifier in the image header is recognized. The IH_CPU_SPARC indentifier
has already been implemented in mkimage.
Best Regards,
Daniel Hellstrom
common/cmd_bootm.c |2 ++
1 files changed, 2 insertions(+), 0 deletio
On Thursday 13 March 2008, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > +SOBJS = init.o
> > +
> > +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> > +OBJS := $(addprefix $(obj),$(COBJS))
> > +SOBJS := $(addprefix $(obj),$(SOBJS))
> > + *(.sbss) *(.scommon)
> > + *(.dynbss)
> > +
On Thursday 13 March 2008, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 01:07 Thu 13 Mar , Wolfgang Denk wrote:
> > In message <[EMAIL PROTECTED]> you wrote:
> > > > +SOBJS = start.o init.o resetvec.o
> > > > +COBJS = ddr2_fixed.o nand_boot.o nand_ecc.o ndfc.o
> > >
> > > It will be nice to s
On Thursday 13 March 2008, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 17:15 Tue 11 Mar , Stefan Roese wrote:
> > This patch adds support for the AMCC Canyonlands 460EX evaluation
> > board.
> >
> > Signed-off-by: Stefan Roese <[EMAIL PROTECTED]>
> > +#ifdef CFG_ENV_IS_IN_FLASH
> > +#define
Hi ,
We are using U-Boot-1.1.3 on a custom MPC8349ADS board with 2 PCI buses
configured in Host mode.We have 256 MB DDR2 in our board.
We have connected 8 DSPs on PCI bus 1.
U-Boot is assigning base address for DSPs from 0x8000 to 0x9380.
We are able to access any location from 0x8000
On Thursday 13 March 2008, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 17:15 Tue 11 Mar , Stefan Roese wrote:
> > This patch adds basic support for the AMCC 460EX/460GT PPC's.
> >
> > Signed-off-by: Stefan Roese <[EMAIL PROTECTED]>
> > -#define UIC_UIC1C 0x0001 /* */
> > +#de
HI,friends,
The core frequency and bus frequency and QE frequency on MPC8360 are configed
during the loading of HRCW and the CLKIN or PCI_CLKIN, in the u-boot-1.2.0, I
can
use the "clocks" command to show all kind of frequecy,at this time the core
frequency is 528MHZ. please see follow:
=> clock
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