David Wooff wrote:
It's slightly complicated because my FPGA is effectively a bridge to a
number of hot-pluggable
backplane I/O cards.
This is similar to (e.g.) USB, SPI or I²C. Linux defines Subsystems
for this kind of devices: The complete subsystem bus is accessed by a
definable driver
thiago wrote:
Is there a tool that simulates platforms that I can use to test my
kernel build?
I suppose this depends on the hardware you are intending to have the
Kernel run on. (X86: VMWare, Virtual Box,... ; ARM: Armulator, ...; ...)
-Michael
Michael Schnell wrote:
thiago wrote:
Is there a tool that simulates platforms that I can use to test my
kernel build?
I suppose this depends on the hardware you are intending to have the
Kernel run on. (X86: VMWare, Virtual Box,... ; ARM: Armulator, ...; ...)
See also Qemu, which
yes
Michael Schnell escreveu:
thiago wrote:
Is there a tool that simulates platforms that I can use to test my
kernel build?
I suppose this depends on the hardware you are intending to have the
Kernel run on. (X86: VMWare, Virtual Box,... ; ARM: Armulator, ...; ...)
-Michael
On Sat, Jan 02, 2010 at 11:09:07PM +, Jamie Lokier wrote:
Jun Sun wrote:
+/* [jsun] new gcc 4.x generates ANCHOR symbols in order to reduce the size
+ * of GOT table for PIC code. It is possible the ANCHOR is placed beyond
+ * the end of data/bss segment up to 4K bytes(12 bits), because