The delay is from the time it takes to drain the DMA FIFO. The DMA FIFO
default size is 32 MB. It can be controlled through the property tree or,
if using RFNoC, through the DMA FIFO block control. The time to drain is a
simple function of size and sample rate.
We have been making improvements
Hi all,
I have made another test today, I want to report the results here.
*Issue #1*
I have modified the tx_timed_samples example, simply such that it transmits
on both channels of the X300.
Using a frequency of 1.57542GHz for both channels, I was able to measure on
a scope a time offset of
On 11/09/2018 11:13 AM, Sneha vasan via USRP-users wrote:
I am currently trying to check synchronization of usrp b210 device
using octoclock.
So when I am trying to execute ./test_clock_synch which is included in
examples, I am seeing the following error,
why it is not able to detect
I am currently trying to check synchronization of usrp b210 device using
octoclock.
So when I am trying to execute ./test_clock_synch which is included in
examples, I am seeing the following error,
why it is not able to detect device?
Can anybody tell me how I can do this??
Hi Stephan. Your issue looks similar to one that has been previously
reported. The Hardware Sustaining Engineering team is currently
investigating.
Would it be possible for you to try powering the GPSDO module from a lab
supply instead of plugging it in to the N210 motherboard and checking if
Hi Keith,
If I manage to make it anything more than just a cool idea, the code
definitely will be available publicly.
Best Regards,
Piotr Krysik
W dniu 08.11.2018 o 17:18, Keith k pisze:
> Hello Piotr
>
> I can't answer your question, but I'm wondering if you plan to make
> this project open
