Hello,
On 2024-05-29 11:32 +, je.amg...@gmail.com wrote:
> After developing a C++ program and placing it in
> **`/uhd/host/utils`**, I included it in **`CMakeLists.txt`**. However,
> when attempting to build the program using **`make`** within
> **`/uhd/host/build`**, UHD is reporting that it'
Hi,
On 2024-03-11 15:42 +, edenmclaughlin...@gmail.com wrote:
> We had a need for a multiple device - single subnet setup. After
> updating multiple E320’s to a newer UHD version, me and my colleague,
> we realized that all of the devices share a common MAC address. This
> results in unstable
Hello Pedro,
On 2024-03-06 22:02 +, pav.vie...@gmail.com wrote:
> I'd like to know if you managed to obtain information about the calibration
> process?
I did not.
However, Rob also mentioned that the ports should be left unconnected.
I would recommend to stick with what is written
in the of
Hello Pedro,
On 2024-03-01 17:51 +, pav.vie...@gmail.com wrote:
> in time... the NUMPY vector is of type complex 128 or complex 64.
"fc32" means complex in C/C++. In NumPy, it means np.complex64.
When I load the .npy you provided, I get a np.float64 array.
I have never used the UHD Python API
Hi Hongwei,
On 2024-02-26 10:06 +, zhou wrote:
> For X310 USRPs, you need to loopback connect the antenna ports.
Could you direct me to where you got that info?
I never encountered it, and I am not able to find it in the Ettus docs.
Doing proper calibration is important,
so we should ensure
Hello zhou,
On 2024-02-23 20:44 +, zhou via USRP-users wrote:
> It could be DC leakage. Try to run the calibration commands. For X310, you
> need to loopback connect Tx and Rx antennas with 30dB attenuators.
Do we need to loopback connect the antenna ports?
>From the docs [1]:
UHD software i
Hello Luca,
On 2023-08-08 08:03 +, Bachmaier, Luca wrote:
> I recently installed the UHD 4.3 over my package manager:
> sudo apt install libuhd-dev
>
> When trying to start the RFNoC image builder, I get the following error:
> rfnoc_image_builder -F ~/dev/uhd/fpga -y
On 2023-04-21 14:00 +0100, Ian Chodera wrote:
> Thanks for the replies. Neither of them have helped though
>
> >sudo uhd_find_devices --args 'type=b200'
> No UHD Devices Found
>
> I had in fact already tried both option, having trawled the internet for
> suggestions before joining this list
>Fr
Hi Ian,
On 2023-04-21 13:09 +0100, Ian Chodera wrote:
> I have a problem using a B200-mini on a Ubuntu 20.04 machine
>
> The device is recognised on the USB bus
>
> >lsusb
> Bus 002 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
> Bus 001 Device 008: ID 2500:0021 Ettus Research LLC USRP
Dear Azamat Nassipkaliyev,
On 2023-04-07 09:36 +0600, Azamat Nassipkaliyev wrote:
> I am relatively new to USRP. But I have an USRP X310 and GNU Radio
> installed on Ubuntu 20.04. It was perfectly connected and everything worked
> before. But then GNU Radio gave a message that FPGA versions did no
On 2022-08-04 08:50 -0400, Marcus D. Leech wrote:
> On 2022-08-04 07:59, henry.powell...@gmail.com wrote:
> >
> > Sorry for misunderstanding. I think this is my fault. But as i mentioned
> > my first question, when i say cable connection, i mean i connected tx
> > port to rx port with cable. To se
Hi Henry,
On 2022-08-04 06:05 +, henry.powell...@gmail.com wrote:
> I design a system on GNU Radio with USRP and coded it in Python. I am
> hopping frequency. Then I restart this process. I save all max. value
> at different frequencies. I am sharing datas with you. All data you
> can see in t
On 2022-07-29 18:21 -0400, Marcus D. Leech wrote:
> Well, I'll note that 41.667Msps is NOT a proper fraction of ANY of the 3
> supported master-clock rates:
>
> 125MHz
I think it is, with an odd decimation factor (125/3 = 41.666..),
which is non optimal.
--
Cédric Hannotier
Hi skyung,
On 2022-07-29 20:08 +, skyung--- via USRP-users wrote:
> I am setting up OAI 5G gNB and UE with USRP N310 (connected through
> 1GbE to a desktop with the following CPU:
>
> \- Intel(R) Core(TM) i9-7900X CPU @ 3.30GHz
>
> I tried running a benchmark with uhd (rx/tx_rate 41.667MHz) a
Dear Saurav Roy,
On 2022-07-29 14:26 +, Saurav Roy via USRP-users wrote:
> However, I am stuck at binary installation in Windows.
The binary executable does not seem to provide the Python API.
I think you will have to compile the UHD library
with the python binding enabled on Windows yourself
On 2022-07-26 19:51 +, skyung--- via USRP-users wrote:
> However, it still give me the “ERROR_CODE_OVERFLOW (Out of sequence
> error)”.
>
> Currently, the USRP is connected to the host via switch. Do you think
> I need to configure the switch in any specific way?
If you have a configurable sw
Hi skyung,
On 2022-07-25 20:13 +, skyung--- via USRP-users wrote:
> I did run the “rx_sample_to_file” example but did not get any timeout error.
>
> The following is the part of output I get when I run the OAI UE:
[...]
> \[HW\] RF board max packet size 364, size for 100µs jitter 4608
I n
Hi Marcus,
On 2022-07-11 15:29 -0400, Marcus D Leech wrote:
> Unfortunately this likely
> Means you have broken hardware.
>
> If it was Purchased less than one year ago, send a note to
> supp...@ettus.com for warranty support.
Sorry if I am mistaken,
but the Ettus "Terms and Conditions of Sale
Hi k1barrett,
On 2022-07-11 21:44 +, k1barrett--- via USRP-users wrote:
> I am running ubuntu 22.04. I am trying to build UHD from source using this
> guide here.
>
>
> https://kb.ettus.com/Building_and_Installing_the_USRP_Open-Source_Toolchain_(UHD_and_GNU_Radio)_on_Linux
>
> However, wh
Hi Achilleas,
On 01/06/22 12:31, Achilleas Anastasopoulos wrote:
> I am working with gnuradio and usrps on an ubuntu 20.04
>
> $ lsb_release -a
> No LSB modules are available.
> Distributor ID: Ubuntu
> Description:Ubuntu 20.04.4 LTS
> Release:20.04
> Codename: focal
>
> I usua
On 11/05/22 15:33, Marcus D. Leech wrote:
> On 2022-05-11 15:24, Dobler, Anton wrote:
> > I use a n310 and have two 10gigbit for data streaming and one 1gigbit
> > for managing the device… the strange thing about it is that the example
> > flowgraph with rx radio downconverter and rx streamer works
Hi Rob,
On 01/04/22 16:27, Rob Kossler wrote:
> Thanks Cédric,
> Yes, the CPU is at 100%. I am unfortunately not fluent in python and so I'm
> confused about your suggested non-encrypted transfer. What would I run on
> the N310 and what on the host in order to transfer the file?
On N310, you run
Hi Rob,
On 01/04/22 10:40, Rob Kossler wrote:
> I am trying to copy some large files (~500MB) from the N310 to the host.
> The transfer rate I get using scp or sshfs (mounting in either direction)
> is about 12MB/s. Given that the interface itself can do >100MB/s, I'm
> wondering if there is a fas
On 18/02/22 12:51, sp h wrote:
> On Sun, Feb 13, 2022 at 10:51 AM sp h wrote:
> > How to create the RFNOC block gain for other RFNOC image cores...Default
> > is for X310, but I want to be x300?
> > When I created a new RFNOC module with the below commands, the RFNNOC
> > image core is x310 (my Gn
Hi Tobias,
On 14/02/22 10:31, Tobias Kronauer wrote:
> I built the master branch, [...]
>
> ```bash
> [...]
> [INFO] [MPM.PeriphManager] init() called with device args `fpga=X4_200, [...]
> [...]
> ```
> [...]
> Did I forget something?
>From the log, you are still using X4_200.
AFAIU, you need t
Hi Jean-Michel,
On 07/07/21 12:07, frie...@free.fr wrote:
> why is the multichannel behaviour in a single receiver such as the B210
> different from the single
> channel streaming? I can imagine the different behaviour for networked
> multichannels USRP (e.g.
> X310) but how about the B210?
I
Hi Oscar,
On 06/07/21 01:11, Oscar Pablo wrote:
> assuming i have multi usrp and pc. each usrp connect to different pc.
If each USRP is connected/controlled to a different PC then
they are not under the same multi_usrp block.
Being in the same multi_usrp block means that in the USRP source/sink,
On 03/07/21 00:34, Oscar Pablo wrote:
> this use what time to call .set_time_unknown_pps()?
If you mean which initial value, then it set to 0 [1].
If you mean which time source,
then it depends on the "Mbx: Time Source" block parameter.
> and after sync how to get the timed sync sample and set th
Hi Oscar,
On 02/07/21 13:03, Oscar Pablo wrote:
> i know how to use pps to sync more than one usrps in c++.
> but how to do this in gnuradio.
> i find there is a sync option in the usrp block which contains
> "unknown pps", "pc time" what is unknown pps?
"Unknown PPS" uses multi_usrp.set_time_unk
On 30/06/21 08:17, ZHOU Yuxuan wrote:
> However, when I tried to transmit this frame with 2 USRP N210 I failed
> with console outputting . I guessed it is due to the
> processing power of my PC is not able to support to the sample rate
> (20M sps for each, I guess it is equivalent to 40M to
Hi Marcus,
On 21/05/21 15:42, Cédric Hannotier via USRP-users wrote:
> On 21/05/21 09:00, Marcus D Leech wrote:
> > Have you tried disconnecting the batteries to see if it will start without
> > them?
> I did not. I would have to unscrew and open the enclosure.
> And si
Hi Marcus
On 21/05/21 09:00, Marcus D Leech wrote:
> Have you tried disconnecting the batteries to see if it will start without
> them?
I did not. I would have to unscrew and open the enclosure.
And since I do not know the policy of Ettus & NI,
I would like to avoid the unpleasant:
"your warranty
Dear all,
I bought some E312 lately.
Some weeks ago, one of them died:
- refuse to power on
- the led stays off even after plugging the power supply
I thought it was just an hardware defect.
I was going to request for a repair and move on.
But, yesterday, another one died...
I would like to un
Hi Hua,
On 17/05/21 16:27, Zeng, Huacheng wrote:
> Hi Marcus,
>
> Thank you for the reply. I am using SBX (40MHz) daughterboards for X310.
> For my software setting, I'm not sure what is the best way to present the
> details. So I copied my code below. Hopeful it is not messy for you to
> review
On 23/04/21 05:26, margaux.b...@gmail.com wrote:
> What is the procedure to create a transmitter with a sample rate of
> 61,44
> MHz with the USRP E312 ? I wonder if I am not limited by the sample data
> transfer rate of ARM processor.
As stated by Marcus, you are limited
On 23/04/21 00:32, margaux.b...@gmail.com wrote:
> On 21/04/21 16:28, Cédric Hannotier wrote:
>> On 21/04/21 14:16, Margaux Bougeard wrote:
>>> What is the procedure to create a transmitter with a sample rate of 61,44
>>> MHz with the USRP E312 ? I wonder if I am not limited by the sample data
>>>
On 21/04/21 14:16, Margaux Bougeard wrote:
> What is the procedure to create a transmitter with a sample rate of 61,44
> MHz with the USRP E312 ? I wonder if I am not limited by the sample data
> transfer rate of ARM processor.
As stated by Marcus, you are limited by the ARM processor.
> I want t
Hi Brendan,
On 21/04/21 00:01, Brendan Horsfield wrote:
>> I do not get this part. What do you mean by "reinstalled"?
>> Did you installed GNU Radio from source or from Ubuntu Software?
>> If you download the source, build and install it (following GNU Radio
>> wiki),
>> then you cannot install it
Hi Brendan,
On 20/04/21 22:15, Brendan Horsfield wrote:
> I have verified the installation as follows:
>
> [...]
>- Reinstalled GNU Radio Companion via Ubuntu Software & Updates utility
I do not get this part. What do you mean by "reinstalled"?
Did you installed GNU Radio from source or from
On 20/04/21 16:02, Brendan Horsfield wrote:
> I have reinstalled both UHD and GNU Radio: [...], the
> latter from binaries as recommended on the GNU Radio website.
Do you mean the binaries from your distribution repo
(eg. Ubuntu bionic: https://packages.ubuntu.com/bionic/gnuradio)?
If yes, it ca
Hi Rob,
Thanks for your reply.
On 06/04/21 18:53, Rob Kossler wrote:
> On Tue, Apr 6, 2021 at 12:41 PM Cédric Hannotier via USRP-users <
> usrp-users@lists.ettus.com> wrote:
> > I would like to build a FPGA image with a replay block for E312.
> > However, there is no
Dear all,
I would like to build a FPGA image with a replay block for E312.
However, there is no dram_clk on this device.
How should I instantiate my replay in my .yml?
My modification so far:
diff --git a/fpga/usrp3/top/e31x/e310_rfnoc_image_core.yml
b/fpga/usrp3/top/e31x/e310_rfnoc_image_core.
Hi Christopher,
On 26/03/21 16:29, christopher_beaud...@uml.edu wrote:
> Is anyone else encountering errors from the website when searching through
> the archives?
If you mean mailing list archives, see this:
https://lists.ettus.com/empathy/thread/MMLLWUGPGIX2XZDAJB7HRS5I6SO6UES3
Regards
--
C
Hi Imad,
On 18/03/21 16:16, Imad-Eddine SRAIRI wrote:
> I was trying to access the usrp-users mailing list archive and it seems that
> both links found on this page
> https://kb.ettus.com/Mailing_Lists
> which are:
> https://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
> and
> h
Hi Brian,
On 16/02/21 09:27, Brian Padalino wrote:
> For the sake of the mailing list, can someone post the example to a
> repository somewhere and link to it, so we aren't passing around secret
> helpful documents?
I have uploaded Wade's code there:
https://github.com/f380cedric/UHD4_RFNOC_OOT_I
On 18/02/21 10:27, Cédric Hannotier via USRP-users wrote:
> On 17/02/21 18:39, Marcus Müller via USRP-users wrote:
> > Then, you'll have to add a setter / getter in C++ UHD. That boils down to
> > adding a coercer
> > and getter to the property_tree. Copy existing cod
On 19/02/21 12:20, Rob Kossler via USRP-users wrote:
> Yes, that is my best guess.
Thanks for the solution!
I will update the ticket accordingly.
> Did you try it?
No, I no longer have UHD 4.0, I rolled back to UHD 3.9.
Regards
--
Cédric Hannotier
Hi Rob,
On 19/02/21 09:30, Rob Kossler wrote:
> Yes, I just double-checked and mine is working.
>
> So, I just re-checked your link to issue #406. In "steps to reproduce", I
> noticed 2 things:
>
>- On the next-to-last line, the g++ command does not include your custom
>library and does
Hi Rob,
On 18/02/21 17:32, Rob Kossler wrote:
> I previously did not have the link options correct for building OOT. If
> you look in the CMakeLists.txt file in the Ettus rfnoc example apps folder,
> you will see a link option "-Wl,--no-as-needed". I didn't look into it
> thoroughly, but without
Hi Rob,
On 18/02/21 10:57, Rob Kossler via USRP-users wrote:
> Following our previous discussion on the topic of building the controllers
> in-tree or out-of-tree, I was able to successfully build my controllers
> out-of-tree and they seem to work fine (with my custom application).
OOT blocks wit
Hi Marcus,
On 17/02/21 18:39, Marcus Müller via USRP-users wrote:
> not that hard: you need an instance of settings_register, which you connect
> to the
> appropriate settings bus.
Would you mean 'setting_reg' instead?
There is no instance of 'settings_register' in the fpga-src/usrp3 tree.
> It
Hi Rob,
On 17/02/21 13:38, Rob Kossler wrote:
> Could this be another case of the "issue_stream_cmd" never making it from
> the streamer to the Rx radio? Cédric, didn't we find that if you don't
> have a custom block controller, the stream cmd does not propagate as expect
> to the Radio and thus
On 17/02/21 15:35, Mark D via USRP-users wrote:
> I'm working with an E320 using UHD 4.0.
> [...]
> However if I reconfigure the GNU radio to "RFNoC RX Radio"->"RFNoC Digital
> Down Converter"->"RFNoC Gain"->"RFNoC Rx Streamer"->"QT GUI Time Sink" the
> system no longer works.
>
> The Time Sink
Dear all,
On USRP2, there was a concept of user registers,
i.e. memory allocated in FPGA for the user, using user_settings,
that the user can set in C++, using the UHD C++ API set_user_register.
I am trying to reproduce such behaviour on X300 using UHD 3.9 LTS (i.e
pre-RFNOC).
I am solely intere
Dear Tuan,
On 16/02/21 14:03, Tuan Hoang Dinh wrote:
> I would like to add Xilinx IP to RFNoC module and still have no idea to do
> that.
> Could you share your example to help me get started?
I forwarded Wade's example to you.
Regards
--
Cédric Hannotier
_
Dear Wade,
On 22/01/21 11:21, Wade Fife wrote:
> Yes, I have done it. I'll share an example with you. Putting your IP
> in-tree is also an option.
Thank you very much for the example, it worked!
Regards
--
Cédric Hannotier
___
USRP-users mailing lis
On 25/01/21 12:37, Aaron Rossetto via USRP-users wrote:
> On Mon, Jan 25, 2021 at 11:33 AM Cédric Hannotier via USRP-users
> wrote:
>
> > So the action is propagated by the gain block iif the controller is
> > built with UHD and hence recognized by uhd_usrp_probe.
> >
Dear Aaron and Rob,
On 22/01/21 14:15, Rob Kossler wrote:
> > On 21/01/21 22:49, Rob Kossler wrote:
> > > Also, regarding building in-tree, are you opposed to building in-tree as
> > > even
> > > a temporary test case? It's not too difficult to do. I am not
> > > talking about the
> > > FPGA co
Hi Rob,
Thanks for your assistance.
On 21/01/21 22:49, Rob Kossler wrote:
> Also, regarding building in-tree, are you opposed to building in-tree as even
> a temporary test case? It's not too difficult to do. I am not
> talking about the
> FPGA code - just the block controller HPP / CPP.
I am
Dear all,
On 08/01/21 18:58, Cédric Hannotier via USRP-users wrote:
> Dear all,
>
> I am following the RFNoC on UHD4.0 wiki [1],
> but there is no mention on how to add Xilinx IPs in the OOT.
>
> When following [2],
> after copy-pasting from "host/example/rfnoc-exampl
Hi Rob,
Thanks for your reply :)
On 21/01/21 09:32, Rob Kossler wrote:
> [...]
> In the rfnoc_rx_to_file program,
> streaming is started by the function rx_stream->issue_stream_cmd(). Note
> that this is a command to the streamer which then must be forwarded to the
> gain controller and then the
Hi Rob,
Thanks for your help.
On 20/01/21 16:46, Rob Kossler wrote:
> I don't see anything wrong. Given that you said the FFT block works but
> your block doesn't, could it be something related to a c++ block
> controller?
It is not just *my* block. the gain block from
"uhd/host/examples/rfnoc-
Hi Jonathon,
Thanks for the reply!
On 19/01/21 13:18, Jonathon Pendlum wrote:
> [...]. You can use "auto
> gain_blocks = graph->find_blocks("");"
> to get your gain block.
As stated in my original mail:
> On Thu, Jan 14, 2021 at 6:37 PM Cédric Hann
Dear all,
I am trying to implement simple RFNoC block in my FPGA image (X310),
and test it using UHD C++ API.
However, none of my blocks worked when inserted between the DDC and rx_stream.
Both rfnoc-example/gain block (from upstream host/example)
and bare bones block from rfnocmodtool (passthrou
On 15/01/21 09:06, Mark D via USRP-users wrote:
> My E320 doesn't have that folder,
> there is one "/etc/systemd/network/"
> but no "/etc/systemd/networkd/" (i.e. no d after network).
> I think maybe is a typing error in the manual and the folder name should be
> network.
>
> The folder at this l
Dear all,
After following [1] (testing OOT gain block from example code),
uhd_usrp_probe outputs:
[...]
[WARNING] [RFNOC::BLOCK_FACTORY] Could not find block with Noc-ID 0xb16, 0x
[...]
| | * 0/Block#0
| | * 0/DDC#0
[...]
and in C++:
auto gain_blocks =
graph->find_blocks("");
is em
Hi Wade,
On 13/01/21 10:00, Wade Fife wrote:
> On Wed, Jan 13, 2021 at 4:58 AM Cédric Hannotier via USRP-users <
> usrp-users@lists.ettus.com> wrote:
> > Is there a way to reconcile both modes (cli & GUI) without editing
> > my testbench every time I need to sw
On 12/01/21 13:42, Jonathon Pendlum via USRP-users wrote:
> Hi Cedric,
Hi Jonathon,
> "Fatal: The connected block has an incompatible backend interface".
>
>
> Try adding a short delay, such as #1 or @posedge( at the start of the
> testbench to get past this.
Thanks for the workaround, it work
On 11/01/21 21:40, Jonathon Pendlum wrote:
> Hi Cedric,
Hi Jonathon,
> Does the issue go away if you comment out test.start_tb(...) and all
> instances of test.start_test(...) and test.end_test() in the testbench?
If I comment out test.{start,end}_tb, it fails with:
"Fatal: The connected block h
On 04/01/21 16:09, Wade Fife wrote:
> On Wed, Dec 23, 2020 at 12:37 AM Cédric Hannotier via USRP-users <
> usrp-users@lists.ettus.com> wrote:
> [...]
> > 2. In AXI-Stream Data (2.3.3.3), I have no control over CHDR header.
> > What happens when the block drop sa
Dear all,
I am following the RFNoC on UHD4.0 wiki [1],
but there is no mention on how to add Xilinx IPs in the OOT.
When following [2],
after copy-pasting from "host/example/rfnoc-example",
and following [3] to setup basic shell env/script,
how can I add for example IP "xilinx.com:ip:mult_gen:12.
Dear all,
I have an issue with a testbench for a custom RFNoC block.
The testbench template is taken from host/example/rfnoc-example
and generated with rfnoc_create_verilog.py,
as stated in the wiki [1].
Running "make testbenches" completes without issue.
However, running the testbench with GUI (
Dear all,
I am reading the RFNoC Specification PDF (version 0.7),
and I have several questions. Any help is appreciated.
1. In AXI-Stream Data (2.3.3.3), axis_data_clk is provided.
However, some blocks use ce_clk instead. Why?
In [1] it is stated:
"Many other blocks require the ce (Compute Engin
On 2019-09-05 00:47, Marcus D. Leech via USRP-users wrote:
That's because, for weird internal reasons, there are actually TWO
time-of-day clocks on X310 and B210--one per "side". I don't remember
whether there are two commands sent from the host side, or a single
command, that is acted-upon s
On 2019-09-04 19:07, Marcus D. Leech via USRP-users wrote:
Le 04.09.2019 19:07, Marcus D. Leech via USRP-users a écrit :
The "set_time_now()" operation is unsynchronized--it simply transfers
the host time to the device(s) without any hardware synchronization
pulse. Since it necessarily has to
Dear all,
I would like to periodically send a frame with an USRP X310 (frame
length: 320 samples, rate: 20 MS/s, period: 1-500 ms). However, I
struggle to find the best way to implement it. What I have tried so far:
1. Append zeros to the frame to reach the expected period. However,
this co
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